Pratik Patel | c35426a | 2012-03-17 12:02:53 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 13 | #ifndef _LINUX_CORESIGHT_H |
| 14 | #define _LINUX_CORESIGHT_H |
Pratik Patel | 43e47bd | 2012-05-19 18:10:55 -0700 | [diff] [blame] | 15 | |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 16 | #include <linux/device.h> |
| 17 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 18 | |
Pratik Patel | 43e47bd | 2012-05-19 18:10:55 -0700 | [diff] [blame] | 19 | /* Peripheral id registers (0xFD0-0xFEC) */ |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 20 | #define CORESIGHT_PERIPHIDR4 (0xFD0) |
| 21 | #define CORESIGHT_PERIPHIDR5 (0xFD4) |
| 22 | #define CORESIGHT_PERIPHIDR6 (0xFD8) |
| 23 | #define CORESIGHT_PERIPHIDR7 (0xFDC) |
| 24 | #define CORESIGHT_PERIPHIDR0 (0xFE0) |
| 25 | #define CORESIGHT_PERIPHIDR1 (0xFE4) |
| 26 | #define CORESIGHT_PERIPHIDR2 (0xFE8) |
| 27 | #define CORESIGHT_PERIPHIDR3 (0xFEC) |
Pratik Patel | 43e47bd | 2012-05-19 18:10:55 -0700 | [diff] [blame] | 28 | /* Component id registers (0xFF0-0xFFC) */ |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 29 | #define CORESIGHT_COMPIDR0 (0xFF0) |
| 30 | #define CORESIGHT_COMPIDR1 (0xFF4) |
| 31 | #define CORESIGHT_COMPIDR2 (0xFF8) |
| 32 | #define CORESIGHT_COMPIDR3 (0xFFC) |
Pratik Patel | 43e47bd | 2012-05-19 18:10:55 -0700 | [diff] [blame] | 33 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 34 | |
Pratik Patel | 43e47bd | 2012-05-19 18:10:55 -0700 | [diff] [blame] | 35 | /* DBGv7 with baseline CP14 registers implemented */ |
| 36 | #define ARM_DEBUG_ARCH_V7B (0x3) |
| 37 | /* DBGv7 with all CP14 registers implemented */ |
| 38 | #define ARM_DEBUG_ARCH_V7 (0x4) |
| 39 | #define ARM_DEBUG_ARCH_V7_1 (0x5) |
| 40 | #define ETM_ARCH_V3_3 (0x23) |
| 41 | #define PFT_ARCH_V1_1 (0x31) |
Pratik Patel | c35426a | 2012-03-17 12:02:53 -0700 | [diff] [blame] | 42 | |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 43 | enum coresight_clk_rate { |
| 44 | CORESIGHT_CLK_RATE_OFF, |
| 45 | CORESIGHT_CLK_RATE_TRACE, |
| 46 | CORESIGHT_CLK_RATE_HSTRACE, |
Pratik Patel | f17b147 | 2012-05-25 22:23:52 -0700 | [diff] [blame] | 47 | }; |
| 48 | |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 49 | enum coresight_dev_type { |
| 50 | CORESIGHT_DEV_TYPE_SINK, |
| 51 | CORESIGHT_DEV_TYPE_LINK, |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 52 | CORESIGHT_DEV_TYPE_LINKSINK, |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 53 | CORESIGHT_DEV_TYPE_SOURCE, |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 54 | }; |
| 55 | |
| 56 | enum coresight_dev_subtype_sink { |
| 57 | CORESIGHT_DEV_SUBTYPE_SINK_NONE, |
| 58 | CORESIGHT_DEV_SUBTYPE_SINK_PORT, |
| 59 | CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, |
| 60 | }; |
| 61 | |
| 62 | enum coresight_dev_subtype_link { |
| 63 | CORESIGHT_DEV_SUBTYPE_LINK_NONE, |
| 64 | CORESIGHT_DEV_SUBTYPE_LINK_MERG, |
| 65 | CORESIGHT_DEV_SUBTYPE_LINK_SPLIT, |
| 66 | CORESIGHT_DEV_SUBTYPE_LINK_FIFO, |
| 67 | }; |
| 68 | |
| 69 | enum coresight_dev_subtype_source { |
| 70 | CORESIGHT_DEV_SUBTYPE_SOURCE_NONE, |
| 71 | CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, |
| 72 | CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, |
| 73 | CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, |
| 74 | }; |
| 75 | |
| 76 | struct coresight_dev_subtype { |
| 77 | enum coresight_dev_subtype_sink sink_subtype; |
| 78 | enum coresight_dev_subtype_link link_subtype; |
| 79 | enum coresight_dev_subtype_source source_subtype; |
| 80 | }; |
| 81 | |
| 82 | struct coresight_platform_data { |
| 83 | int id; |
| 84 | const char *name; |
| 85 | int nr_inports; |
| 86 | const int *outports; |
| 87 | const int *child_ids; |
| 88 | const int *child_ports; |
| 89 | int nr_outports; |
| 90 | bool default_sink; |
| 91 | }; |
| 92 | |
| 93 | struct coresight_desc { |
| 94 | enum coresight_dev_type type; |
| 95 | struct coresight_dev_subtype subtype; |
| 96 | const struct coresight_ops *ops; |
| 97 | struct coresight_platform_data *pdata; |
| 98 | struct device *dev; |
| 99 | const struct attribute_group **groups; |
| 100 | struct module *owner; |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 101 | }; |
| 102 | |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 103 | struct coresight_connection { |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 104 | int outport; |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 105 | int child_id; |
| 106 | int child_port; |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 107 | struct coresight_device *child_dev; |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 108 | struct list_head link; |
| 109 | }; |
| 110 | |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 111 | struct coresight_refcnt { |
| 112 | int sink_refcnt; |
| 113 | int *link_refcnts; |
| 114 | int source_refcnt; |
| 115 | }; |
| 116 | |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 117 | struct coresight_device { |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 118 | int id; |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 119 | struct coresight_connection *conns; |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 120 | int nr_conns; |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 121 | enum coresight_dev_type type; |
| 122 | struct coresight_dev_subtype subtype; |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 123 | const struct coresight_ops *ops; |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 124 | struct device dev; |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 125 | struct coresight_refcnt refcnt; |
| 126 | struct list_head dev_link; |
| 127 | struct list_head path_link; |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 128 | struct module *owner; |
| 129 | bool enable; |
| 130 | }; |
| 131 | |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 132 | #define to_coresight_device(d) container_of(d, struct coresight_device, dev) |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 133 | |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 134 | struct coresight_ops_sink { |
| 135 | int (*enable)(struct coresight_device *csdev); |
| 136 | void (*disable)(struct coresight_device *csdev); |
Pratik Patel | cf7d045 | 2012-07-02 13:57:20 -0700 | [diff] [blame^] | 137 | void (*abort)(struct coresight_device *csdev); |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 138 | }; |
| 139 | |
| 140 | struct coresight_ops_link { |
| 141 | int (*enable)(struct coresight_device *csdev, int iport, int oport); |
| 142 | void (*disable)(struct coresight_device *csdev, int iport, int oport); |
| 143 | }; |
| 144 | |
| 145 | struct coresight_ops_source { |
| 146 | int (*enable)(struct coresight_device *csdev); |
| 147 | void (*disable)(struct coresight_device *csdev); |
| 148 | }; |
| 149 | |
Pratik Patel | 6fb3834 | 2012-06-03 14:51:38 -0700 | [diff] [blame] | 150 | struct coresight_ops { |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 151 | const struct coresight_ops_sink *sink_ops; |
| 152 | const struct coresight_ops_link *link_ops; |
| 153 | const struct coresight_ops_source *source_ops; |
Pratik Patel | b84ef9d | 2012-05-24 14:01:43 -0700 | [diff] [blame] | 154 | }; |
| 155 | |
Pratik Patel | bf3e7744 | 2012-03-18 18:30:43 -0700 | [diff] [blame] | 156 | #ifdef CONFIG_MSM_QDSS |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 157 | extern struct coresight_device * |
| 158 | coresight_register(struct coresight_desc *desc); |
| 159 | extern void coresight_unregister(struct coresight_device *csdev); |
| 160 | extern int coresight_enable(struct coresight_device *csdev); |
| 161 | extern void coresight_disable(struct coresight_device *csdev); |
Pratik Patel | cf7d045 | 2012-07-02 13:57:20 -0700 | [diff] [blame^] | 162 | extern void coresight_abort(void); |
Pratik Patel | bf3e7744 | 2012-03-18 18:30:43 -0700 | [diff] [blame] | 163 | #else |
Pratik Patel | 0a7edd3 | 2012-06-08 09:31:55 -0700 | [diff] [blame] | 164 | static inline struct coresight_device * |
| 165 | coresight_register(struct coresight_desc *desc) { return NULL; } |
| 166 | static inline void coresight_unregister(struct coresight_device *csdev) {} |
| 167 | static inline int |
| 168 | coresight_enable(struct coresight_device *csdev) { return -ENOSYS; } |
| 169 | static inline void coresight_disable(struct coresight_device *csdev) {} |
Pratik Patel | cf7d045 | 2012-07-02 13:57:20 -0700 | [diff] [blame^] | 170 | static inline void coresight_abort(void) {} |
Pratik Patel | bf3e7744 | 2012-03-18 18:30:43 -0700 | [diff] [blame] | 171 | #endif |
| 172 | |
Pratik Patel | c35426a | 2012-03-17 12:02:53 -0700 | [diff] [blame] | 173 | #endif |