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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _I386_TLBFLUSH_H
2#define _I386_TLBFLUSH_H
3
Linus Torvalds1da177e2005-04-16 15:20:36 -07004#include <linux/mm.h>
5#include <asm/processor.h>
6
Rusty Russellda181a82006-12-07 02:14:08 +01007#ifdef CONFIG_PARAVIRT
8#include <asm/paravirt.h>
9#else
10#define __flush_tlb() __native_flush_tlb()
11#define __flush_tlb_global() __native_flush_tlb_global()
12#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
13#endif
14
15#define __native_flush_tlb() \
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 do { \
17 unsigned int tmpreg; \
18 \
19 __asm__ __volatile__( \
20 "movl %%cr3, %0; \n" \
21 "movl %0, %%cr3; # flush TLB \n" \
22 : "=r" (tmpreg) \
23 :: "memory"); \
24 } while (0)
25
26/*
27 * Global pages have to be flushed a bit differently. Not a real
28 * performance problem because this does not happen often.
29 */
Rusty Russellda181a82006-12-07 02:14:08 +010030#define __native_flush_tlb_global() \
Linus Torvalds1da177e2005-04-16 15:20:36 -070031 do { \
Andrea Arcangeliffaa8bd2005-06-27 14:36:36 -070032 unsigned int tmpreg, cr4, cr4_orig; \
Linus Torvalds1da177e2005-04-16 15:20:36 -070033 \
34 __asm__ __volatile__( \
Andrea Arcangeliffaa8bd2005-06-27 14:36:36 -070035 "movl %%cr4, %2; # turn off PGE \n" \
36 "movl %2, %1; \n" \
37 "andl %3, %1; \n" \
38 "movl %1, %%cr4; \n" \
Linus Torvalds1da177e2005-04-16 15:20:36 -070039 "movl %%cr3, %0; \n" \
40 "movl %0, %%cr3; # flush TLB \n" \
41 "movl %2, %%cr4; # turn PGE back on \n" \
Andrea Arcangeliffaa8bd2005-06-27 14:36:36 -070042 : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) \
43 : "i" (~X86_CR4_PGE) \
Linus Torvalds1da177e2005-04-16 15:20:36 -070044 : "memory"); \
45 } while (0)
46
Rusty Russellda181a82006-12-07 02:14:08 +010047#define __native_flush_tlb_single(addr) \
48 __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
49
Linus Torvalds1da177e2005-04-16 15:20:36 -070050# define __flush_tlb_all() \
51 do { \
52 if (cpu_has_pge) \
53 __flush_tlb_global(); \
54 else \
55 __flush_tlb(); \
56 } while (0)
57
58#define cpu_has_invlpg (boot_cpu_data.x86 > 3)
59
Linus Torvalds1da177e2005-04-16 15:20:36 -070060#ifdef CONFIG_X86_INVLPG
61# define __flush_tlb_one(addr) __flush_tlb_single(addr)
62#else
63# define __flush_tlb_one(addr) \
64 do { \
65 if (cpu_has_invlpg) \
66 __flush_tlb_single(addr); \
67 else \
68 __flush_tlb(); \
69 } while (0)
70#endif
71
72/*
73 * TLB flushing:
74 *
75 * - flush_tlb() flushes the current mm struct TLBs
76 * - flush_tlb_all() flushes all processes TLBs
77 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
78 * - flush_tlb_page(vma, vmaddr) flushes one page
79 * - flush_tlb_range(vma, start, end) flushes a range of pages
80 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
Jeremy Fitzhardinged4c10472007-05-02 19:27:15 +020081 * - flush_tlb_others(cpumask, mm, va) flushes a TLBs on other cpus
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 *
83 * ..but the i386 has somewhat limited tlb flushing capabilities,
84 * and page-granular flushes are available only on i486 and up.
85 */
86
Jeremy Fitzhardinged4c10472007-05-02 19:27:15 +020087#define TLB_FLUSH_ALL 0xffffffff
88
89
Linus Torvalds1da177e2005-04-16 15:20:36 -070090#ifndef CONFIG_SMP
91
Alexey Dobriyane8edc6e2007-05-21 01:22:52 +040092#include <linux/sched.h>
93
Linus Torvalds1da177e2005-04-16 15:20:36 -070094#define flush_tlb() __flush_tlb()
95#define flush_tlb_all() __flush_tlb_all()
96#define local_flush_tlb() __flush_tlb()
97
98static inline void flush_tlb_mm(struct mm_struct *mm)
99{
100 if (mm == current->active_mm)
101 __flush_tlb();
102}
103
104static inline void flush_tlb_page(struct vm_area_struct *vma,
105 unsigned long addr)
106{
107 if (vma->vm_mm == current->active_mm)
108 __flush_tlb_one(addr);
109}
110
111static inline void flush_tlb_range(struct vm_area_struct *vma,
112 unsigned long start, unsigned long end)
113{
114 if (vma->vm_mm == current->active_mm)
115 __flush_tlb();
116}
117
Jeremy Fitzhardinged4c10472007-05-02 19:27:15 +0200118static inline void native_flush_tlb_others(const cpumask_t *cpumask,
119 struct mm_struct *mm, unsigned long va)
120{
121}
122
123#else /* SMP */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124
125#include <asm/smp.h>
126
127#define local_flush_tlb() \
128 __flush_tlb()
129
130extern void flush_tlb_all(void);
131extern void flush_tlb_current_task(void);
132extern void flush_tlb_mm(struct mm_struct *);
133extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
134
135#define flush_tlb() flush_tlb_current_task()
136
137static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long start, unsigned long end)
138{
139 flush_tlb_mm(vma->vm_mm);
140}
141
Jeremy Fitzhardinged4c10472007-05-02 19:27:15 +0200142void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
143 unsigned long va);
144
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145#define TLBSTATE_OK 1
146#define TLBSTATE_LAZY 2
147
148struct tlb_state
149{
150 struct mm_struct *active_mm;
151 int state;
152 char __cacheline_padding[L1_CACHE_BYTES-8];
153};
154DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
Jeremy Fitzhardinged4c10472007-05-02 19:27:15 +0200155#endif /* SMP */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156
Jeremy Fitzhardinged4c10472007-05-02 19:27:15 +0200157#ifndef CONFIG_PARAVIRT
158#define flush_tlb_others(mask, mm, va) \
159 native_flush_tlb_others(&mask, mm, va)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160#endif
161
Andrew Morton45902952007-07-21 17:10:43 +0200162static inline void flush_tlb_kernel_range(unsigned long start,
163 unsigned long end)
164{
165 flush_tlb_all();
166}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168#endif /* _I386_TLBFLUSH_H */