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Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040046 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080047
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080052
Jesse Barnes79e53942008-11-07 14:24:08 -080053
Chris Wilson2e88e402010-08-07 11:01:27 +010054static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080055 "NTSC_M" , "NTSC_J" , "NTSC_443",
56 "PAL_B" , "PAL_D" , "PAL_G" ,
57 "PAL_H" , "PAL_I" , "PAL_M" ,
58 "PAL_N" , "PAL_NC" , "PAL_60" ,
59 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
60 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
61 "SECAM_60"
62};
63
64#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
65
Chris Wilsonea5b2132010-08-04 13:50:23 +010066struct intel_sdvo {
67 struct intel_encoder base;
68
Chris Wilsonf899fc62010-07-20 15:44:45 -070069 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070070 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080071
Chris Wilsone957d772010-09-24 12:52:03 +010072 struct i2c_adapter ddc;
73
Jesse Barnese2f0ba92009-02-02 15:11:52 -080074 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070075 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080076
Jesse Barnese2f0ba92009-02-02 15:11:52 -080077 /* Active outputs controlled by this SDVO output */
78 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080079
Jesse Barnese2f0ba92009-02-02 15:11:52 -080080 /*
81 * Capabilities of the SDVO device returned by
82 * i830_sdvo_get_capabilities()
83 */
Jesse Barnes79e53942008-11-07 14:24:08 -080084 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080085
86 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080087 int pixel_clock_min, pixel_clock_max;
88
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080089 /*
90 * For multiple function SDVO device,
91 * this is for current attached outputs.
92 */
93 uint16_t attached_output;
94
Simon Farnsworthcc68c812011-09-21 17:13:30 +010095 /*
96 * Hotplug activation bits for this device
97 */
98 uint8_t hotplug_active[2];
99
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800100 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000101 * This is used to select the color range of RBG outputs in HDMI mode.
102 * It is only valid when using TMDS encoding and 8 bit per color mode.
103 */
104 uint32_t color_range;
105
106 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800107 * This is set if we're going to treat the device as TV-out.
108 *
109 * While we have these nice friendly flags for output types that ought
110 * to decide this for us, the S-Video output on our HDMI+S-Video card
111 * shows up as RGB1 (VGA).
112 */
113 bool is_tv;
114
Zhao Yakuice6feab2009-08-24 13:50:26 +0800115 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100116 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800117
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800118 /**
119 * This is set if we treat the device as HDMI, instead of DVI.
120 */
121 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000122 bool has_hdmi_monitor;
123 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800124
Ma Ling7086c872009-05-13 11:20:06 +0800125 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100126 * This is set if we detect output of sdvo device as LVDS and
127 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800128 */
129 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800130
131 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800132 * This is sdvo fixed pannel mode pointer
133 */
134 struct drm_display_mode *sdvo_lvds_fixed_mode;
135
Eric Anholtc751ce42010-03-25 11:48:48 -0700136 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800137 uint8_t ddc_bus;
138
Chris Wilson6c9547f2010-08-25 10:05:17 +0100139 /* Input timings for adjusted_mode */
140 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800141};
142
143struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100144 struct intel_connector base;
145
Zhenyu Wang14571b42010-03-30 14:06:33 +0800146 /* Mark the type of connector */
147 uint16_t output_flag;
148
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100149 int force_audio;
150
Zhenyu Wang14571b42010-03-30 14:06:33 +0800151 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100152 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800153 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100154 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800155
Zhao Yakuib9219c52009-09-10 15:45:46 +0800156 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100157 struct drm_property *left;
158 struct drm_property *right;
159 struct drm_property *top;
160 struct drm_property *bottom;
161 struct drm_property *hpos;
162 struct drm_property *vpos;
163 struct drm_property *contrast;
164 struct drm_property *saturation;
165 struct drm_property *hue;
166 struct drm_property *sharpness;
167 struct drm_property *flicker_filter;
168 struct drm_property *flicker_filter_adaptive;
169 struct drm_property *flicker_filter_2d;
170 struct drm_property *tv_chroma_filter;
171 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100172 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800173
174 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100175 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800176
177 /* Add variable to record current setting for the above property */
178 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100179
Zhao Yakuib9219c52009-09-10 15:45:46 +0800180 /* this is to get the range of margin.*/
181 u32 max_hscan, max_vscan;
182 u32 max_hpos, cur_hpos;
183 u32 max_vpos, cur_vpos;
184 u32 cur_brightness, max_brightness;
185 u32 cur_contrast, max_contrast;
186 u32 cur_saturation, max_saturation;
187 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100188 u32 cur_sharpness, max_sharpness;
189 u32 cur_flicker_filter, max_flicker_filter;
190 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
191 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
192 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
193 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100194 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800195};
196
Chris Wilson890f3352010-09-14 16:46:59 +0100197static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100198{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100199 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100200}
201
Chris Wilsondf0e9242010-09-09 16:20:55 +0100202static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
203{
204 return container_of(intel_attached_encoder(connector),
205 struct intel_sdvo, base);
206}
207
Chris Wilson615fb932010-08-04 13:50:24 +0100208static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
209{
210 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
211}
212
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800213static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100214intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100215static bool
216intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
217 struct intel_sdvo_connector *intel_sdvo_connector,
218 int type);
219static bool
220intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
221 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800222
Jesse Barnes79e53942008-11-07 14:24:08 -0800223/**
224 * Writes the SDVOB or SDVOC with the given value, but always writes both
225 * SDVOB and SDVOC to work around apparent hardware issues (according to
226 * comments in the BIOS).
227 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100228static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800229{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100230 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800231 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800232 u32 bval = val, cval = val;
233 int i;
234
Chris Wilsonea5b2132010-08-04 13:50:23 +0100235 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
236 I915_WRITE(intel_sdvo->sdvo_reg, val);
237 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800238 return;
239 }
240
Chris Wilsonea5b2132010-08-04 13:50:23 +0100241 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800242 cval = I915_READ(SDVOC);
243 } else {
244 bval = I915_READ(SDVOB);
245 }
246 /*
247 * Write the registers twice for luck. Sometimes,
248 * writing them only once doesn't appear to 'stick'.
249 * The BIOS does this too. Yay, magic
250 */
251 for (i = 0; i < 2; i++)
252 {
253 I915_WRITE(SDVOB, bval);
254 I915_READ(SDVOB);
255 I915_WRITE(SDVOC, cval);
256 I915_READ(SDVOC);
257 }
258}
259
Chris Wilson32aad862010-08-04 13:50:25 +0100260static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800261{
Jesse Barnes79e53942008-11-07 14:24:08 -0800262 struct i2c_msg msgs[] = {
263 {
Chris Wilsone957d772010-09-24 12:52:03 +0100264 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800265 .flags = 0,
266 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100267 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800268 },
269 {
Chris Wilsone957d772010-09-24 12:52:03 +0100270 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 .flags = I2C_M_RD,
272 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100273 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800274 }
275 };
Chris Wilson32aad862010-08-04 13:50:25 +0100276 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800277
Chris Wilsonf899fc62010-07-20 15:44:45 -0700278 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800280
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800281 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800282 return false;
283}
284
Jesse Barnes79e53942008-11-07 14:24:08 -0800285#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
286/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100287static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800288 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100289 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800290} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100334
Akshay Joshi0206e352011-08-16 15:34:10 -0400335 /* Add the op code for SDVO enhancements */
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100380
Akshay Joshi0206e352011-08-16 15:34:10 -0400381 /* HDMI op code */
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800402};
403
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800404#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100405#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800406
Chris Wilsonea5b2132010-08-04 13:50:23 +0100407static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100408 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800409{
Jesse Barnes79e53942008-11-07 14:24:08 -0800410 int i;
411
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800412 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100413 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800414 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800415 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800416 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800417 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400418 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800419 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800420 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800421 break;
422 }
423 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400424 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800425 DRM_LOG_KMS("(%02X)", cmd);
426 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800427}
Jesse Barnes79e53942008-11-07 14:24:08 -0800428
Jesse Barnes79e53942008-11-07 14:24:08 -0800429static const char *cmd_status_names[] = {
430 "Power on",
431 "Success",
432 "Not supported",
433 "Invalid arg",
434 "Pending",
435 "Target not specified",
436 "Scaling not supported"
437};
438
Chris Wilsone957d772010-09-24 12:52:03 +0100439static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
440 const void *args, int args_len)
441{
442 u8 buf[args_len*2 + 2], status;
443 struct i2c_msg msgs[args_len + 3];
444 int i, ret;
445
446 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
447
448 for (i = 0; i < args_len; i++) {
449 msgs[i].addr = intel_sdvo->slave_addr;
450 msgs[i].flags = 0;
451 msgs[i].len = 2;
452 msgs[i].buf = buf + 2 *i;
453 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
454 buf[2*i + 1] = ((u8*)args)[i];
455 }
456 msgs[i].addr = intel_sdvo->slave_addr;
457 msgs[i].flags = 0;
458 msgs[i].len = 2;
459 msgs[i].buf = buf + 2*i;
460 buf[2*i + 0] = SDVO_I2C_OPCODE;
461 buf[2*i + 1] = cmd;
462
463 /* the following two are to read the response */
464 status = SDVO_I2C_CMD_STATUS;
465 msgs[i+1].addr = intel_sdvo->slave_addr;
466 msgs[i+1].flags = 0;
467 msgs[i+1].len = 1;
468 msgs[i+1].buf = &status;
469
470 msgs[i+2].addr = intel_sdvo->slave_addr;
471 msgs[i+2].flags = I2C_M_RD;
472 msgs[i+2].len = 1;
473 msgs[i+2].buf = &status;
474
475 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
476 if (ret < 0) {
477 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
478 return false;
479 }
480 if (ret != i+3) {
481 /* failure in I2C transfer */
482 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
483 return false;
484 }
485
Chris Wilsone957d772010-09-24 12:52:03 +0100486 return true;
487}
488
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100489static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
490 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800491{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100492 u8 retry = 5;
493 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800494 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800495
Chris Wilsond121a5d2011-01-25 15:00:01 +0000496 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
497
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100498 /*
499 * The documentation states that all commands will be
500 * processed within 15µs, and that we need only poll
501 * the status byte a maximum of 3 times in order for the
502 * command to be complete.
503 *
504 * Check 5 times in case the hardware failed to read the docs.
505 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000506 if (!intel_sdvo_read_byte(intel_sdvo,
507 SDVO_I2C_CMD_STATUS,
508 &status))
509 goto log_fail;
510
511 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
512 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100513 if (!intel_sdvo_read_byte(intel_sdvo,
514 SDVO_I2C_CMD_STATUS,
515 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000516 goto log_fail;
517 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100518
Jesse Barnes79e53942008-11-07 14:24:08 -0800519 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800520 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800521 else
yakui_zhao342dc382009-06-02 14:12:00 +0800522 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800523
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100524 if (status != SDVO_CMD_STATUS_SUCCESS)
525 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800526
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100527 /* Read the command response */
528 for (i = 0; i < response_len; i++) {
529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_RETURN_0 + i,
531 &((u8 *)response)[i]))
532 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100533 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800534 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100535 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100536 return true;
537
538log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000539 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100540 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800541}
542
Hannes Ederb358d0a2008-12-18 21:18:47 +0100543static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800544{
545 if (mode->clock >= 100000)
546 return 1;
547 else if (mode->clock >= 50000)
548 return 2;
549 else
550 return 4;
551}
552
Chris Wilsone957d772010-09-24 12:52:03 +0100553static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
554 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800555{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000556 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100557 return intel_sdvo_write_cmd(intel_sdvo,
558 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
559 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800560}
561
Chris Wilson32aad862010-08-04 13:50:25 +0100562static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
563{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000564 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
565 return false;
566
567 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100568}
569
570static bool
571intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
572{
573 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
574 return false;
575
576 return intel_sdvo_read_response(intel_sdvo, value, len);
577}
578
579static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800580{
581 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100582 return intel_sdvo_set_value(intel_sdvo,
583 SDVO_CMD_SET_TARGET_INPUT,
584 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800585}
586
587/**
588 * Return whether each input is trained.
589 *
590 * This function is making an assumption about the layout of the response,
591 * which should be checked against the docs.
592 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100593static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800594{
595 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800596
Chris Wilson1a3665c2011-01-25 13:59:37 +0000597 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100598 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
599 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800600 return false;
601
602 *input_1 = response.input0_trained;
603 *input_2 = response.input1_trained;
604 return true;
605}
606
Chris Wilsonea5b2132010-08-04 13:50:23 +0100607static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800608 u16 outputs)
609{
Chris Wilson32aad862010-08-04 13:50:25 +0100610 return intel_sdvo_set_value(intel_sdvo,
611 SDVO_CMD_SET_ACTIVE_OUTPUTS,
612 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800613}
614
Chris Wilsonea5b2132010-08-04 13:50:23 +0100615static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800616 int mode)
617{
Chris Wilson32aad862010-08-04 13:50:25 +0100618 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800619
620 switch (mode) {
621 case DRM_MODE_DPMS_ON:
622 state = SDVO_ENCODER_STATE_ON;
623 break;
624 case DRM_MODE_DPMS_STANDBY:
625 state = SDVO_ENCODER_STATE_STANDBY;
626 break;
627 case DRM_MODE_DPMS_SUSPEND:
628 state = SDVO_ENCODER_STATE_SUSPEND;
629 break;
630 case DRM_MODE_DPMS_OFF:
631 state = SDVO_ENCODER_STATE_OFF;
632 break;
633 }
634
Chris Wilson32aad862010-08-04 13:50:25 +0100635 return intel_sdvo_set_value(intel_sdvo,
636 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800637}
638
Chris Wilsonea5b2132010-08-04 13:50:23 +0100639static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800640 int *clock_min,
641 int *clock_max)
642{
643 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800644
Chris Wilson1a3665c2011-01-25 13:59:37 +0000645 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100646 if (!intel_sdvo_get_value(intel_sdvo,
647 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
648 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800649 return false;
650
651 /* Convert the values from units of 10 kHz to kHz. */
652 *clock_min = clocks.min * 10;
653 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800654 return true;
655}
656
Chris Wilsonea5b2132010-08-04 13:50:23 +0100657static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800658 u16 outputs)
659{
Chris Wilson32aad862010-08-04 13:50:25 +0100660 return intel_sdvo_set_value(intel_sdvo,
661 SDVO_CMD_SET_TARGET_OUTPUT,
662 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800663}
664
Chris Wilsonea5b2132010-08-04 13:50:23 +0100665static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800666 struct intel_sdvo_dtd *dtd)
667{
Chris Wilson32aad862010-08-04 13:50:25 +0100668 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
669 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800670}
671
Chris Wilsonea5b2132010-08-04 13:50:23 +0100672static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800673 struct intel_sdvo_dtd *dtd)
674{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100675 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800676 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
677}
678
Chris Wilsonea5b2132010-08-04 13:50:23 +0100679static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800680 struct intel_sdvo_dtd *dtd)
681{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100682 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800683 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
684}
685
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800686static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100687intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800688 uint16_t clock,
689 uint16_t width,
690 uint16_t height)
691{
692 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800693
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800694 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800695 args.clock = clock;
696 args.width = width;
697 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800698 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800699
Chris Wilsonea5b2132010-08-04 13:50:23 +0100700 if (intel_sdvo->is_lvds &&
701 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
702 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800703 args.scaled = 1;
704
Chris Wilson32aad862010-08-04 13:50:25 +0100705 return intel_sdvo_set_value(intel_sdvo,
706 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
707 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800708}
709
Chris Wilsonea5b2132010-08-04 13:50:23 +0100710static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800711 struct intel_sdvo_dtd *dtd)
712{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000713 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
714 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100715 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
716 &dtd->part1, sizeof(dtd->part1)) &&
717 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
718 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800719}
Jesse Barnes79e53942008-11-07 14:24:08 -0800720
Chris Wilsonea5b2132010-08-04 13:50:23 +0100721static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800722{
Chris Wilson32aad862010-08-04 13:50:25 +0100723 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800724}
725
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800726static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100727 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800728{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800729 uint16_t width, height;
730 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
731 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800732
733 width = mode->crtc_hdisplay;
734 height = mode->crtc_vdisplay;
735
736 /* do some mode translations */
737 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
738 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
739
740 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
741 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
742
743 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
744 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
745
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800746 dtd->part1.clock = mode->clock / 10;
747 dtd->part1.h_active = width & 0xff;
748 dtd->part1.h_blank = h_blank_len & 0xff;
749 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800750 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800751 dtd->part1.v_active = height & 0xff;
752 dtd->part1.v_blank = v_blank_len & 0xff;
753 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800754 ((v_blank_len >> 8) & 0xf);
755
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800756 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800757 dtd->part2.h_sync_width = h_sync_len & 0xff;
758 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800759 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800760 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800761 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
762 ((v_sync_len & 0x30) >> 4);
763
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800764 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800765 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800766 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800767 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800768 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800769
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800770 dtd->part2.sdvo_flags = 0;
771 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
772 dtd->part2.reserved = 0;
773}
Jesse Barnes79e53942008-11-07 14:24:08 -0800774
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800775static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100776 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800777{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778 mode->hdisplay = dtd->part1.h_active;
779 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
780 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800781 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800782 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
783 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
784 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
785 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
786
787 mode->vdisplay = dtd->part1.v_active;
788 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
789 mode->vsync_start = mode->vdisplay;
790 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800791 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800792 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
793 mode->vsync_end = mode->vsync_start +
794 (dtd->part2.v_sync_off_width & 0xf);
795 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
796 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
797 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
798
799 mode->clock = dtd->part1.clock * 10;
800
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800801 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800802 if (dtd->part2.dtd_flags & 0x2)
803 mode->flags |= DRM_MODE_FLAG_PHSYNC;
804 if (dtd->part2.dtd_flags & 0x4)
805 mode->flags |= DRM_MODE_FLAG_PVSYNC;
806}
807
Chris Wilsone27d8532010-10-22 09:15:22 +0100808static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800809{
Chris Wilsone27d8532010-10-22 09:15:22 +0100810 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800811
Chris Wilson1a3665c2011-01-25 13:59:37 +0000812 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100813 return intel_sdvo_get_value(intel_sdvo,
814 SDVO_CMD_GET_SUPP_ENCODE,
815 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800816}
817
Chris Wilsonea5b2132010-08-04 13:50:23 +0100818static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700819 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800820{
Chris Wilson32aad862010-08-04 13:50:25 +0100821 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800822}
823
Chris Wilsonea5b2132010-08-04 13:50:23 +0100824static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800825 uint8_t mode)
826{
Chris Wilson32aad862010-08-04 13:50:25 +0100827 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800828}
829
830#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100831static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800832{
833 int i, j;
834 uint8_t set_buf_index[2];
835 uint8_t av_split;
836 uint8_t buf_size;
837 uint8_t buf[48];
838 uint8_t *pos;
839
Chris Wilson32aad862010-08-04 13:50:25 +0100840 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841
842 for (i = 0; i <= av_split; i++) {
843 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700844 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800845 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700846 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
847 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800848
849 pos = buf;
850 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700851 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800852 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700853 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800854 pos += 8;
855 }
856 }
857}
858#endif
859
David Härdeman3c17fe42010-09-24 21:44:32 +0200860static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800861{
862 struct dip_infoframe avi_if = {
863 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200864 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800865 .len = DIP_LEN_AVI,
866 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200867 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
868 uint8_t set_buf_index[2] = { 1, 0 };
869 uint64_t *data = (uint64_t *)&avi_if;
870 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800871
David Härdeman3c17fe42010-09-24 21:44:32 +0200872 intel_dip_infoframe_csum(&avi_if);
873
Chris Wilsond121a5d2011-01-25 15:00:01 +0000874 if (!intel_sdvo_set_value(intel_sdvo,
875 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200876 set_buf_index, 2))
877 return false;
878
879 for (i = 0; i < sizeof(avi_if); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000880 if (!intel_sdvo_set_value(intel_sdvo,
881 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200882 data, 8))
883 return false;
884 data++;
885 }
886
Chris Wilsond121a5d2011-01-25 15:00:01 +0000887 return intel_sdvo_set_value(intel_sdvo,
888 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200889 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800890}
891
Chris Wilson32aad862010-08-04 13:50:25 +0100892static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800893{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800894 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100895 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800896
Chris Wilson40039752010-08-04 13:50:26 +0100897 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800898 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100899 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800900
Chris Wilson32aad862010-08-04 13:50:25 +0100901 BUILD_BUG_ON(sizeof(format) != 6);
902 return intel_sdvo_set_value(intel_sdvo,
903 SDVO_CMD_SET_TV_FORMAT,
904 &format, sizeof(format));
905}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800906
Chris Wilson32aad862010-08-04 13:50:25 +0100907static bool
908intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
909 struct drm_display_mode *mode)
910{
911 struct intel_sdvo_dtd output_dtd;
912
913 if (!intel_sdvo_set_target_output(intel_sdvo,
914 intel_sdvo->attached_output))
915 return false;
916
917 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
918 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
919 return false;
920
921 return true;
922}
923
924static bool
925intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
926 struct drm_display_mode *mode,
927 struct drm_display_mode *adjusted_mode)
928{
Chris Wilson32aad862010-08-04 13:50:25 +0100929 /* Reset the input timing to the screen. Assume always input 0. */
930 if (!intel_sdvo_set_target_input(intel_sdvo))
931 return false;
932
933 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
934 mode->clock / 10,
935 mode->hdisplay,
936 mode->vdisplay))
937 return false;
938
939 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100940 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100941 return false;
942
Chris Wilson6c9547f2010-08-25 10:05:17 +0100943 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100944
945 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100946 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800947}
948
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800949static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
950 struct drm_display_mode *mode,
951 struct drm_display_mode *adjusted_mode)
952{
Chris Wilson890f3352010-09-14 16:46:59 +0100953 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100954 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800955
Chris Wilson32aad862010-08-04 13:50:25 +0100956 /* We need to construct preferred input timings based on our
957 * output timings. To do that, we have to set the output
958 * timings, even though this isn't really the right place in
959 * the sequence to do it. Oh well.
960 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100961 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100962 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800963 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100964
Pavel Roskinc74696b2010-09-02 14:46:34 -0400965 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
966 mode,
967 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100968 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100969 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100970 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800971 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800972
Pavel Roskinc74696b2010-09-02 14:46:34 -0400973 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
974 mode,
975 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800976 }
Chris Wilson32aad862010-08-04 13:50:25 +0100977
978 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100979 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100980 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100981 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
982 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100983
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800984 return true;
985}
986
987static void intel_sdvo_mode_set(struct drm_encoder *encoder,
988 struct drm_display_mode *mode,
989 struct drm_display_mode *adjusted_mode)
990{
991 struct drm_device *dev = encoder->dev;
992 struct drm_i915_private *dev_priv = dev->dev_private;
993 struct drm_crtc *crtc = encoder->crtc;
994 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100995 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100996 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800997 struct intel_sdvo_in_out_map in_out;
998 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +0100999 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1000 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001001
1002 if (!mode)
1003 return;
1004
1005 /* First, set the input mapping for the first input to our controlled
1006 * output. This is only correct if we're a single-input device, in
1007 * which case the first input is the output from the appropriate SDVO
1008 * channel on the motherboard. In a two-input device, the first input
1009 * will be SDVOB and the second SDVOC.
1010 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001011 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001012 in_out.in1 = 0;
1013
Pavel Roskinc74696b2010-09-02 14:46:34 -04001014 intel_sdvo_set_value(intel_sdvo,
1015 SDVO_CMD_SET_IN_OUT_MAP,
1016 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001017
Chris Wilson6c9547f2010-08-25 10:05:17 +01001018 /* Set the output timings to the screen */
1019 if (!intel_sdvo_set_target_output(intel_sdvo,
1020 intel_sdvo->attached_output))
1021 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001022
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001023 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001024 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001025 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001026 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1027 input_dtd = intel_sdvo->input_dtd;
1028 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001029 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001030 if (!intel_sdvo_set_target_output(intel_sdvo,
1031 intel_sdvo->attached_output))
1032 return;
1033
Chris Wilson6c9547f2010-08-25 10:05:17 +01001034 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001035 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001036 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001037
1038 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001039 if (!intel_sdvo_set_target_input(intel_sdvo))
1040 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001041
Chris Wilson97aaf912011-01-04 20:10:52 +00001042 if (intel_sdvo->has_hdmi_monitor) {
1043 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1044 intel_sdvo_set_colorimetry(intel_sdvo,
1045 SDVO_COLORIMETRY_RGB256);
1046 intel_sdvo_set_avi_infoframe(intel_sdvo);
1047 } else
1048 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001049
Chris Wilson6c9547f2010-08-25 10:05:17 +01001050 if (intel_sdvo->is_tv &&
1051 !intel_sdvo_set_tv_format(intel_sdvo))
1052 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001053
Pavel Roskinc74696b2010-09-02 14:46:34 -04001054 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001055
Chris Wilson6c9547f2010-08-25 10:05:17 +01001056 switch (pixel_multiplier) {
1057 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001058 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1059 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1060 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001061 }
Chris Wilson32aad862010-08-04 13:50:25 +01001062 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1063 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001064
1065 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001066 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6714afb2010-12-17 04:10:51 +00001067 sdvox = 0;
Chris Wilsone953fd72011-02-21 22:23:52 +00001068 if (intel_sdvo->is_hdmi)
1069 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001070 if (INTEL_INFO(dev)->gen < 5)
1071 sdvox |= SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001072 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1073 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1074 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1075 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001076 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001077 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001078 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001079 case SDVOB:
1080 sdvox &= SDVOB_PRESERVE_MASK;
1081 break;
1082 case SDVOC:
1083 sdvox &= SDVOC_PRESERVE_MASK;
1084 break;
1085 }
1086 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1087 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001088 if (intel_crtc->pipe == 1)
1089 sdvox |= SDVO_PIPE_B_SELECT;
Chris Wilsonda79de92010-11-22 11:12:46 +00001090 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001091 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001092
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001093 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001094 /* done in crtc_mode_set as the dpll_md reg must be written early */
1095 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1096 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001097 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001098 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001099 }
1100
Chris Wilson6714afb2010-12-17 04:10:51 +00001101 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1102 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001103 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001104 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001105}
1106
1107static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1108{
1109 struct drm_device *dev = encoder->dev;
1110 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001111 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001112 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001113 u32 temp;
1114
1115 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001116 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001117 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001118 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001119
1120 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001121 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001122 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001123 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001124 }
1125 }
1126 } else {
1127 bool input1, input2;
1128 int i;
1129 u8 status;
1130
Chris Wilsonea5b2132010-08-04 13:50:23 +01001131 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001132 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001133 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001134 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001135 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001136
Chris Wilson32aad862010-08-04 13:50:25 +01001137 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001138 /* Warn if the device reported failure to sync.
1139 * A lot of SDVO devices fail to notify of sync, but it's
1140 * a given it the status is a success, we succeeded.
1141 */
1142 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001143 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001144 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001145 }
1146
1147 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001148 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1149 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001150 }
1151 return;
1152}
1153
Jesse Barnes79e53942008-11-07 14:24:08 -08001154static int intel_sdvo_mode_valid(struct drm_connector *connector,
1155 struct drm_display_mode *mode)
1156{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001157 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001158
1159 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1160 return MODE_NO_DBLESCAN;
1161
Chris Wilsonea5b2132010-08-04 13:50:23 +01001162 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001163 return MODE_CLOCK_LOW;
1164
Chris Wilsonea5b2132010-08-04 13:50:23 +01001165 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001166 return MODE_CLOCK_HIGH;
1167
Chris Wilson85454232010-08-08 14:28:23 +01001168 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001169 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001170 return MODE_PANEL;
1171
Chris Wilsonea5b2132010-08-04 13:50:23 +01001172 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001173 return MODE_PANEL;
1174 }
1175
Jesse Barnes79e53942008-11-07 14:24:08 -08001176 return MODE_OK;
1177}
1178
Chris Wilsonea5b2132010-08-04 13:50:23 +01001179static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001180{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001181 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001182 if (!intel_sdvo_get_value(intel_sdvo,
1183 SDVO_CMD_GET_DEVICE_CAPS,
1184 caps, sizeof(*caps)))
1185 return false;
1186
1187 DRM_DEBUG_KMS("SDVO capabilities:\n"
1188 " vendor_id: %d\n"
1189 " device_id: %d\n"
1190 " device_rev_id: %d\n"
1191 " sdvo_version_major: %d\n"
1192 " sdvo_version_minor: %d\n"
1193 " sdvo_inputs_mask: %d\n"
1194 " smooth_scaling: %d\n"
1195 " sharp_scaling: %d\n"
1196 " up_scaling: %d\n"
1197 " down_scaling: %d\n"
1198 " stall_support: %d\n"
1199 " output_flags: %d\n",
1200 caps->vendor_id,
1201 caps->device_id,
1202 caps->device_rev_id,
1203 caps->sdvo_version_major,
1204 caps->sdvo_version_minor,
1205 caps->sdvo_inputs_mask,
1206 caps->smooth_scaling,
1207 caps->sharp_scaling,
1208 caps->up_scaling,
1209 caps->down_scaling,
1210 caps->stall_support,
1211 caps->output_flags);
1212
1213 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001214}
1215
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001216static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001217{
1218 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001219
Chris Wilson32aad862010-08-04 13:50:25 +01001220 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1221 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001222}
1223
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001224static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001225{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001226 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001227
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001228 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001229}
1230
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001231static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001232intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001233{
Chris Wilsonbc652122011-01-25 13:28:29 +00001234 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001235 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001236}
1237
Chris Wilsonf899fc62010-07-20 15:44:45 -07001238static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001239intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001240{
Chris Wilsone957d772010-09-24 12:52:03 +01001241 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1242 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001243}
1244
Chris Wilsonff482d82010-09-15 10:40:38 +01001245/* Mac mini hack -- use the same DDC as the analog connector */
1246static struct edid *
1247intel_sdvo_get_analog_edid(struct drm_connector *connector)
1248{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001249 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001250
Chris Wilson0c1dab82010-11-23 22:37:01 +00001251 return drm_get_edid(connector,
1252 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001253}
1254
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +08001255enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001256intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001257{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001258 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001259 enum drm_connector_status status;
1260 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001261
Chris Wilsone957d772010-09-24 12:52:03 +01001262 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001263
Chris Wilsonea5b2132010-08-04 13:50:23 +01001264 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001265 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001266
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001267 /*
1268 * Don't use the 1 as the argument of DDC bus switch to get
1269 * the EDID. It is used for SDVO SPD ROM.
1270 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001271 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001272 intel_sdvo->ddc_bus = ddc;
1273 edid = intel_sdvo_get_edid(connector);
1274 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001275 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001276 }
Chris Wilsone957d772010-09-24 12:52:03 +01001277 /*
1278 * If we found the EDID on the other bus,
1279 * assume that is the correct DDC bus.
1280 */
1281 if (edid == NULL)
1282 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001283 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001284
1285 /*
1286 * When there is no edid and no monitor is connected with VGA
1287 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001288 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001289 if (edid == NULL)
1290 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001291
Chris Wilson2f551c82010-09-15 10:42:50 +01001292 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001293 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001294 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001295 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1296 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001297 if (intel_sdvo->is_hdmi) {
1298 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1299 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1300 }
Chris Wilson139467432011-02-09 20:01:16 +00001301 } else
1302 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001303 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001304 kfree(edid);
1305 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001306
1307 if (status == connector_status_connected) {
1308 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1309 if (intel_sdvo_connector->force_audio)
Chris Wilsonda79de92010-11-22 11:12:46 +00001310 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001311 }
1312
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +08001313 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001314}
1315
Chris Wilson7b334fc2010-09-09 23:51:02 +01001316static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001317intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001318{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001319 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001320 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001321 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001322 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001323
Chris Wilson32aad862010-08-04 13:50:25 +01001324 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001325 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001326 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001327
1328 /* add 30ms delay when the output type might be TV */
1329 if (intel_sdvo->caps.output_flags &
1330 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001331 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001332
Chris Wilson32aad862010-08-04 13:50:25 +01001333 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1334 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001335
Chris Wilsone957d772010-09-24 12:52:03 +01001336 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1337 response & 0xff, response >> 8,
1338 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001339
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001340 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001341 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001342
Chris Wilsonea5b2132010-08-04 13:50:23 +01001343 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001344
Chris Wilson97aaf912011-01-04 20:10:52 +00001345 intel_sdvo->has_hdmi_monitor = false;
1346 intel_sdvo->has_hdmi_audio = false;
1347
Chris Wilson615fb932010-08-04 13:50:24 +01001348 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001349 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001350 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001351 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001352 else {
1353 struct edid *edid;
1354
1355 /* if we have an edid check it matches the connection */
1356 edid = intel_sdvo_get_edid(connector);
1357 if (edid == NULL)
1358 edid = intel_sdvo_get_analog_edid(connector);
1359 if (edid != NULL) {
1360 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1361 ret = connector_status_disconnected;
1362 else
1363 ret = connector_status_connected;
1364 connector->display_info.raw_edid = NULL;
1365 kfree(edid);
1366 } else
1367 ret = connector_status_connected;
1368 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001369
1370 /* May update encoder flag for like clock for SDVO TV, etc.*/
1371 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001372 intel_sdvo->is_tv = false;
1373 intel_sdvo->is_lvds = false;
1374 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001375
1376 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001377 intel_sdvo->is_tv = true;
1378 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001379 }
1380 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001381 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001382 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001383
1384 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001385}
1386
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001387static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001388{
Chris Wilsonff482d82010-09-15 10:40:38 +01001389 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001390
1391 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001392 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001393
Keith Packard57cdaf92009-09-04 13:07:54 +08001394 /*
1395 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1396 * link between analog and digital outputs. So, if the regular SDVO
1397 * DDC fails, check to see if the analog output is disconnected, in
1398 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001399 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001400 if (edid == NULL)
1401 edid = intel_sdvo_get_analog_edid(connector);
1402
Chris Wilsonff482d82010-09-15 10:40:38 +01001403 if (edid != NULL) {
Chris Wilson139467432011-02-09 20:01:16 +00001404 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1405 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1406 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1407
1408 if (connector_is_digital == monitor_is_digital) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001409 drm_mode_connector_update_edid_property(connector, edid);
1410 drm_add_edid_modes(connector, edid);
1411 }
Chris Wilson139467432011-02-09 20:01:16 +00001412
Chris Wilsonff482d82010-09-15 10:40:38 +01001413 connector->display_info.raw_edid = NULL;
1414 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001415 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001416}
1417
1418/*
1419 * Set of SDVO TV modes.
1420 * Note! This is in reply order (see loop in get_tv_modes).
1421 * XXX: all 60Hz refresh?
1422 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001423static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001424 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1425 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001427 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1428 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001429 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001430 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1431 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001432 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001433 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1434 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001436 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1437 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001439 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1440 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001441 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001442 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1443 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001444 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001445 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1446 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001447 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001448 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1449 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001450 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001451 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1452 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001453 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001454 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1455 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001457 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1458 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001460 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1461 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001463 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1464 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001466 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1467 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001469 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1470 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001472 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1473 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001475 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1476 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001478 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1479 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481};
1482
1483static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1484{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001485 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001486 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001487 uint32_t reply = 0, format_map = 0;
1488 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001489
1490 /* Read the list of supported input resolutions for the selected TV
1491 * format.
1492 */
Chris Wilson40039752010-08-04 13:50:26 +01001493 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001494 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001495 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001496
Chris Wilson32aad862010-08-04 13:50:25 +01001497 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1498 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001499
Chris Wilson32aad862010-08-04 13:50:25 +01001500 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001501 if (!intel_sdvo_write_cmd(intel_sdvo,
1502 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001503 &tv_res, sizeof(tv_res)))
1504 return;
1505 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001506 return;
1507
1508 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001509 if (reply & (1 << i)) {
1510 struct drm_display_mode *nmode;
1511 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001512 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001513 if (nmode)
1514 drm_mode_probed_add(connector, nmode);
1515 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001516}
1517
Ma Ling7086c872009-05-13 11:20:06 +08001518static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1519{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001520 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001521 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001522 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001523
1524 /*
1525 * Attempt to get the mode list from DDC.
1526 * Assume that the preferred modes are
1527 * arranged in priority order.
1528 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001529 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001530 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001531 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001532
1533 /* Fetch modes from VBT */
1534 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001535 newmode = drm_mode_duplicate(connector->dev,
1536 dev_priv->sdvo_lvds_vbt_mode);
1537 if (newmode != NULL) {
1538 /* Guarantee the mode is preferred */
1539 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1540 DRM_MODE_TYPE_DRIVER);
1541 drm_mode_probed_add(connector, newmode);
1542 }
1543 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001544
1545end:
1546 list_for_each_entry(newmode, &connector->probed_modes, head) {
1547 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001548 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001549 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001550
1551 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1552 0);
1553
Chris Wilson85454232010-08-08 14:28:23 +01001554 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001555 break;
1556 }
1557 }
1558
Ma Ling7086c872009-05-13 11:20:06 +08001559}
1560
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001561static int intel_sdvo_get_modes(struct drm_connector *connector)
1562{
Chris Wilson615fb932010-08-04 13:50:24 +01001563 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001564
Chris Wilson615fb932010-08-04 13:50:24 +01001565 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001566 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001567 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001568 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001569 else
1570 intel_sdvo_get_ddc_modes(connector);
1571
Chris Wilson32aad862010-08-04 13:50:25 +01001572 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001573}
1574
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001575static void
1576intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001577{
Chris Wilson615fb932010-08-04 13:50:24 +01001578 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001579 struct drm_device *dev = connector->dev;
1580
Chris Wilsonc5521702010-08-04 13:50:28 +01001581 if (intel_sdvo_connector->left)
1582 drm_property_destroy(dev, intel_sdvo_connector->left);
1583 if (intel_sdvo_connector->right)
1584 drm_property_destroy(dev, intel_sdvo_connector->right);
1585 if (intel_sdvo_connector->top)
1586 drm_property_destroy(dev, intel_sdvo_connector->top);
1587 if (intel_sdvo_connector->bottom)
1588 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1589 if (intel_sdvo_connector->hpos)
1590 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1591 if (intel_sdvo_connector->vpos)
1592 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1593 if (intel_sdvo_connector->saturation)
1594 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1595 if (intel_sdvo_connector->contrast)
1596 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1597 if (intel_sdvo_connector->hue)
1598 drm_property_destroy(dev, intel_sdvo_connector->hue);
1599 if (intel_sdvo_connector->sharpness)
1600 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1601 if (intel_sdvo_connector->flicker_filter)
1602 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1603 if (intel_sdvo_connector->flicker_filter_2d)
1604 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1605 if (intel_sdvo_connector->flicker_filter_adaptive)
1606 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1607 if (intel_sdvo_connector->tv_luma_filter)
1608 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1609 if (intel_sdvo_connector->tv_chroma_filter)
1610 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001611 if (intel_sdvo_connector->dot_crawl)
1612 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001613 if (intel_sdvo_connector->brightness)
1614 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001615}
1616
Jesse Barnes79e53942008-11-07 14:24:08 -08001617static void intel_sdvo_destroy(struct drm_connector *connector)
1618{
Chris Wilson615fb932010-08-04 13:50:24 +01001619 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001620
Chris Wilsonc5521702010-08-04 13:50:28 +01001621 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001622 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001623 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001624
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001625 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001626 drm_sysfs_connector_remove(connector);
1627 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001628 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001629}
1630
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001631static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1632{
1633 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1634 struct edid *edid;
1635 bool has_audio = false;
1636
1637 if (!intel_sdvo->is_hdmi)
1638 return false;
1639
1640 edid = intel_sdvo_get_edid(connector);
1641 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1642 has_audio = drm_detect_monitor_audio(edid);
1643
1644 return has_audio;
1645}
1646
Zhao Yakuice6feab2009-08-24 13:50:26 +08001647static int
1648intel_sdvo_set_property(struct drm_connector *connector,
1649 struct drm_property *property,
1650 uint64_t val)
1651{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001652 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001653 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001654 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001655 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001656 uint8_t cmd;
1657 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001658
1659 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001660 if (ret)
1661 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001662
Chris Wilson3f43c482011-05-12 22:17:24 +01001663 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001664 int i = val;
1665 bool has_audio;
1666
1667 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001668 return 0;
1669
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001670 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001671
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001672 if (i == 0)
1673 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1674 else
1675 has_audio = i > 0;
1676
1677 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001678 return 0;
1679
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001680 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001681 goto done;
1682 }
1683
Chris Wilsone953fd72011-02-21 22:23:52 +00001684 if (property == dev_priv->broadcast_rgb_property) {
1685 if (val == !!intel_sdvo->color_range)
1686 return 0;
1687
1688 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001689 goto done;
1690 }
1691
Chris Wilsonc5521702010-08-04 13:50:28 +01001692#define CHECK_PROPERTY(name, NAME) \
1693 if (intel_sdvo_connector->name == property) { \
1694 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1695 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1696 cmd = SDVO_CMD_SET_##NAME; \
1697 intel_sdvo_connector->cur_##name = temp_value; \
1698 goto set_value; \
1699 }
1700
1701 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001702 if (val >= TV_FORMAT_NUM)
1703 return -EINVAL;
1704
Chris Wilson40039752010-08-04 13:50:26 +01001705 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001706 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001707 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001708
Chris Wilson40039752010-08-04 13:50:26 +01001709 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001710 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001711 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001712 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001713 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001714 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001715 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001716 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001717 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001718
Chris Wilson615fb932010-08-04 13:50:24 +01001719 intel_sdvo_connector->left_margin = temp_value;
1720 intel_sdvo_connector->right_margin = temp_value;
1721 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001722 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001723 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001724 goto set_value;
1725 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001726 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001727 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001728 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001729 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001730
Chris Wilson615fb932010-08-04 13:50:24 +01001731 intel_sdvo_connector->left_margin = temp_value;
1732 intel_sdvo_connector->right_margin = temp_value;
1733 temp_value = intel_sdvo_connector->max_hscan -
1734 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001735 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001736 goto set_value;
1737 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001738 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001739 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001740 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001741 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001742
Chris Wilson615fb932010-08-04 13:50:24 +01001743 intel_sdvo_connector->top_margin = temp_value;
1744 intel_sdvo_connector->bottom_margin = temp_value;
1745 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001746 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001747 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001748 goto set_value;
1749 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001750 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001751 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001752 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001753 return 0;
1754
Chris Wilson615fb932010-08-04 13:50:24 +01001755 intel_sdvo_connector->top_margin = temp_value;
1756 intel_sdvo_connector->bottom_margin = temp_value;
1757 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001758 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001759 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001760 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001761 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001762 CHECK_PROPERTY(hpos, HPOS)
1763 CHECK_PROPERTY(vpos, VPOS)
1764 CHECK_PROPERTY(saturation, SATURATION)
1765 CHECK_PROPERTY(contrast, CONTRAST)
1766 CHECK_PROPERTY(hue, HUE)
1767 CHECK_PROPERTY(brightness, BRIGHTNESS)
1768 CHECK_PROPERTY(sharpness, SHARPNESS)
1769 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1770 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1771 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1772 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1773 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001774 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001775 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001776
1777 return -EINVAL; /* unknown property */
1778
1779set_value:
1780 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1781 return -EIO;
1782
1783
1784done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001785 if (intel_sdvo->base.base.crtc) {
1786 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001787 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001788 crtc->y, crtc->fb);
1789 }
1790
Chris Wilson32aad862010-08-04 13:50:25 +01001791 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001792#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001793}
1794
Jesse Barnes79e53942008-11-07 14:24:08 -08001795static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1796 .dpms = intel_sdvo_dpms,
1797 .mode_fixup = intel_sdvo_mode_fixup,
1798 .prepare = intel_encoder_prepare,
1799 .mode_set = intel_sdvo_mode_set,
1800 .commit = intel_encoder_commit,
1801};
1802
1803static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001804 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001805 .detect = intel_sdvo_detect,
1806 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001807 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001808 .destroy = intel_sdvo_destroy,
1809};
1810
1811static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1812 .get_modes = intel_sdvo_get_modes,
1813 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001814 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001815};
1816
Hannes Ederb358d0a2008-12-18 21:18:47 +01001817static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001818{
Chris Wilson890f3352010-09-14 16:46:59 +01001819 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001820
Chris Wilsonea5b2132010-08-04 13:50:23 +01001821 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001822 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001823 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001824
Chris Wilsone957d772010-09-24 12:52:03 +01001825 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001826 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001827}
1828
1829static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1830 .destroy = intel_sdvo_enc_destroy,
1831};
1832
Chris Wilsonb66d8422010-08-12 15:26:41 +01001833static void
1834intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1835{
1836 uint16_t mask = 0;
1837 unsigned int num_bits;
1838
1839 /* Make a mask of outputs less than or equal to our own priority in the
1840 * list.
1841 */
1842 switch (sdvo->controlled_output) {
1843 case SDVO_OUTPUT_LVDS1:
1844 mask |= SDVO_OUTPUT_LVDS1;
1845 case SDVO_OUTPUT_LVDS0:
1846 mask |= SDVO_OUTPUT_LVDS0;
1847 case SDVO_OUTPUT_TMDS1:
1848 mask |= SDVO_OUTPUT_TMDS1;
1849 case SDVO_OUTPUT_TMDS0:
1850 mask |= SDVO_OUTPUT_TMDS0;
1851 case SDVO_OUTPUT_RGB1:
1852 mask |= SDVO_OUTPUT_RGB1;
1853 case SDVO_OUTPUT_RGB0:
1854 mask |= SDVO_OUTPUT_RGB0;
1855 break;
1856 }
1857
1858 /* Count bits to find what number we are in the priority list. */
1859 mask &= sdvo->caps.output_flags;
1860 num_bits = hweight16(mask);
1861 /* If more than 3 outputs, default to DDC bus 3 for now. */
1862 if (num_bits > 3)
1863 num_bits = 3;
1864
1865 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1866 sdvo->ddc_bus = 1 << num_bits;
1867}
Jesse Barnes79e53942008-11-07 14:24:08 -08001868
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001869/**
1870 * Choose the appropriate DDC bus for control bus switch command for this
1871 * SDVO output based on the controlled output.
1872 *
1873 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1874 * outputs, then LVDS outputs.
1875 */
1876static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001877intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001878 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001879{
Adam Jacksonb1083332010-04-23 16:07:40 -04001880 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001881
Adam Jacksonb1083332010-04-23 16:07:40 -04001882 if (IS_SDVOB(reg))
1883 mapping = &(dev_priv->sdvo_mappings[0]);
1884 else
1885 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001886
Chris Wilsonb66d8422010-08-12 15:26:41 +01001887 if (mapping->initialized)
1888 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1889 else
1890 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001891}
1892
Chris Wilsone957d772010-09-24 12:52:03 +01001893static void
1894intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1895 struct intel_sdvo *sdvo, u32 reg)
1896{
1897 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001898 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001899
1900 if (IS_SDVOB(reg))
1901 mapping = &dev_priv->sdvo_mappings[0];
1902 else
1903 mapping = &dev_priv->sdvo_mappings[1];
1904
1905 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001906 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001907 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001908
Chris Wilson63abf3e2010-12-08 16:48:21 +00001909 if (pin < GMBUS_NUM_PORTS) {
1910 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
Adam Jacksond5090b92011-06-16 16:36:28 -04001911 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001912 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001913 } else {
Chris Wilson63abf3e2010-12-08 16:48:21 +00001914 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
Adam Jackson46eb3032011-06-16 16:36:23 -04001915 }
Chris Wilsone957d772010-09-24 12:52:03 +01001916}
1917
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001918static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001919intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001920{
Chris Wilson97aaf912011-01-04 20:10:52 +00001921 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001922}
1923
yakui_zhao714605e2009-05-31 17:18:07 +08001924static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001925intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001926{
1927 struct drm_i915_private *dev_priv = dev->dev_private;
1928 struct sdvo_device_mapping *my_mapping, *other_mapping;
1929
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001930 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001931 my_mapping = &dev_priv->sdvo_mappings[0];
1932 other_mapping = &dev_priv->sdvo_mappings[1];
1933 } else {
1934 my_mapping = &dev_priv->sdvo_mappings[1];
1935 other_mapping = &dev_priv->sdvo_mappings[0];
1936 }
1937
1938 /* If the BIOS described our SDVO device, take advantage of it. */
1939 if (my_mapping->slave_addr)
1940 return my_mapping->slave_addr;
1941
1942 /* If the BIOS only described a different SDVO device, use the
1943 * address that it isn't using.
1944 */
1945 if (other_mapping->slave_addr) {
1946 if (other_mapping->slave_addr == 0x70)
1947 return 0x72;
1948 else
1949 return 0x70;
1950 }
1951
1952 /* No SDVO device info is found for another DVO port,
1953 * so use mapping assumption we had before BIOS parsing.
1954 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001955 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08001956 return 0x70;
1957 else
1958 return 0x72;
1959}
1960
Zhenyu Wang14571b42010-03-30 14:06:33 +08001961static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001962intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1963 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001964{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001965 drm_connector_init(encoder->base.base.dev,
1966 &connector->base.base,
1967 &intel_sdvo_connector_funcs,
1968 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08001969
Chris Wilsondf0e9242010-09-09 16:20:55 +01001970 drm_connector_helper_add(&connector->base.base,
1971 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001972
Chris Wilsondf0e9242010-09-09 16:20:55 +01001973 connector->base.base.interlace_allowed = 0;
1974 connector->base.base.doublescan_allowed = 0;
1975 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001976
Chris Wilsondf0e9242010-09-09 16:20:55 +01001977 intel_connector_attach_encoder(&connector->base, &encoder->base);
1978 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001979}
1980
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001981static void
1982intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1983{
1984 struct drm_device *dev = connector->base.base.dev;
1985
Chris Wilson3f43c482011-05-12 22:17:24 +01001986 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00001987 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
1988 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001989}
1990
Zhenyu Wang14571b42010-03-30 14:06:33 +08001991static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001992intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001993{
Chris Wilson4ef69c72010-09-09 15:14:28 +01001994 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001995 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001996 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001997 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01001998 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001999
Chris Wilson615fb932010-08-04 13:50:24 +01002000 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2001 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002002 return false;
2003
Zhenyu Wang14571b42010-03-30 14:06:33 +08002004 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002005 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002006 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002007 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002008 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002009 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002010 }
2011
Chris Wilson615fb932010-08-04 13:50:24 +01002012 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002013 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002014 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2015 connector->polled = DRM_CONNECTOR_POLL_HPD;
2016 intel_sdvo->hotplug_active[0] |= 1 << device;
2017 /* Some SDVO devices have one-shot hotplug interrupts.
2018 * Ensure that they get re-enabled when an interrupt happens.
2019 */
2020 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2021 intel_sdvo_enable_hotplug(intel_encoder);
2022 }
2023 else
2024 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002025 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2026 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2027
Chris Wilsone27d8532010-10-22 09:15:22 +01002028 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002029 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002030 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002031 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002032 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2033 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002034
Chris Wilsondf0e9242010-09-09 16:20:55 +01002035 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002036 if (intel_sdvo->is_hdmi)
2037 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002038
2039 return true;
2040}
2041
2042static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002043intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002044{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002045 struct drm_encoder *encoder = &intel_sdvo->base.base;
2046 struct drm_connector *connector;
2047 struct intel_connector *intel_connector;
2048 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002049
Chris Wilson615fb932010-08-04 13:50:24 +01002050 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2051 if (!intel_sdvo_connector)
2052 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002053
Chris Wilson615fb932010-08-04 13:50:24 +01002054 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002055 connector = &intel_connector->base;
2056 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2057 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002058
Chris Wilson4ef69c72010-09-09 15:14:28 +01002059 intel_sdvo->controlled_output |= type;
2060 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002061
Chris Wilson4ef69c72010-09-09 15:14:28 +01002062 intel_sdvo->is_tv = true;
2063 intel_sdvo->base.needs_tv_clock = true;
2064 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002065
Chris Wilsondf0e9242010-09-09 16:20:55 +01002066 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002067
Chris Wilson4ef69c72010-09-09 15:14:28 +01002068 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002069 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002070
Chris Wilson4ef69c72010-09-09 15:14:28 +01002071 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002072 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002073
Chris Wilson4ef69c72010-09-09 15:14:28 +01002074 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002075
2076err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002077 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002078 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002079}
2080
2081static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002082intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002083{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002084 struct drm_encoder *encoder = &intel_sdvo->base.base;
2085 struct drm_connector *connector;
2086 struct intel_connector *intel_connector;
2087 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002088
Chris Wilson615fb932010-08-04 13:50:24 +01002089 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2090 if (!intel_sdvo_connector)
2091 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002092
Chris Wilson615fb932010-08-04 13:50:24 +01002093 intel_connector = &intel_sdvo_connector->base;
2094 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002095 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2096 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2097 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002098
Chris Wilson4ef69c72010-09-09 15:14:28 +01002099 if (device == 0) {
2100 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2101 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2102 } else if (device == 1) {
2103 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2104 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2105 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002106
Chris Wilson4ef69c72010-09-09 15:14:28 +01002107 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2108 (1 << INTEL_ANALOG_CLONE_BIT));
2109
Chris Wilsondf0e9242010-09-09 16:20:55 +01002110 intel_sdvo_connector_init(intel_sdvo_connector,
2111 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002112 return true;
2113}
2114
2115static bool
2116intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2117{
2118 struct drm_encoder *encoder = &intel_sdvo->base.base;
2119 struct drm_connector *connector;
2120 struct intel_connector *intel_connector;
2121 struct intel_sdvo_connector *intel_sdvo_connector;
2122
2123 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2124 if (!intel_sdvo_connector)
2125 return false;
2126
2127 intel_connector = &intel_sdvo_connector->base;
2128 connector = &intel_connector->base;
2129 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2130 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2131
2132 if (device == 0) {
2133 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2134 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2135 } else if (device == 1) {
2136 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2137 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2138 }
2139
2140 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002141 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002142
Chris Wilsondf0e9242010-09-09 16:20:55 +01002143 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002144 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002145 goto err;
2146
2147 return true;
2148
2149err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002150 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002151 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002152}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002153
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002154static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002155intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002156{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002157 intel_sdvo->is_tv = false;
2158 intel_sdvo->base.needs_tv_clock = false;
2159 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002160
Zhenyu Wang14571b42010-03-30 14:06:33 +08002161 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002162
Zhenyu Wang14571b42010-03-30 14:06:33 +08002163 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002164 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002165 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002166
Zhenyu Wang14571b42010-03-30 14:06:33 +08002167 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002168 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002169 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002170
Zhenyu Wang14571b42010-03-30 14:06:33 +08002171 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7f2010-03-29 23:16:13 +08002172 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002173 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002174 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002175
Zhenyu Wang14571b42010-03-30 14:06:33 +08002176 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002177 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002178 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002179
Zhenyu Wang14571b42010-03-30 14:06:33 +08002180 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002181 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002182 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002183
Zhenyu Wang14571b42010-03-30 14:06:33 +08002184 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002185 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002186 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002187
Zhenyu Wang14571b42010-03-30 14:06:33 +08002188 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002189 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002190 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002191
Zhenyu Wang14571b42010-03-30 14:06:33 +08002192 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002193 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002194 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002195
Zhenyu Wang14571b42010-03-30 14:06:33 +08002196 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002197 unsigned char bytes[2];
2198
Chris Wilsonea5b2132010-08-04 13:50:23 +01002199 intel_sdvo->controlled_output = 0;
2200 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002201 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002202 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002203 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002204 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002205 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002206 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002207
Zhenyu Wang14571b42010-03-30 14:06:33 +08002208 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002209}
2210
Chris Wilson32aad862010-08-04 13:50:25 +01002211static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2212 struct intel_sdvo_connector *intel_sdvo_connector,
2213 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002214{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002215 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002216 struct intel_sdvo_tv_format format;
2217 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002218
Chris Wilson32aad862010-08-04 13:50:25 +01002219 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2220 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002221
Chris Wilson1a3665c2011-01-25 13:59:37 +00002222 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002223 if (!intel_sdvo_get_value(intel_sdvo,
2224 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2225 &format, sizeof(format)))
2226 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002227
Chris Wilson32aad862010-08-04 13:50:25 +01002228 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002229
2230 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002231 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002232
Chris Wilson615fb932010-08-04 13:50:24 +01002233 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002234 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002235 if (format_map & (1 << i))
2236 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002237
2238
Chris Wilsonc5521702010-08-04 13:50:28 +01002239 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002240 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2241 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002242 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002243 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002244
Chris Wilson615fb932010-08-04 13:50:24 +01002245 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002246 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002247 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002248 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002249
Chris Wilson40039752010-08-04 13:50:26 +01002250 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002251 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002252 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002253 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002254
2255}
2256
Chris Wilsonc5521702010-08-04 13:50:28 +01002257#define ENHANCEMENT(name, NAME) do { \
2258 if (enhancements.name) { \
2259 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2260 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2261 return false; \
2262 intel_sdvo_connector->max_##name = data_value[0]; \
2263 intel_sdvo_connector->cur_##name = response; \
2264 intel_sdvo_connector->name = \
2265 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2266 if (!intel_sdvo_connector->name) return false; \
2267 intel_sdvo_connector->name->values[0] = 0; \
2268 intel_sdvo_connector->name->values[1] = data_value[0]; \
2269 drm_connector_attach_property(connector, \
2270 intel_sdvo_connector->name, \
2271 intel_sdvo_connector->cur_##name); \
2272 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2273 data_value[0], data_value[1], response); \
2274 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002275} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002276
2277static bool
2278intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2279 struct intel_sdvo_connector *intel_sdvo_connector,
2280 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002281{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002282 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002283 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002284 uint16_t response, data_value[2];
2285
Chris Wilsonc5521702010-08-04 13:50:28 +01002286 /* when horizontal overscan is supported, Add the left/right property */
2287 if (enhancements.overscan_h) {
2288 if (!intel_sdvo_get_value(intel_sdvo,
2289 SDVO_CMD_GET_MAX_OVERSCAN_H,
2290 &data_value, 4))
2291 return false;
2292
2293 if (!intel_sdvo_get_value(intel_sdvo,
2294 SDVO_CMD_GET_OVERSCAN_H,
2295 &response, 2))
2296 return false;
2297
2298 intel_sdvo_connector->max_hscan = data_value[0];
2299 intel_sdvo_connector->left_margin = data_value[0] - response;
2300 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2301 intel_sdvo_connector->left =
2302 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2303 "left_margin", 2);
2304 if (!intel_sdvo_connector->left)
2305 return false;
2306
2307 intel_sdvo_connector->left->values[0] = 0;
2308 intel_sdvo_connector->left->values[1] = data_value[0];
2309 drm_connector_attach_property(connector,
2310 intel_sdvo_connector->left,
2311 intel_sdvo_connector->left_margin);
2312
2313 intel_sdvo_connector->right =
2314 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2315 "right_margin", 2);
2316 if (!intel_sdvo_connector->right)
2317 return false;
2318
2319 intel_sdvo_connector->right->values[0] = 0;
2320 intel_sdvo_connector->right->values[1] = data_value[0];
2321 drm_connector_attach_property(connector,
2322 intel_sdvo_connector->right,
2323 intel_sdvo_connector->right_margin);
2324 DRM_DEBUG_KMS("h_overscan: max %d, "
2325 "default %d, current %d\n",
2326 data_value[0], data_value[1], response);
2327 }
2328
2329 if (enhancements.overscan_v) {
2330 if (!intel_sdvo_get_value(intel_sdvo,
2331 SDVO_CMD_GET_MAX_OVERSCAN_V,
2332 &data_value, 4))
2333 return false;
2334
2335 if (!intel_sdvo_get_value(intel_sdvo,
2336 SDVO_CMD_GET_OVERSCAN_V,
2337 &response, 2))
2338 return false;
2339
2340 intel_sdvo_connector->max_vscan = data_value[0];
2341 intel_sdvo_connector->top_margin = data_value[0] - response;
2342 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2343 intel_sdvo_connector->top =
2344 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2345 "top_margin", 2);
2346 if (!intel_sdvo_connector->top)
2347 return false;
2348
2349 intel_sdvo_connector->top->values[0] = 0;
2350 intel_sdvo_connector->top->values[1] = data_value[0];
2351 drm_connector_attach_property(connector,
2352 intel_sdvo_connector->top,
2353 intel_sdvo_connector->top_margin);
2354
2355 intel_sdvo_connector->bottom =
2356 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2357 "bottom_margin", 2);
2358 if (!intel_sdvo_connector->bottom)
2359 return false;
2360
2361 intel_sdvo_connector->bottom->values[0] = 0;
2362 intel_sdvo_connector->bottom->values[1] = data_value[0];
2363 drm_connector_attach_property(connector,
2364 intel_sdvo_connector->bottom,
2365 intel_sdvo_connector->bottom_margin);
2366 DRM_DEBUG_KMS("v_overscan: max %d, "
2367 "default %d, current %d\n",
2368 data_value[0], data_value[1], response);
2369 }
2370
2371 ENHANCEMENT(hpos, HPOS);
2372 ENHANCEMENT(vpos, VPOS);
2373 ENHANCEMENT(saturation, SATURATION);
2374 ENHANCEMENT(contrast, CONTRAST);
2375 ENHANCEMENT(hue, HUE);
2376 ENHANCEMENT(sharpness, SHARPNESS);
2377 ENHANCEMENT(brightness, BRIGHTNESS);
2378 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2379 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2380 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2381 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2382 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2383
Chris Wilsone0442182010-08-04 13:50:29 +01002384 if (enhancements.dot_crawl) {
2385 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2386 return false;
2387
2388 intel_sdvo_connector->max_dot_crawl = 1;
2389 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2390 intel_sdvo_connector->dot_crawl =
2391 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2392 if (!intel_sdvo_connector->dot_crawl)
2393 return false;
2394
2395 intel_sdvo_connector->dot_crawl->values[0] = 0;
2396 intel_sdvo_connector->dot_crawl->values[1] = 1;
2397 drm_connector_attach_property(connector,
2398 intel_sdvo_connector->dot_crawl,
2399 intel_sdvo_connector->cur_dot_crawl);
2400 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2401 }
2402
Chris Wilsonc5521702010-08-04 13:50:28 +01002403 return true;
2404}
2405
2406static bool
2407intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2408 struct intel_sdvo_connector *intel_sdvo_connector,
2409 struct intel_sdvo_enhancements_reply enhancements)
2410{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002411 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002412 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2413 uint16_t response, data_value[2];
2414
2415 ENHANCEMENT(brightness, BRIGHTNESS);
2416
2417 return true;
2418}
2419#undef ENHANCEMENT
2420
2421static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2422 struct intel_sdvo_connector *intel_sdvo_connector)
2423{
2424 union {
2425 struct intel_sdvo_enhancements_reply reply;
2426 uint16_t response;
2427 } enhancements;
2428
Chris Wilson1a3665c2011-01-25 13:59:37 +00002429 BUILD_BUG_ON(sizeof(enhancements) != 2);
2430
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002431 enhancements.response = 0;
2432 intel_sdvo_get_value(intel_sdvo,
2433 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2434 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002435 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002436 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002437 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002438 }
Chris Wilson32aad862010-08-04 13:50:25 +01002439
Chris Wilsonc5521702010-08-04 13:50:28 +01002440 if (IS_TV(intel_sdvo_connector))
2441 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002442 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002443 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2444 else
2445 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002446}
Chris Wilson32aad862010-08-04 13:50:25 +01002447
Chris Wilsone957d772010-09-24 12:52:03 +01002448static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2449 struct i2c_msg *msgs,
2450 int num)
2451{
2452 struct intel_sdvo *sdvo = adapter->algo_data;
2453
2454 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2455 return -EIO;
2456
2457 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2458}
2459
2460static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2461{
2462 struct intel_sdvo *sdvo = adapter->algo_data;
2463 return sdvo->i2c->algo->functionality(sdvo->i2c);
2464}
2465
2466static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2467 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2468 .functionality = intel_sdvo_ddc_proxy_func
2469};
2470
2471static bool
2472intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2473 struct drm_device *dev)
2474{
2475 sdvo->ddc.owner = THIS_MODULE;
2476 sdvo->ddc.class = I2C_CLASS_DDC;
2477 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2478 sdvo->ddc.dev.parent = &dev->pdev->dev;
2479 sdvo->ddc.algo_data = sdvo;
2480 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2481
2482 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002483}
2484
Eric Anholtc751ce42010-03-25 11:48:48 -07002485bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002486{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002487 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002488 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002489 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002490 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002491
Chris Wilsonea5b2132010-08-04 13:50:23 +01002492 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2493 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002494 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002495
Chris Wilson56184e32011-05-17 14:03:50 +01002496 intel_sdvo->sdvo_reg = sdvo_reg;
2497 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2498 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002499 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2500 kfree(intel_sdvo);
2501 return false;
2502 }
2503
Chris Wilson56184e32011-05-17 14:03:50 +01002504 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002505 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002506 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002507 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002508
Jesse Barnes79e53942008-11-07 14:24:08 -08002509 /* Read the regs to test if we can talk to the device */
2510 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002511 u8 byte;
2512
2513 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002514 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002515 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002516 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002517 }
2518 }
2519
Chris Wilsonf899fc62010-07-20 15:44:45 -07002520 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002521 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002522 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002523 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002524
Chris Wilson4ef69c72010-09-09 15:14:28 +01002525 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002526
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002527 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002528 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002529 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002530
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002531 /* Set up hotplug command - note paranoia about contents of reply.
2532 * We assume that the hardware is in a sane state, and only touch
2533 * the bits we think we understand.
2534 */
2535 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2536 &intel_sdvo->hotplug_active, 2);
2537 intel_sdvo->hotplug_active[0] &= ~0x3;
2538
Chris Wilsonea5b2132010-08-04 13:50:23 +01002539 if (intel_sdvo_output_setup(intel_sdvo,
2540 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002541 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002542 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002543 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002544 }
2545
Chris Wilsonea5b2132010-08-04 13:50:23 +01002546 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002547
Jesse Barnes79e53942008-11-07 14:24:08 -08002548 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002549 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002550 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002551
Chris Wilson32aad862010-08-04 13:50:25 +01002552 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2553 &intel_sdvo->pixel_clock_min,
2554 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002555 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002556
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002557 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002558 "clock range %dMHz - %dMHz, "
2559 "input 1: %c, input 2: %c, "
2560 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002561 SDVO_NAME(intel_sdvo),
2562 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2563 intel_sdvo->caps.device_rev_id,
2564 intel_sdvo->pixel_clock_min / 1000,
2565 intel_sdvo->pixel_clock_max / 1000,
2566 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2567 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002568 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002569 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002570 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002571 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002572 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002573 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002574
Chris Wilsonf899fc62010-07-20 15:44:45 -07002575err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002576 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002577 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002578 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002579
Eric Anholt7d573822009-01-02 13:33:00 -08002580 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002581}