blob: 0b0aa4f516280bc522769f5761e18cb8dc4e5259 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003
3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
6 *
7 */
8
9#include <linux/config.h>
10#include <linux/module.h>
11#include <linux/types.h>
12#include <linux/string.h>
13#include <linux/kernel.h>
14#include <linux/timer.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/major.h>
18#include <linux/errno.h>
19#include <linux/genhd.h>
20#include <linux/blkpg.h>
21#include <linux/slab.h>
22#include <linux/pci.h>
23#include <linux/delay.h>
24#include <linux/hdreg.h>
25#include <linux/ide.h>
26#include <linux/bitops.h>
27
28#include <asm/byteorder.h>
29#include <asm/irq.h>
30#include <asm/uaccess.h>
31#include <asm/io.h>
32
33/*
34 * Conventional PIO operations for ATA devices
35 */
36
37static u8 ide_inb (unsigned long port)
38{
39 return (u8) inb(port);
40}
41
42static u16 ide_inw (unsigned long port)
43{
44 return (u16) inw(port);
45}
46
47static void ide_insw (unsigned long port, void *addr, u32 count)
48{
49 insw(port, addr, count);
50}
51
52static u32 ide_inl (unsigned long port)
53{
54 return (u32) inl(port);
55}
56
57static void ide_insl (unsigned long port, void *addr, u32 count)
58{
59 insl(port, addr, count);
60}
61
62static void ide_outb (u8 val, unsigned long port)
63{
64 outb(val, port);
65}
66
67static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
68{
69 outb(addr, port);
70}
71
72static void ide_outw (u16 val, unsigned long port)
73{
74 outw(val, port);
75}
76
77static void ide_outsw (unsigned long port, void *addr, u32 count)
78{
79 outsw(port, addr, count);
80}
81
82static void ide_outl (u32 val, unsigned long port)
83{
84 outl(val, port);
85}
86
87static void ide_outsl (unsigned long port, void *addr, u32 count)
88{
89 outsl(port, addr, count);
90}
91
92void default_hwif_iops (ide_hwif_t *hwif)
93{
94 hwif->OUTB = ide_outb;
95 hwif->OUTBSYNC = ide_outbsync;
96 hwif->OUTW = ide_outw;
97 hwif->OUTL = ide_outl;
98 hwif->OUTSW = ide_outsw;
99 hwif->OUTSL = ide_outsl;
100 hwif->INB = ide_inb;
101 hwif->INW = ide_inw;
102 hwif->INL = ide_inl;
103 hwif->INSW = ide_insw;
104 hwif->INSL = ide_insl;
105}
106
107EXPORT_SYMBOL(default_hwif_iops);
108
109/*
110 * MMIO operations, typically used for SATA controllers
111 */
112
113static u8 ide_mm_inb (unsigned long port)
114{
115 return (u8) readb((void __iomem *) port);
116}
117
118static u16 ide_mm_inw (unsigned long port)
119{
120 return (u16) readw((void __iomem *) port);
121}
122
123static void ide_mm_insw (unsigned long port, void *addr, u32 count)
124{
125 __ide_mm_insw((void __iomem *) port, addr, count);
126}
127
128static u32 ide_mm_inl (unsigned long port)
129{
130 return (u32) readl((void __iomem *) port);
131}
132
133static void ide_mm_insl (unsigned long port, void *addr, u32 count)
134{
135 __ide_mm_insl((void __iomem *) port, addr, count);
136}
137
138static void ide_mm_outb (u8 value, unsigned long port)
139{
140 writeb(value, (void __iomem *) port);
141}
142
143static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
144{
145 writeb(value, (void __iomem *) port);
146}
147
148static void ide_mm_outw (u16 value, unsigned long port)
149{
150 writew(value, (void __iomem *) port);
151}
152
153static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
154{
155 __ide_mm_outsw((void __iomem *) port, addr, count);
156}
157
158static void ide_mm_outl (u32 value, unsigned long port)
159{
160 writel(value, (void __iomem *) port);
161}
162
163static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
164{
165 __ide_mm_outsl((void __iomem *) port, addr, count);
166}
167
168void default_hwif_mmiops (ide_hwif_t *hwif)
169{
170 hwif->OUTB = ide_mm_outb;
171 /* Most systems will need to override OUTBSYNC, alas however
172 this one is controller specific! */
173 hwif->OUTBSYNC = ide_mm_outbsync;
174 hwif->OUTW = ide_mm_outw;
175 hwif->OUTL = ide_mm_outl;
176 hwif->OUTSW = ide_mm_outsw;
177 hwif->OUTSL = ide_mm_outsl;
178 hwif->INB = ide_mm_inb;
179 hwif->INW = ide_mm_inw;
180 hwif->INL = ide_mm_inl;
181 hwif->INSW = ide_mm_insw;
182 hwif->INSL = ide_mm_insl;
183}
184
185EXPORT_SYMBOL(default_hwif_mmiops);
186
187u32 ide_read_24 (ide_drive_t *drive)
188{
189 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
190 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
191 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
192 return (hcyl<<16)|(lcyl<<8)|sect;
193}
194
195void SELECT_DRIVE (ide_drive_t *drive)
196{
197 if (HWIF(drive)->selectproc)
198 HWIF(drive)->selectproc(drive);
199 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
200}
201
202EXPORT_SYMBOL(SELECT_DRIVE);
203
204void SELECT_INTERRUPT (ide_drive_t *drive)
205{
206 if (HWIF(drive)->intrproc)
207 HWIF(drive)->intrproc(drive);
208 else
209 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
210}
211
212void SELECT_MASK (ide_drive_t *drive, int mask)
213{
214 if (HWIF(drive)->maskproc)
215 HWIF(drive)->maskproc(drive, mask);
216}
217
218void QUIRK_LIST (ide_drive_t *drive)
219{
220 if (HWIF(drive)->quirkproc)
221 drive->quirk_list = HWIF(drive)->quirkproc(drive);
222}
223
224/*
225 * Some localbus EIDE interfaces require a special access sequence
226 * when using 32-bit I/O instructions to transfer data. We call this
227 * the "vlb_sync" sequence, which consists of three successive reads
228 * of the sector count register location, with interrupts disabled
229 * to ensure that the reads all happen together.
230 */
231static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
232{
233 (void) HWIF(drive)->INB(port);
234 (void) HWIF(drive)->INB(port);
235 (void) HWIF(drive)->INB(port);
236}
237
238/*
239 * This is used for most PIO data transfers *from* the IDE interface
240 */
241static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
242{
243 ide_hwif_t *hwif = HWIF(drive);
244 u8 io_32bit = drive->io_32bit;
245
246 if (io_32bit) {
247 if (io_32bit & 2) {
248 unsigned long flags;
249 local_irq_save(flags);
250 ata_vlb_sync(drive, IDE_NSECTOR_REG);
251 hwif->INSL(IDE_DATA_REG, buffer, wcount);
252 local_irq_restore(flags);
253 } else
254 hwif->INSL(IDE_DATA_REG, buffer, wcount);
255 } else {
256 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
257 }
258}
259
260/*
261 * This is used for most PIO data transfers *to* the IDE interface
262 */
263static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
264{
265 ide_hwif_t *hwif = HWIF(drive);
266 u8 io_32bit = drive->io_32bit;
267
268 if (io_32bit) {
269 if (io_32bit & 2) {
270 unsigned long flags;
271 local_irq_save(flags);
272 ata_vlb_sync(drive, IDE_NSECTOR_REG);
273 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
274 local_irq_restore(flags);
275 } else
276 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
277 } else {
278 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
279 }
280}
281
282/*
283 * The following routines are mainly used by the ATAPI drivers.
284 *
285 * These routines will round up any request for an odd number of bytes,
286 * so if an odd bytecount is specified, be sure that there's at least one
287 * extra byte allocated for the buffer.
288 */
289
290static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
291{
292 ide_hwif_t *hwif = HWIF(drive);
293
294 ++bytecount;
295#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
296 if (MACH_IS_ATARI || MACH_IS_Q40) {
297 /* Atari has a byte-swapped IDE interface */
298 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
299 return;
300 }
301#endif /* CONFIG_ATARI || CONFIG_Q40 */
302 hwif->ata_input_data(drive, buffer, bytecount / 4);
303 if ((bytecount & 0x03) >= 2)
304 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
305}
306
307static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
308{
309 ide_hwif_t *hwif = HWIF(drive);
310
311 ++bytecount;
312#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
313 if (MACH_IS_ATARI || MACH_IS_Q40) {
314 /* Atari has a byte-swapped IDE interface */
315 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
316 return;
317 }
318#endif /* CONFIG_ATARI || CONFIG_Q40 */
319 hwif->ata_output_data(drive, buffer, bytecount / 4);
320 if ((bytecount & 0x03) >= 2)
321 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
322}
323
324void default_hwif_transport(ide_hwif_t *hwif)
325{
326 hwif->ata_input_data = ata_input_data;
327 hwif->ata_output_data = ata_output_data;
328 hwif->atapi_input_bytes = atapi_input_bytes;
329 hwif->atapi_output_bytes = atapi_output_bytes;
330}
331
332EXPORT_SYMBOL(default_hwif_transport);
333
334/*
335 * Beginning of Taskfile OPCODE Library and feature sets.
336 */
337void ide_fix_driveid (struct hd_driveid *id)
338{
339#ifndef __LITTLE_ENDIAN
340# ifdef __BIG_ENDIAN
341 int i;
342 u16 *stringcast;
343
344 id->config = __le16_to_cpu(id->config);
345 id->cyls = __le16_to_cpu(id->cyls);
346 id->reserved2 = __le16_to_cpu(id->reserved2);
347 id->heads = __le16_to_cpu(id->heads);
348 id->track_bytes = __le16_to_cpu(id->track_bytes);
349 id->sector_bytes = __le16_to_cpu(id->sector_bytes);
350 id->sectors = __le16_to_cpu(id->sectors);
351 id->vendor0 = __le16_to_cpu(id->vendor0);
352 id->vendor1 = __le16_to_cpu(id->vendor1);
353 id->vendor2 = __le16_to_cpu(id->vendor2);
354 stringcast = (u16 *)&id->serial_no[0];
355 for (i = 0; i < (20/2); i++)
356 stringcast[i] = __le16_to_cpu(stringcast[i]);
357 id->buf_type = __le16_to_cpu(id->buf_type);
358 id->buf_size = __le16_to_cpu(id->buf_size);
359 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
360 stringcast = (u16 *)&id->fw_rev[0];
361 for (i = 0; i < (8/2); i++)
362 stringcast[i] = __le16_to_cpu(stringcast[i]);
363 stringcast = (u16 *)&id->model[0];
364 for (i = 0; i < (40/2); i++)
365 stringcast[i] = __le16_to_cpu(stringcast[i]);
366 id->dword_io = __le16_to_cpu(id->dword_io);
367 id->reserved50 = __le16_to_cpu(id->reserved50);
368 id->field_valid = __le16_to_cpu(id->field_valid);
369 id->cur_cyls = __le16_to_cpu(id->cur_cyls);
370 id->cur_heads = __le16_to_cpu(id->cur_heads);
371 id->cur_sectors = __le16_to_cpu(id->cur_sectors);
372 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
373 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
374 id->lba_capacity = __le32_to_cpu(id->lba_capacity);
375 id->dma_1word = __le16_to_cpu(id->dma_1word);
376 id->dma_mword = __le16_to_cpu(id->dma_mword);
377 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
378 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
379 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
380 id->eide_pio = __le16_to_cpu(id->eide_pio);
381 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
382 for (i = 0; i < 2; ++i)
383 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
384 for (i = 0; i < 4; ++i)
385 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
386 id->queue_depth = __le16_to_cpu(id->queue_depth);
387 for (i = 0; i < 4; ++i)
388 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
389 id->major_rev_num = __le16_to_cpu(id->major_rev_num);
390 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
391 id->command_set_1 = __le16_to_cpu(id->command_set_1);
392 id->command_set_2 = __le16_to_cpu(id->command_set_2);
393 id->cfsse = __le16_to_cpu(id->cfsse);
394 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
395 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
396 id->csf_default = __le16_to_cpu(id->csf_default);
397 id->dma_ultra = __le16_to_cpu(id->dma_ultra);
398 id->trseuc = __le16_to_cpu(id->trseuc);
399 id->trsEuc = __le16_to_cpu(id->trsEuc);
400 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
401 id->mprc = __le16_to_cpu(id->mprc);
402 id->hw_config = __le16_to_cpu(id->hw_config);
403 id->acoustic = __le16_to_cpu(id->acoustic);
404 id->msrqs = __le16_to_cpu(id->msrqs);
405 id->sxfert = __le16_to_cpu(id->sxfert);
406 id->sal = __le16_to_cpu(id->sal);
407 id->spg = __le32_to_cpu(id->spg);
408 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
409 for (i = 0; i < 22; i++)
410 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
411 id->last_lun = __le16_to_cpu(id->last_lun);
412 id->word127 = __le16_to_cpu(id->word127);
413 id->dlf = __le16_to_cpu(id->dlf);
414 id->csfo = __le16_to_cpu(id->csfo);
415 for (i = 0; i < 26; i++)
416 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
417 id->word156 = __le16_to_cpu(id->word156);
418 for (i = 0; i < 3; i++)
419 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
420 id->cfa_power = __le16_to_cpu(id->cfa_power);
421 for (i = 0; i < 14; i++)
422 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
423 for (i = 0; i < 31; i++)
424 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
425 for (i = 0; i < 48; i++)
426 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
427 id->integrity_word = __le16_to_cpu(id->integrity_word);
428# else
429# error "Please fix <asm/byteorder.h>"
430# endif
431#endif
432}
433
434/* FIXME: exported for use by the USB storage (isd200.c) code only */
435EXPORT_SYMBOL(ide_fix_driveid);
436
437void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
438{
439 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
440
441 if (byteswap) {
442 /* convert from big-endian to host byte order */
443 for (p = end ; p != s;) {
444 unsigned short *pp = (unsigned short *) (p -= 2);
445 *pp = ntohs(*pp);
446 }
447 }
448 /* strip leading blanks */
449 while (s != end && *s == ' ')
450 ++s;
451 /* compress internal blanks and strip trailing blanks */
452 while (s != end && *s) {
453 if (*s++ != ' ' || (s != end && *s && *s != ' '))
454 *p++ = *(s-1);
455 }
456 /* wipe out trailing garbage */
457 while (p != end)
458 *p++ = '\0';
459}
460
461EXPORT_SYMBOL(ide_fixstring);
462
463/*
464 * Needed for PCI irq sharing
465 */
466int drive_is_ready (ide_drive_t *drive)
467{
468 ide_hwif_t *hwif = HWIF(drive);
469 u8 stat = 0;
470
471 if (drive->waiting_for_dma)
472 return hwif->ide_dma_test_irq(drive);
473
474#if 0
475 /* need to guarantee 400ns since last command was issued */
476 udelay(1);
477#endif
478
479#ifdef CONFIG_IDEPCI_SHARE_IRQ
480 /*
481 * We do a passive status test under shared PCI interrupts on
482 * cards that truly share the ATA side interrupt, but may also share
483 * an interrupt with another pci card/device. We make no assumptions
484 * about possible isa-pnp and pci-pnp issues yet.
485 */
486 if (IDE_CONTROL_REG)
487 stat = hwif->INB(IDE_ALTSTATUS_REG);
488 else
489#endif /* CONFIG_IDEPCI_SHARE_IRQ */
490 /* Note: this may clear a pending IRQ!! */
491 stat = hwif->INB(IDE_STATUS_REG);
492
493 if (stat & BUSY_STAT)
494 /* drive busy: definitely not interrupting */
495 return 0;
496
497 /* drive ready: *might* be interrupting */
498 return 1;
499}
500
501EXPORT_SYMBOL(drive_is_ready);
502
503/*
504 * Global for All, and taken from ide-pmac.c. Can be called
505 * with spinlock held & IRQs disabled, so don't schedule !
506 */
507int wait_for_ready (ide_drive_t *drive, int timeout)
508{
509 ide_hwif_t *hwif = HWIF(drive);
510 u8 stat = 0;
511
512 while(--timeout) {
513 stat = hwif->INB(IDE_STATUS_REG);
514 if (!(stat & BUSY_STAT)) {
515 if (drive->ready_stat == 0)
516 break;
517 else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
518 break;
519 }
520 mdelay(1);
521 }
522 if ((stat & ERR_STAT) || timeout <= 0) {
523 if (stat & ERR_STAT) {
524 printk(KERN_ERR "%s: wait_for_ready, "
525 "error status: %x\n", drive->name, stat);
526 }
527 return 1;
528 }
529 return 0;
530}
531
532EXPORT_SYMBOL(wait_for_ready);
533
534/*
535 * This routine busy-waits for the drive status to be not "busy".
536 * It then checks the status for all of the "good" bits and none
537 * of the "bad" bits, and if all is okay it returns 0. All other
538 * cases return 1 after invoking ide_error() -- caller should just return.
539 *
540 * This routine should get fixed to not hog the cpu during extra long waits..
541 * That could be done by busy-waiting for the first jiffy or two, and then
542 * setting a timer to wake up at half second intervals thereafter,
543 * until timeout is achieved, before timing out.
544 */
545int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
546{
547 ide_hwif_t *hwif = HWIF(drive);
548 u8 stat;
549 int i;
550 unsigned long flags;
551
552 /* bail early if we've exceeded max_failures */
553 if (drive->max_failures && (drive->failures > drive->max_failures)) {
554 *startstop = ide_stopped;
555 return 1;
556 }
557
558 udelay(1); /* spec allows drive 400ns to assert "BUSY" */
559 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
560 local_irq_set(flags);
561 timeout += jiffies;
562 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
563 if (time_after(jiffies, timeout)) {
564 /*
565 * One last read after the timeout in case
566 * heavy interrupt load made us not make any
567 * progress during the timeout..
568 */
569 stat = hwif->INB(IDE_STATUS_REG);
570 if (!(stat & BUSY_STAT))
571 break;
572
573 local_irq_restore(flags);
574 *startstop = ide_error(drive, "status timeout", stat);
575 return 1;
576 }
577 }
578 local_irq_restore(flags);
579 }
580 /*
581 * Allow status to settle, then read it again.
582 * A few rare drives vastly violate the 400ns spec here,
583 * so we'll wait up to 10usec for a "good" status
584 * rather than expensively fail things immediately.
585 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
586 */
587 for (i = 0; i < 10; i++) {
588 udelay(1);
589 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
590 return 0;
591 }
592 *startstop = ide_error(drive, "status error", stat);
593 return 1;
594}
595
596EXPORT_SYMBOL(ide_wait_stat);
597
598/*
599 * All hosts that use the 80c ribbon must use!
600 * The name is derived from upper byte of word 93 and the 80c ribbon.
601 */
602u8 eighty_ninty_three (ide_drive_t *drive)
603{
Alan Coxd7d76342005-09-13 01:25:04 -0700604 if(HWIF(drive)->udma_four == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 return 0;
Alan Coxd7d76342005-09-13 01:25:04 -0700606 if (!(drive->id->hw_config & 0x6000))
607 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608#ifndef CONFIG_IDEDMA_IVB
Alan Coxd7d76342005-09-13 01:25:04 -0700609 if(!(drive->id->hw_config & 0x4000))
610 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700611#endif /* CONFIG_IDEDMA_IVB */
Alan Coxd7d76342005-09-13 01:25:04 -0700612 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613}
614
615EXPORT_SYMBOL(eighty_ninty_three);
616
617int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
618{
619 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
620 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
621 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
622#ifndef CONFIG_IDEDMA_IVB
623 if ((drive->id->hw_config & 0x6000) == 0) {
624#else /* !CONFIG_IDEDMA_IVB */
625 if (((drive->id->hw_config & 0x2000) == 0) ||
626 ((drive->id->hw_config & 0x4000) == 0)) {
627#endif /* CONFIG_IDEDMA_IVB */
628 printk("%s: Speed warnings UDMA 3/4/5 is not "
629 "functional.\n", drive->name);
630 return 1;
631 }
632 if (!HWIF(drive)->udma_four) {
633 printk("%s: Speed warnings UDMA 3/4/5 is not "
634 "functional.\n",
635 HWIF(drive)->name);
636 return 1;
637 }
638 }
639 return 0;
640}
641
642/*
643 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
644 * 1 : Safe to update drive->id DMA registers.
645 * 0 : OOPs not allowed.
646 */
647int set_transfer (ide_drive_t *drive, ide_task_t *args)
648{
649 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
650 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
651 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
652 (drive->id->dma_ultra ||
653 drive->id->dma_mword ||
654 drive->id->dma_1word))
655 return 1;
656
657 return 0;
658}
659
660#ifdef CONFIG_BLK_DEV_IDEDMA
661static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
662{
663 if (!drive->crc_count)
664 return drive->current_speed;
665 drive->crc_count = 0;
666
667 switch(drive->current_speed) {
668 case XFER_UDMA_7: return XFER_UDMA_6;
669 case XFER_UDMA_6: return XFER_UDMA_5;
670 case XFER_UDMA_5: return XFER_UDMA_4;
671 case XFER_UDMA_4: return XFER_UDMA_3;
672 case XFER_UDMA_3: return XFER_UDMA_2;
673 case XFER_UDMA_2: return XFER_UDMA_1;
674 case XFER_UDMA_1: return XFER_UDMA_0;
675 /*
676 * OOPS we do not goto non Ultra DMA modes
677 * without iCRC's available we force
678 * the system to PIO and make the user
679 * invoke the ATA-1 ATA-2 DMA modes.
680 */
681 case XFER_UDMA_0:
682 default: return XFER_PIO_4;
683 }
684}
685#endif /* CONFIG_BLK_DEV_IDEDMA */
686
687/*
688 * Update the
689 */
690int ide_driveid_update (ide_drive_t *drive)
691{
692 ide_hwif_t *hwif = HWIF(drive);
693 struct hd_driveid *id;
694#if 0
695 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
696 if (!id)
697 return 0;
698
699 taskfile_lib_get_identify(drive, (char *)&id);
700
701 ide_fix_driveid(id);
702 if (id) {
703 drive->id->dma_ultra = id->dma_ultra;
704 drive->id->dma_mword = id->dma_mword;
705 drive->id->dma_1word = id->dma_1word;
706 /* anything more ? */
707 kfree(id);
708 }
709 return 1;
710#else
711 /*
712 * Re-read drive->id for possible DMA mode
713 * change (copied from ide-probe.c)
714 */
715 unsigned long timeout, flags;
716
717 SELECT_MASK(drive, 1);
718 if (IDE_CONTROL_REG)
719 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
720 msleep(50);
721 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
722 timeout = jiffies + WAIT_WORSTCASE;
723 do {
724 if (time_after(jiffies, timeout)) {
725 SELECT_MASK(drive, 0);
726 return 0; /* drive timed-out */
727 }
728 msleep(50); /* give drive a breather */
729 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
730 msleep(50); /* wait for IRQ and DRQ_STAT */
731 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
732 SELECT_MASK(drive, 0);
733 printk("%s: CHECK for good STATUS\n", drive->name);
734 return 0;
735 }
736 local_irq_save(flags);
737 SELECT_MASK(drive, 0);
738 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
739 if (!id) {
740 local_irq_restore(flags);
741 return 0;
742 }
743 ata_input_data(drive, id, SECTOR_WORDS);
744 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */
745 local_irq_enable();
746 local_irq_restore(flags);
747 ide_fix_driveid(id);
748 if (id) {
749 drive->id->dma_ultra = id->dma_ultra;
750 drive->id->dma_mword = id->dma_mword;
751 drive->id->dma_1word = id->dma_1word;
752 /* anything more ? */
753 kfree(id);
754 }
755
756 return 1;
757#endif
758}
759
760/*
761 * Similar to ide_wait_stat(), except it never calls ide_error internally.
762 * This is a kludge to handle the new ide_config_drive_speed() function,
763 * and should not otherwise be used anywhere. Eventually, the tuneproc's
764 * should be updated to return ide_startstop_t, in which case we can get
765 * rid of this abomination again. :) -ml
766 *
767 * It is gone..........
768 *
769 * const char *msg == consider adding for verbose errors.
770 */
771int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
772{
773 ide_hwif_t *hwif = HWIF(drive);
774 int i, error = 1;
775 u8 stat;
776
777// while (HWGROUP(drive)->busy)
778// msleep(50);
779
780#ifdef CONFIG_BLK_DEV_IDEDMA
781 if (hwif->ide_dma_check) /* check if host supports DMA */
782 hwif->ide_dma_host_off(drive);
783#endif
784
785 /*
786 * Don't use ide_wait_cmd here - it will
787 * attempt to set_geometry and recalibrate,
788 * but for some reason these don't work at
789 * this point (lost interrupt).
790 */
791 /*
792 * Select the drive, and issue the SETFEATURES command
793 */
794 disable_irq_nosync(hwif->irq);
795
796 /*
797 * FIXME: we race against the running IRQ here if
798 * this is called from non IRQ context. If we use
799 * disable_irq() we hang on the error path. Work
800 * is needed.
801 */
802
803 udelay(1);
804 SELECT_DRIVE(drive);
805 SELECT_MASK(drive, 0);
806 udelay(1);
807 if (IDE_CONTROL_REG)
808 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
809 hwif->OUTB(speed, IDE_NSECTOR_REG);
810 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
811 hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
812 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
813 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
814 udelay(1);
815 /*
816 * Wait for drive to become non-BUSY
817 */
818 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
819 unsigned long flags, timeout;
820 local_irq_set(flags);
821 timeout = jiffies + WAIT_CMD;
822 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
823 if (time_after(jiffies, timeout))
824 break;
825 }
826 local_irq_restore(flags);
827 }
828
829 /*
830 * Allow status to settle, then read it again.
831 * A few rare drives vastly violate the 400ns spec here,
832 * so we'll wait up to 10usec for a "good" status
833 * rather than expensively fail things immediately.
834 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
835 */
836 for (i = 0; i < 10; i++) {
837 udelay(1);
838 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
839 error = 0;
840 break;
841 }
842 }
843
844 SELECT_MASK(drive, 0);
845
846 enable_irq(hwif->irq);
847
848 if (error) {
849 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
850 return error;
851 }
852
853 drive->id->dma_ultra &= ~0xFF00;
854 drive->id->dma_mword &= ~0x0F00;
855 drive->id->dma_1word &= ~0x0F00;
856
857#ifdef CONFIG_BLK_DEV_IDEDMA
858 if (speed >= XFER_SW_DMA_0)
859 hwif->ide_dma_host_on(drive);
860 else if (hwif->ide_dma_check) /* check if host supports DMA */
861 hwif->ide_dma_off_quietly(drive);
862#endif
863
864 switch(speed) {
865 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break;
866 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break;
867 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break;
868 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break;
869 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break;
870 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break;
871 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break;
872 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break;
873 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
874 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
875 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
876 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
877 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
878 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
879 default: break;
880 }
881 if (!drive->init_speed)
882 drive->init_speed = speed;
883 drive->current_speed = speed;
884 return error;
885}
886
887EXPORT_SYMBOL(ide_config_drive_speed);
888
889
890/*
891 * This should get invoked any time we exit the driver to
892 * wait for an interrupt response from a drive. handler() points
893 * at the appropriate code to handle the next interrupt, and a
894 * timer is started to prevent us from waiting forever in case
895 * something goes wrong (see the ide_timer_expiry() handler later on).
896 *
897 * See also ide_execute_command
898 */
899static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
900 unsigned int timeout, ide_expiry_t *expiry)
901{
902 ide_hwgroup_t *hwgroup = HWGROUP(drive);
903
904 if (hwgroup->handler != NULL) {
905 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
906 "old=%p, new=%p\n",
907 drive->name, hwgroup->handler, handler);
908 }
909 hwgroup->handler = handler;
910 hwgroup->expiry = expiry;
911 hwgroup->timer.expires = jiffies + timeout;
912 add_timer(&hwgroup->timer);
913}
914
915void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
916 unsigned int timeout, ide_expiry_t *expiry)
917{
918 unsigned long flags;
919 spin_lock_irqsave(&ide_lock, flags);
920 __ide_set_handler(drive, handler, timeout, expiry);
921 spin_unlock_irqrestore(&ide_lock, flags);
922}
923
924EXPORT_SYMBOL(ide_set_handler);
925
926/**
927 * ide_execute_command - execute an IDE command
928 * @drive: IDE drive to issue the command against
929 * @command: command byte to write
930 * @handler: handler for next phase
931 * @timeout: timeout for command
932 * @expiry: handler to run on timeout
933 *
934 * Helper function to issue an IDE command. This handles the
935 * atomicity requirements, command timing and ensures that the
936 * handler and IRQ setup do not race. All IDE command kick off
937 * should go via this function or do equivalent locking.
938 */
939
940void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
941{
942 unsigned long flags;
943 ide_hwgroup_t *hwgroup = HWGROUP(drive);
944 ide_hwif_t *hwif = HWIF(drive);
945
946 spin_lock_irqsave(&ide_lock, flags);
947
948 if(hwgroup->handler)
949 BUG();
950 hwgroup->handler = handler;
951 hwgroup->expiry = expiry;
952 hwgroup->timer.expires = jiffies + timeout;
953 add_timer(&hwgroup->timer);
954 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
955 /* Drive takes 400nS to respond, we must avoid the IRQ being
956 serviced before that.
957
958 FIXME: we could skip this delay with care on non shared
959 devices
960 */
961 ndelay(400);
962 spin_unlock_irqrestore(&ide_lock, flags);
963}
964
965EXPORT_SYMBOL(ide_execute_command);
966
967
968/* needed below */
969static ide_startstop_t do_reset1 (ide_drive_t *, int);
970
971/*
972 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
973 * during an atapi drive reset operation. If the drive has not yet responded,
974 * and we have not yet hit our maximum waiting time, then the timer is restarted
975 * for another 50ms.
976 */
977static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
978{
979 ide_hwgroup_t *hwgroup = HWGROUP(drive);
980 ide_hwif_t *hwif = HWIF(drive);
981 u8 stat;
982
983 SELECT_DRIVE(drive);
984 udelay (10);
985
986 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
987 printk("%s: ATAPI reset complete\n", drive->name);
988 } else {
989 if (time_before(jiffies, hwgroup->poll_timeout)) {
990 if (HWGROUP(drive)->handler != NULL)
991 BUG();
992 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
993 /* continue polling */
994 return ide_started;
995 }
996 /* end of polling */
997 hwgroup->polling = 0;
998 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
999 drive->name, stat);
1000 /* do it the old fashioned way */
1001 return do_reset1(drive, 1);
1002 }
1003 /* done polling */
1004 hwgroup->polling = 0;
1005 return ide_stopped;
1006}
1007
1008/*
1009 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1010 * during an ide reset operation. If the drives have not yet responded,
1011 * and we have not yet hit our maximum waiting time, then the timer is restarted
1012 * for another 50ms.
1013 */
1014static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1015{
1016 ide_hwgroup_t *hwgroup = HWGROUP(drive);
1017 ide_hwif_t *hwif = HWIF(drive);
1018 u8 tmp;
1019
1020 if (hwif->reset_poll != NULL) {
1021 if (hwif->reset_poll(drive)) {
1022 printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1023 hwif->name, drive->name);
1024 return ide_stopped;
1025 }
1026 }
1027
1028 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1029 if (time_before(jiffies, hwgroup->poll_timeout)) {
1030 if (HWGROUP(drive)->handler != NULL)
1031 BUG();
1032 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1033 /* continue polling */
1034 return ide_started;
1035 }
1036 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1037 drive->failures++;
1038 } else {
1039 printk("%s: reset: ", hwif->name);
1040 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1041 printk("success\n");
1042 drive->failures = 0;
1043 } else {
1044 drive->failures++;
1045 printk("master: ");
1046 switch (tmp & 0x7f) {
1047 case 1: printk("passed");
1048 break;
1049 case 2: printk("formatter device error");
1050 break;
1051 case 3: printk("sector buffer error");
1052 break;
1053 case 4: printk("ECC circuitry error");
1054 break;
1055 case 5: printk("controlling MPU error");
1056 break;
1057 default:printk("error (0x%02x?)", tmp);
1058 }
1059 if (tmp & 0x80)
1060 printk("; slave: failed");
1061 printk("\n");
1062 }
1063 }
1064 hwgroup->polling = 0; /* done polling */
1065 return ide_stopped;
1066}
1067
1068static void check_dma_crc(ide_drive_t *drive)
1069{
1070#ifdef CONFIG_BLK_DEV_IDEDMA
1071 if (drive->crc_count) {
1072 (void) HWIF(drive)->ide_dma_off_quietly(drive);
1073 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1074 if (drive->current_speed >= XFER_SW_DMA_0)
1075 (void) HWIF(drive)->ide_dma_on(drive);
1076 } else
1077 (void)__ide_dma_off(drive);
1078#endif
1079}
1080
1081static void ide_disk_pre_reset(ide_drive_t *drive)
1082{
1083 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1084
1085 drive->special.all = 0;
1086 drive->special.b.set_geometry = legacy;
1087 drive->special.b.recalibrate = legacy;
1088 if (OK_TO_RESET_CONTROLLER)
1089 drive->mult_count = 0;
1090 if (!drive->keep_settings && !drive->using_dma)
1091 drive->mult_req = 0;
1092 if (drive->mult_req != drive->mult_count)
1093 drive->special.b.set_multmode = 1;
1094}
1095
1096static void pre_reset(ide_drive_t *drive)
1097{
1098 if (drive->media == ide_disk)
1099 ide_disk_pre_reset(drive);
1100 else
1101 drive->post_reset = 1;
1102
1103 if (!drive->keep_settings) {
1104 if (drive->using_dma) {
1105 check_dma_crc(drive);
1106 } else {
1107 drive->unmask = 0;
1108 drive->io_32bit = 0;
1109 }
1110 return;
1111 }
1112 if (drive->using_dma)
1113 check_dma_crc(drive);
1114
1115 if (HWIF(drive)->pre_reset != NULL)
1116 HWIF(drive)->pre_reset(drive);
1117
1118}
1119
1120/*
1121 * do_reset1() attempts to recover a confused drive by resetting it.
1122 * Unfortunately, resetting a disk drive actually resets all devices on
1123 * the same interface, so it can really be thought of as resetting the
1124 * interface rather than resetting the drive.
1125 *
1126 * ATAPI devices have their own reset mechanism which allows them to be
1127 * individually reset without clobbering other devices on the same interface.
1128 *
1129 * Unfortunately, the IDE interface does not generate an interrupt to let
1130 * us know when the reset operation has finished, so we must poll for this.
1131 * Equally poor, though, is the fact that this may a very long time to complete,
1132 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it,
1133 * we set a timer to poll at 50ms intervals.
1134 */
1135static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1136{
1137 unsigned int unit;
1138 unsigned long flags;
1139 ide_hwif_t *hwif;
1140 ide_hwgroup_t *hwgroup;
1141
1142 spin_lock_irqsave(&ide_lock, flags);
1143 hwif = HWIF(drive);
1144 hwgroup = HWGROUP(drive);
1145
1146 /* We must not reset with running handlers */
1147 if(hwgroup->handler != NULL)
1148 BUG();
1149
1150 /* For an ATAPI device, first try an ATAPI SRST. */
1151 if (drive->media != ide_disk && !do_not_try_atapi) {
1152 pre_reset(drive);
1153 SELECT_DRIVE(drive);
1154 udelay (20);
Alan Cox68ad9912005-06-27 15:24:25 -07001155 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1156 ndelay(400);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001157 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1158 hwgroup->polling = 1;
1159 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1160 spin_unlock_irqrestore(&ide_lock, flags);
1161 return ide_started;
1162 }
1163
1164 /*
1165 * First, reset any device state data we were maintaining
1166 * for any of the drives on this interface.
1167 */
1168 for (unit = 0; unit < MAX_DRIVES; ++unit)
1169 pre_reset(&hwif->drives[unit]);
1170
1171#if OK_TO_RESET_CONTROLLER
1172 if (!IDE_CONTROL_REG) {
1173 spin_unlock_irqrestore(&ide_lock, flags);
1174 return ide_stopped;
1175 }
1176
1177 /*
1178 * Note that we also set nIEN while resetting the device,
1179 * to mask unwanted interrupts from the interface during the reset.
1180 * However, due to the design of PC hardware, this will cause an
1181 * immediate interrupt due to the edge transition it produces.
1182 * This single interrupt gives us a "fast poll" for drives that
1183 * recover from reset very quickly, saving us the first 50ms wait time.
1184 */
1185 /* set SRST and nIEN */
1186 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1187 /* more than enough time */
1188 udelay(10);
1189 if (drive->quirk_list == 2) {
1190 /* clear SRST and nIEN */
1191 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1192 } else {
1193 /* clear SRST, leave nIEN */
1194 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1195 }
1196 /* more than enough time */
1197 udelay(10);
1198 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1199 hwgroup->polling = 1;
1200 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1201
1202 /*
1203 * Some weird controller like resetting themselves to a strange
1204 * state when the disks are reset this way. At least, the Winbond
1205 * 553 documentation says that
1206 */
1207 if (hwif->resetproc != NULL) {
1208 hwif->resetproc(drive);
1209 }
1210
1211#endif /* OK_TO_RESET_CONTROLLER */
1212
1213 spin_unlock_irqrestore(&ide_lock, flags);
1214 return ide_started;
1215}
1216
1217/*
1218 * ide_do_reset() is the entry point to the drive/interface reset code.
1219 */
1220
1221ide_startstop_t ide_do_reset (ide_drive_t *drive)
1222{
1223 return do_reset1(drive, 0);
1224}
1225
1226EXPORT_SYMBOL(ide_do_reset);
1227
1228/*
1229 * ide_wait_not_busy() waits for the currently selected device on the hwif
1230 * to report a non-busy status, see comments in probe_hwif().
1231 */
1232int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1233{
1234 u8 stat = 0;
1235
1236 while(timeout--) {
1237 /*
1238 * Turn this into a schedule() sleep once I'm sure
1239 * about locking issues (2.5 work ?).
1240 */
1241 mdelay(1);
1242 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1243 if ((stat & BUSY_STAT) == 0)
1244 return 0;
1245 /*
1246 * Assume a value of 0xff means nothing is connected to
1247 * the interface and it doesn't implement the pull-down
1248 * resistor on D7.
1249 */
1250 if (stat == 0xff)
1251 return -ENODEV;
1252 }
1253 return -EBUSY;
1254}
1255
1256EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1257