blob: dd2dc1d7d3bb89dac6a9335e7358c14e158a97c8 [file] [log] [blame]
Anji Jonnala022dcaa2012-09-06 13:49:42 +05301/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/cpuidle.h>
Ashwin Chaugule464983a2011-11-21 14:51:51 -050017#include <linux/cpu_pm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080019#include <mach/cpuidle.h>
Matt Wagantall7cca4642012-02-01 16:43:24 -080020
21#include "pm.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022
23static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuidle_device, msm_cpuidle_devs);
Steve Mucklef132c6c2012-06-06 18:30:57 -070024
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025static struct cpuidle_driver msm_cpuidle_driver = {
26 .name = "msm_idle",
27 .owner = THIS_MODULE,
28};
29
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060030static struct msm_cpuidle_state msm_cstates[] = {
31 {0, 0, "C0", "WFI",
32 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
33
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060034 {0, 1, "C1", "RETENTION",
35 MSM_PM_SLEEP_MODE_RETENTION},
36
37 {0, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060038 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
39
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060040 {0, 3, "C3", "POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060041 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
42
43 {1, 0, "C0", "WFI",
44 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
45
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060046 {1, 1, "C1", "RETENTION",
47 MSM_PM_SLEEP_MODE_RETENTION},
48
49 {1, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060050 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
51
52 {2, 0, "C0", "WFI",
53 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
54
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060055 {2, 1, "C1", "RETENTION",
56 MSM_PM_SLEEP_MODE_RETENTION},
57
58 {2, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060059 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
60
61 {3, 0, "C0", "WFI",
62 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
63
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060064 {3, 1, "C1", "RETENTION",
65 MSM_PM_SLEEP_MODE_RETENTION},
66
67 {3, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060068 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
69};
70
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070071static int msm_cpuidle_enter(
Steve Mucklef132c6c2012-06-06 18:30:57 -070072 struct cpuidle_device *dev, struct cpuidle_driver *drv, int index)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070073{
Steve Mucklef132c6c2012-06-06 18:30:57 -070074 int ret = 0;
75 int i = 0;
76 enum msm_pm_sleep_mode pm_mode;
77 struct cpuidle_state_usage *st_usage = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070078
Ashwin Chaugule464983a2011-11-21 14:51:51 -050079#ifdef CONFIG_CPU_PM
80 cpu_pm_enter();
81#endif
Steve Mucklef132c6c2012-06-06 18:30:57 -070082
83 pm_mode = msm_pm_idle_prepare(dev, drv, index);
Anji Jonnala022dcaa2012-09-06 13:49:42 +053084 dev->last_residency = msm_pm_idle_enter(pm_mode);
Steve Mucklef132c6c2012-06-06 18:30:57 -070085 for (i = 0; i < dev->state_count; i++) {
86 st_usage = &dev->states_usage[i];
87 if ((enum msm_pm_sleep_mode) cpuidle_get_statedata(st_usage)
88 == pm_mode) {
89 ret = i;
90 break;
91 }
92 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093
Ashwin Chaugule464983a2011-11-21 14:51:51 -050094#ifdef CONFIG_CPU_PM
95 cpu_pm_exit();
96#endif
97
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070098 local_irq_enable();
99
100 return ret;
101}
102
Praveen Chidambaram42da9d22012-03-30 12:16:34 -0600103static void __init msm_cpuidle_set_states(void)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700104{
Steve Mucklef132c6c2012-06-06 18:30:57 -0700105 int i = 0;
106 int state_count = 0;
107 struct msm_cpuidle_state *cstate = NULL;
108 struct cpuidle_state *state = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109
Steve Mucklef132c6c2012-06-06 18:30:57 -0700110 for (i = 0; i < ARRAY_SIZE(msm_cstates); i++) {
111 cstate = &msm_cstates[i];
112 /* We have an asymmetric CPU C-State in MSMs.
113 * The primary CPU can do PC while all secondary cpus
114 * can only do standalone PC as part of their idle LPM.
115 * However, the secondary cpus can do PC when hotplugged
116 * We do not care about the hotplug here.
117 * Register the C-States available for Core0.
118 */
119 if (cstate->cpu)
120 continue;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Steve Mucklef132c6c2012-06-06 18:30:57 -0700122 state = &msm_cpuidle_driver.states[state_count];
123 snprintf(state->name, CPUIDLE_NAME_LEN, cstate->name);
124 snprintf(state->desc, CPUIDLE_DESC_LEN, cstate->desc);
125 state->flags = 0;
126 state->exit_latency = 0;
127 state->power_usage = 0;
128 state->target_residency = 0;
129 state->enter = msm_cpuidle_enter;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700130
Steve Mucklef132c6c2012-06-06 18:30:57 -0700131 state_count++;
132 BUG_ON(state_count >= CPUIDLE_STATE_MAX);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700133 }
Steve Mucklef132c6c2012-06-06 18:30:57 -0700134 msm_cpuidle_driver.state_count = state_count;
135 msm_cpuidle_driver.safe_state_index = 0;
136}
137
138static void __init msm_cpuidle_set_cpu_statedata(struct cpuidle_device *dev)
139{
140 int i = 0;
141 int state_count = 0;
142 struct cpuidle_state_usage *st_usage = NULL;
143 struct msm_cpuidle_state *cstate = NULL;
144
145 for (i = 0; i < ARRAY_SIZE(msm_cstates); i++) {
146 cstate = &msm_cstates[i];
147 if (cstate->cpu != dev->cpu)
148 continue;
149
150 st_usage = &dev->states_usage[state_count];
151 cpuidle_set_statedata(st_usage, (void *)cstate->mode_nr);
152 state_count++;
153 BUG_ON(state_count > msm_cpuidle_driver.state_count);
154 }
155
156 dev->state_count = state_count; /* Per cpu state count */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700157}
158
159int __init msm_cpuidle_init(void)
160{
Steve Mucklef132c6c2012-06-06 18:30:57 -0700161 unsigned int cpu = 0;
162 int ret = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700163
Praveen Chidambaram42da9d22012-03-30 12:16:34 -0600164 msm_cpuidle_set_states();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700165 ret = cpuidle_register_driver(&msm_cpuidle_driver);
166 if (ret)
167 pr_err("%s: failed to register cpuidle driver: %d\n",
168 __func__, ret);
169
170 for_each_possible_cpu(cpu) {
171 struct cpuidle_device *dev = &per_cpu(msm_cpuidle_devs, cpu);
172
Steve Mucklef132c6c2012-06-06 18:30:57 -0700173 dev->cpu = cpu;
174 msm_cpuidle_set_cpu_statedata(dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700175 ret = cpuidle_register_device(dev);
176 if (ret) {
177 pr_err("%s: failed to register cpuidle device for "
178 "cpu %u: %d\n", __func__, cpu, ret);
179 return ret;
180 }
181 }
182
183 return 0;
184}