Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 1 | /* |
| 2 | * i8259 interrupt controller driver. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * as published by the Free Software Foundation; either version |
| 7 | * 2 of the License, or (at your option) any later version. |
| 8 | */ |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 9 | #undef DEBUG |
| 10 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/init.h> |
| 12 | #include <linux/ioport.h> |
| 13 | #include <linux/interrupt.h> |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <asm/io.h> |
| 17 | #include <asm/i8259.h> |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 18 | #include <asm/prom.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 20 | static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 22 | static unsigned char cached_8259[2] = { 0xff, 0xff }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #define cached_A1 (cached_8259[0]) |
| 24 | #define cached_21 (cached_8259[1]) |
| 25 | |
| 26 | static DEFINE_SPINLOCK(i8259_lock); |
| 27 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 28 | static struct irq_host *i8259_host; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
| 30 | /* |
| 31 | * Acknowledge the IRQ using either the PCI host bridge's interrupt |
| 32 | * acknowledge feature or poll. How i8259_init() is called determines |
| 33 | * which is called. It should be noted that polling is broken on some |
| 34 | * IBM and Motorola PReP boxes so we must use the int-ack feature on them. |
| 35 | */ |
Olaf Hering | 35a84c2 | 2006-10-07 22:08:26 +1000 | [diff] [blame] | 36 | unsigned int i8259_irq(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | { |
| 38 | int irq; |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 39 | int lock = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
| 41 | /* Either int-ack or poll for the IRQ */ |
| 42 | if (pci_intack) |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 43 | irq = readb(pci_intack); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | else { |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 45 | spin_lock(&i8259_lock); |
| 46 | lock = 1; |
| 47 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | /* Perform an interrupt acknowledge cycle on controller 1. */ |
| 49 | outb(0x0C, 0x20); /* prepare for poll */ |
| 50 | irq = inb(0x20) & 7; |
| 51 | if (irq == 2 ) { |
| 52 | /* |
| 53 | * Interrupt is cascaded so perform interrupt |
| 54 | * acknowledge on controller 2. |
| 55 | */ |
| 56 | outb(0x0C, 0xA0); /* prepare for poll */ |
| 57 | irq = (inb(0xA0) & 7) + 8; |
| 58 | } |
| 59 | } |
| 60 | |
| 61 | if (irq == 7) { |
| 62 | /* |
| 63 | * This may be a spurious interrupt. |
| 64 | * |
| 65 | * Read the interrupt status register (ISR). If the most |
| 66 | * significant bit is not set then there is no valid |
| 67 | * interrupt. |
| 68 | */ |
| 69 | if (!pci_intack) |
| 70 | outb(0x0B, 0x20); /* ISR register */ |
| 71 | if(~inb(0x20) & 0x80) |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 72 | irq = NO_IRQ; |
| 73 | } else if (irq == 0xff) |
| 74 | irq = NO_IRQ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 76 | if (lock) |
| 77 | spin_unlock(&i8259_lock); |
| 78 | return irq; |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 79 | } |
| 80 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | static void i8259_mask_and_ack_irq(unsigned int irq_nr) |
| 82 | { |
| 83 | unsigned long flags; |
| 84 | |
| 85 | spin_lock_irqsave(&i8259_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | if (irq_nr > 7) { |
| 87 | cached_A1 |= 1 << (irq_nr-8); |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 88 | inb(0xA1); /* DUMMY */ |
| 89 | outb(cached_A1, 0xA1); |
| 90 | outb(0x20, 0xA0); /* Non-specific EOI */ |
| 91 | outb(0x20, 0x20); /* Non-specific EOI to cascade */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | } else { |
| 93 | cached_21 |= 1 << irq_nr; |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 94 | inb(0x21); /* DUMMY */ |
| 95 | outb(cached_21, 0x21); |
| 96 | outb(0x20, 0x20); /* Non-specific EOI */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | } |
| 98 | spin_unlock_irqrestore(&i8259_lock, flags); |
| 99 | } |
| 100 | |
| 101 | static void i8259_set_irq_mask(int irq_nr) |
| 102 | { |
| 103 | outb(cached_A1,0xA1); |
| 104 | outb(cached_21,0x21); |
| 105 | } |
| 106 | |
| 107 | static void i8259_mask_irq(unsigned int irq_nr) |
| 108 | { |
| 109 | unsigned long flags; |
| 110 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 111 | pr_debug("i8259_mask_irq(%d)\n", irq_nr); |
| 112 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | spin_lock_irqsave(&i8259_lock, flags); |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 114 | if (irq_nr < 8) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | cached_21 |= 1 << irq_nr; |
| 116 | else |
| 117 | cached_A1 |= 1 << (irq_nr-8); |
| 118 | i8259_set_irq_mask(irq_nr); |
| 119 | spin_unlock_irqrestore(&i8259_lock, flags); |
| 120 | } |
| 121 | |
| 122 | static void i8259_unmask_irq(unsigned int irq_nr) |
| 123 | { |
| 124 | unsigned long flags; |
| 125 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 126 | pr_debug("i8259_unmask_irq(%d)\n", irq_nr); |
| 127 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | spin_lock_irqsave(&i8259_lock, flags); |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 129 | if (irq_nr < 8) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | cached_21 &= ~(1 << irq_nr); |
| 131 | else |
| 132 | cached_A1 &= ~(1 << (irq_nr-8)); |
| 133 | i8259_set_irq_mask(irq_nr); |
| 134 | spin_unlock_irqrestore(&i8259_lock, flags); |
| 135 | } |
| 136 | |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 137 | static struct irq_chip i8259_pic = { |
| 138 | .typename = " i8259 ", |
| 139 | .mask = i8259_mask_irq, |
Aurelien Jarno | 3a800ff | 2007-10-23 23:06:38 +1000 | [diff] [blame] | 140 | .disable = i8259_mask_irq, |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 141 | .unmask = i8259_unmask_irq, |
| 142 | .mask_ack = i8259_mask_and_ack_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | }; |
| 144 | |
| 145 | static struct resource pic1_iores = { |
| 146 | .name = "8259 (master)", |
| 147 | .start = 0x20, |
| 148 | .end = 0x21, |
| 149 | .flags = IORESOURCE_BUSY, |
| 150 | }; |
| 151 | |
| 152 | static struct resource pic2_iores = { |
| 153 | .name = "8259 (slave)", |
| 154 | .start = 0xa0, |
| 155 | .end = 0xa1, |
| 156 | .flags = IORESOURCE_BUSY, |
| 157 | }; |
| 158 | |
| 159 | static struct resource pic_edgectrl_iores = { |
| 160 | .name = "8259 edge control", |
| 161 | .start = 0x4d0, |
| 162 | .end = 0x4d1, |
| 163 | .flags = IORESOURCE_BUSY, |
| 164 | }; |
| 165 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 166 | static int i8259_host_match(struct irq_host *h, struct device_node *node) |
| 167 | { |
Michael Ellerman | 52964f8 | 2007-08-28 18:47:54 +1000 | [diff] [blame] | 168 | return h->of_node == NULL || h->of_node == node; |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 169 | } |
| 170 | |
| 171 | static int i8259_host_map(struct irq_host *h, unsigned int virq, |
Benjamin Herrenschmidt | 6e99e45 | 2006-07-10 04:44:42 -0700 | [diff] [blame] | 172 | irq_hw_number_t hw) |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 173 | { |
| 174 | pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw); |
| 175 | |
| 176 | /* We block the internal cascade */ |
| 177 | if (hw == 2) |
| 178 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; |
| 179 | |
Benjamin Herrenschmidt | 6e99e45 | 2006-07-10 04:44:42 -0700 | [diff] [blame] | 180 | /* We use the level handler only for now, we might want to |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 181 | * be more cautious here but that works for now |
| 182 | */ |
| 183 | get_irq_desc(virq)->status |= IRQ_LEVEL; |
| 184 | set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | static void i8259_host_unmap(struct irq_host *h, unsigned int virq) |
| 189 | { |
| 190 | /* Make sure irq is masked in hardware */ |
| 191 | i8259_mask_irq(virq); |
| 192 | |
| 193 | /* remove chip and handler */ |
| 194 | set_irq_chip_and_handler(virq, NULL, NULL); |
| 195 | |
| 196 | /* Make sure it's completed */ |
| 197 | synchronize_irq(virq); |
| 198 | } |
| 199 | |
| 200 | static int i8259_host_xlate(struct irq_host *h, struct device_node *ct, |
| 201 | u32 *intspec, unsigned int intsize, |
| 202 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
| 203 | { |
| 204 | static unsigned char map_isa_senses[4] = { |
| 205 | IRQ_TYPE_LEVEL_LOW, |
| 206 | IRQ_TYPE_LEVEL_HIGH, |
| 207 | IRQ_TYPE_EDGE_FALLING, |
| 208 | IRQ_TYPE_EDGE_RISING, |
| 209 | }; |
| 210 | |
| 211 | *out_hwirq = intspec[0]; |
| 212 | if (intsize > 1 && intspec[1] < 4) |
| 213 | *out_flags = map_isa_senses[intspec[1]]; |
| 214 | else |
| 215 | *out_flags = IRQ_TYPE_NONE; |
| 216 | |
| 217 | return 0; |
| 218 | } |
| 219 | |
| 220 | static struct irq_host_ops i8259_host_ops = { |
| 221 | .match = i8259_host_match, |
| 222 | .map = i8259_host_map, |
| 223 | .unmap = i8259_host_unmap, |
| 224 | .xlate = i8259_host_xlate, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | }; |
| 226 | |
Benjamin Herrenschmidt | f4d4c35 | 2006-10-25 13:22:27 +1000 | [diff] [blame] | 227 | struct irq_host *i8259_get_host(void) |
| 228 | { |
| 229 | return i8259_host; |
| 230 | } |
| 231 | |
Michael Ellerman | 40681b9 | 2006-08-02 11:13:50 +1000 | [diff] [blame] | 232 | /** |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 233 | * i8259_init - Initialize the legacy controller |
| 234 | * @node: device node of the legacy PIC (can be NULL, but then, it will match |
| 235 | * all interrupts, so beware) |
| 236 | * @intack_addr: PCI interrupt acknowledge (real) address which will return |
| 237 | * the active irq from the 8259 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 238 | */ |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 239 | void i8259_init(struct device_node *node, unsigned long intack_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | { |
| 241 | unsigned long flags; |
| 242 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 243 | /* initialize the controller */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | spin_lock_irqsave(&i8259_lock, flags); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 245 | |
| 246 | /* Mask all first */ |
| 247 | outb(0xff, 0xA1); |
| 248 | outb(0xff, 0x21); |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 249 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | /* init master interrupt controller */ |
| 251 | outb(0x11, 0x20); /* Start init sequence */ |
| 252 | outb(0x00, 0x21); /* Vector base */ |
| 253 | outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */ |
| 254 | outb(0x01, 0x21); /* Select 8086 mode */ |
| 255 | |
| 256 | /* init slave interrupt controller */ |
| 257 | outb(0x11, 0xA0); /* Start init sequence */ |
| 258 | outb(0x08, 0xA1); /* Vector base */ |
| 259 | outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ |
| 260 | outb(0x01, 0xA1); /* Select 8086 mode */ |
| 261 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 262 | /* That thing is slow */ |
| 263 | udelay(100); |
| 264 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | /* always read ISR */ |
| 266 | outb(0x0B, 0x20); |
| 267 | outb(0x0B, 0xA0); |
| 268 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 269 | /* Unmask the internal cascade */ |
| 270 | cached_21 &= ~(1 << 2); |
| 271 | |
| 272 | /* Set interrupt masks */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | outb(cached_A1, 0xA1); |
| 274 | outb(cached_21, 0x21); |
| 275 | |
| 276 | spin_unlock_irqrestore(&i8259_lock, flags); |
| 277 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 278 | /* create a legacy host */ |
Michael Ellerman | 19fc65b | 2008-05-26 12:12:32 +1000 | [diff] [blame] | 279 | i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, |
Michael Ellerman | 52964f8 | 2007-08-28 18:47:54 +1000 | [diff] [blame] | 280 | 0, &i8259_host_ops, 0); |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 281 | if (i8259_host == NULL) { |
| 282 | printk(KERN_ERR "i8259: failed to allocate irq host !\n"); |
| 283 | return; |
Benjamin Herrenschmidt | b9e5b4e | 2006-07-03 19:32:51 +1000 | [diff] [blame] | 284 | } |
David Woodhouse | 9d2ba6f | 2005-11-05 17:54:22 +0000 | [diff] [blame] | 285 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | /* reserve our resources */ |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 287 | /* XXX should we continue doing that ? it seems to cause problems |
| 288 | * with further requesting of PCI IO resources for that range... |
| 289 | * need to look into it. |
| 290 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | request_resource(&ioport_resource, &pic1_iores); |
| 292 | request_resource(&ioport_resource, &pic2_iores); |
| 293 | request_resource(&ioport_resource, &pic_edgectrl_iores); |
| 294 | |
| 295 | if (intack_addr != 0) |
| 296 | pci_intack = ioremap(intack_addr, 1); |
Paul Mackerras | f9bd170 | 2005-10-26 16:47:42 +1000 | [diff] [blame] | 297 | |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 298 | printk(KERN_INFO "i8259 legacy interrupt controller initialized\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | } |