blob: 96dcbac9545e9fe81e0d6b4a61a7e971c8de9ac3 [file] [log] [blame]
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001/*
2 * SuperTrak EX Series Storage Controller driver for Linux
3 *
4 * Copyright (C) 2005, 2006 Promise Technology Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Written By:
12 * Ed Lin <promise_linux@promise.com>
13 *
Jeff Garzik5a25ba12006-09-01 03:12:19 -040014 */
15
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/delay.h>
Jeff Garzik5a25ba12006-09-01 03:12:19 -040020#include <linux/time.h>
21#include <linux/pci.h>
22#include <linux/blkdev.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/module.h>
26#include <linux/spinlock.h>
27#include <asm/io.h>
28#include <asm/irq.h>
29#include <asm/byteorder.h>
30#include <scsi/scsi.h>
31#include <scsi/scsi_device.h>
32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_host.h>
Ed Lincf355882006-09-01 14:31:51 +080034#include <scsi/scsi_tcq.h>
Jeff Garzik5a25ba12006-09-01 03:12:19 -040035
36#define DRV_NAME "stex"
Ed Linfebb6312006-12-04 17:49:46 -080037#define ST_DRIVER_VERSION "3.1.0.1"
Ed Linfb4f66b2006-09-27 19:23:41 +080038#define ST_VER_MAJOR 3
Ed Linfebb6312006-12-04 17:49:46 -080039#define ST_VER_MINOR 1
Jeff Garzik5a25ba12006-09-01 03:12:19 -040040#define ST_OEM 0
Ed Linfb4f66b2006-09-27 19:23:41 +080041#define ST_BUILD_VER 1
Jeff Garzik5a25ba12006-09-01 03:12:19 -040042
43enum {
44 /* MU register offset */
45 IMR0 = 0x10, /* MU_INBOUND_MESSAGE_REG0 */
46 IMR1 = 0x14, /* MU_INBOUND_MESSAGE_REG1 */
47 OMR0 = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
48 OMR1 = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
49 IDBL = 0x20, /* MU_INBOUND_DOORBELL */
50 IIS = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
51 IIM = 0x28, /* MU_INBOUND_INTERRUPT_MASK */
52 ODBL = 0x2c, /* MU_OUTBOUND_DOORBELL */
53 OIS = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
54 OIM = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
55
56 /* MU register value */
57 MU_INBOUND_DOORBELL_HANDSHAKE = 1,
58 MU_INBOUND_DOORBELL_REQHEADCHANGED = 2,
59 MU_INBOUND_DOORBELL_STATUSTAILCHANGED = 4,
60 MU_INBOUND_DOORBELL_HMUSTOPPED = 8,
61 MU_INBOUND_DOORBELL_RESET = 16,
62
63 MU_OUTBOUND_DOORBELL_HANDSHAKE = 1,
64 MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2,
65 MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED = 4,
66 MU_OUTBOUND_DOORBELL_BUSCHANGE = 8,
67 MU_OUTBOUND_DOORBELL_HASEVENT = 16,
68
69 /* MU status code */
70 MU_STATE_STARTING = 1,
71 MU_STATE_FMU_READY_FOR_HANDSHAKE = 2,
72 MU_STATE_SEND_HANDSHAKE_FRAME = 3,
73 MU_STATE_STARTED = 4,
74 MU_STATE_RESETTING = 5,
75
Ed Lin76fbf962006-12-04 17:49:42 -080076 MU_MAX_DELAY = 120,
Jeff Garzik5a25ba12006-09-01 03:12:19 -040077 MU_HANDSHAKE_SIGNATURE = 0x55aaaa55,
Ed Lin529e7a62006-12-04 17:49:34 -080078 MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000,
Ed Lin76fbf962006-12-04 17:49:42 -080079 MU_HARD_RESET_WAIT = 30000,
Jeff Garzik5a25ba12006-09-01 03:12:19 -040080 HMU_PARTNER_TYPE = 2,
81
82 /* firmware returned values */
83 SRB_STATUS_SUCCESS = 0x01,
84 SRB_STATUS_ERROR = 0x04,
85 SRB_STATUS_BUSY = 0x05,
86 SRB_STATUS_INVALID_REQUEST = 0x06,
87 SRB_STATUS_SELECTION_TIMEOUT = 0x0A,
88 SRB_SEE_SENSE = 0x80,
89
90 /* task attribute */
91 TASK_ATTRIBUTE_SIMPLE = 0x0,
92 TASK_ATTRIBUTE_HEADOFQUEUE = 0x1,
93 TASK_ATTRIBUTE_ORDERED = 0x2,
94 TASK_ATTRIBUTE_ACA = 0x4,
95
96 /* request count, etc. */
97 MU_MAX_REQUEST = 32,
Jeff Garzik5a25ba12006-09-01 03:12:19 -040098
99 /* one message wasted, use MU_MAX_REQUEST+1
100 to handle MU_MAX_REQUEST messages */
101 MU_REQ_COUNT = (MU_MAX_REQUEST + 1),
102 MU_STATUS_COUNT = (MU_MAX_REQUEST + 1),
103
104 STEX_CDB_LENGTH = MAX_COMMAND_SIZE,
105 REQ_VARIABLE_LEN = 1024,
106 STATUS_VAR_LEN = 128,
107 ST_CAN_QUEUE = MU_MAX_REQUEST,
108 ST_CMD_PER_LUN = MU_MAX_REQUEST,
109 ST_MAX_SG = 32,
110
111 /* sg flags */
112 SG_CF_EOT = 0x80, /* end of table */
113 SG_CF_64B = 0x40, /* 64 bit item */
114 SG_CF_HOST = 0x20, /* sg in host memory */
115
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400116 st_shasta = 0,
117 st_vsc = 1,
Ed Lin94e91082006-12-04 17:49:39 -0800118 st_vsc1 = 2,
119 st_yosemite = 3,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400120
121 PASSTHRU_REQ_TYPE = 0x00000001,
122 PASSTHRU_REQ_NO_WAKEUP = 0x00000100,
123 ST_INTERNAL_TIMEOUT = 30,
124
Ed Linfb4f66b2006-09-27 19:23:41 +0800125 ST_TO_CMD = 0,
126 ST_FROM_CMD = 1,
127
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400128 /* vendor specific commands of Promise */
Ed Linfb4f66b2006-09-27 19:23:41 +0800129 MGT_CMD = 0xd8,
130 SINBAND_MGT_CMD = 0xd9,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400131 ARRAY_CMD = 0xe0,
132 CONTROLLER_CMD = 0xe1,
133 DEBUGGING_CMD = 0xe2,
134 PASSTHRU_CMD = 0xe3,
135
136 PASSTHRU_GET_ADAPTER = 0x05,
137 PASSTHRU_GET_DRVVER = 0x10,
Ed Linfb4f66b2006-09-27 19:23:41 +0800138
139 CTLR_CONFIG_CMD = 0x03,
140 CTLR_SHUTDOWN = 0x0d,
141
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400142 CTLR_POWER_STATE_CHANGE = 0x0e,
143 CTLR_POWER_SAVING = 0x01,
144
145 PASSTHRU_SIGNATURE = 0x4e415041,
Ed Linfb4f66b2006-09-27 19:23:41 +0800146 MGT_CMD_SIGNATURE = 0xba,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400147
148 INQUIRY_EVPD = 0x01,
Ed Lin94e91082006-12-04 17:49:39 -0800149
150 ST_ADDITIONAL_MEM = 0x200000,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400151};
152
Ed Linfb4f66b2006-09-27 19:23:41 +0800153/* SCSI inquiry data */
154typedef struct st_inq {
155 u8 DeviceType :5;
156 u8 DeviceTypeQualifier :3;
157 u8 DeviceTypeModifier :7;
158 u8 RemovableMedia :1;
159 u8 Versions;
160 u8 ResponseDataFormat :4;
161 u8 HiSupport :1;
162 u8 NormACA :1;
163 u8 ReservedBit :1;
164 u8 AERC :1;
165 u8 AdditionalLength;
166 u8 Reserved[2];
167 u8 SoftReset :1;
168 u8 CommandQueue :1;
169 u8 Reserved2 :1;
170 u8 LinkedCommands :1;
171 u8 Synchronous :1;
172 u8 Wide16Bit :1;
173 u8 Wide32Bit :1;
174 u8 RelativeAddressing :1;
175 u8 VendorId[8];
176 u8 ProductId[16];
177 u8 ProductRevisionLevel[4];
178 u8 VendorSpecific[20];
179 u8 Reserved3[40];
180} ST_INQ;
181
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400182struct st_sgitem {
183 u8 ctrl; /* SG_CF_xxx */
184 u8 reserved[3];
185 __le32 count;
186 __le32 addr;
187 __le32 addr_hi;
188};
189
190struct st_sgtable {
191 __le16 sg_count;
192 __le16 max_sg_count;
193 __le32 sz_in_byte;
194 struct st_sgitem table[ST_MAX_SG];
195};
196
197struct handshake_frame {
198 __le32 rb_phy; /* request payload queue physical address */
199 __le32 rb_phy_hi;
200 __le16 req_sz; /* size of each request payload */
201 __le16 req_cnt; /* count of reqs the buffer can hold */
202 __le16 status_sz; /* size of each status payload */
203 __le16 status_cnt; /* count of status the buffer can hold */
204 __le32 hosttime; /* seconds from Jan 1, 1970 (GMT) */
205 __le32 hosttime_hi;
206 u8 partner_type; /* who sends this frame */
207 u8 reserved0[7];
208 __le32 partner_ver_major;
209 __le32 partner_ver_minor;
210 __le32 partner_ver_oem;
211 __le32 partner_ver_build;
Ed Lin94e91082006-12-04 17:49:39 -0800212 __le32 extra_offset; /* NEW */
213 __le32 extra_size; /* NEW */
214 u32 reserved1[2];
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400215};
216
217struct req_msg {
218 __le16 tag;
219 u8 lun;
220 u8 target;
221 u8 task_attr;
222 u8 task_manage;
223 u8 prd_entry;
Ed Linf903d7b72006-09-27 19:23:33 +0800224 u8 payload_sz; /* payload size in 4-byte, not used */
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400225 u8 cdb[STEX_CDB_LENGTH];
226 u8 variable[REQ_VARIABLE_LEN];
227};
228
229struct status_msg {
230 __le16 tag;
231 u8 lun;
232 u8 target;
233 u8 srb_status;
234 u8 scsi_status;
235 u8 reserved;
236 u8 payload_sz; /* payload size in 4-byte */
237 u8 variable[STATUS_VAR_LEN];
238};
239
240struct ver_info {
241 u32 major;
242 u32 minor;
243 u32 oem;
244 u32 build;
245 u32 reserved[2];
246};
247
248struct st_frame {
249 u32 base[6];
250 u32 rom_addr;
251
252 struct ver_info drv_ver;
253 struct ver_info bios_ver;
254
255 u32 bus;
256 u32 slot;
257 u32 irq_level;
258 u32 irq_vec;
259 u32 id;
260 u32 subid;
261
262 u32 dimm_size;
263 u8 dimm_type;
264 u8 reserved[3];
265
266 u32 channel;
267 u32 reserved1;
268};
269
270struct st_drvver {
271 u32 major;
272 u32 minor;
273 u32 oem;
274 u32 build;
275 u32 signature[2];
276 u8 console_id;
277 u8 host_no;
278 u8 reserved0[2];
279 u32 reserved[3];
280};
281
282#define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg))
283#define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg))
284#define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
Ed Linfb4f66b2006-09-27 19:23:41 +0800285#define STEX_EXTRA_SIZE max(sizeof(struct st_frame), sizeof(ST_INQ))
286#define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400287
288struct st_ccb {
289 struct req_msg *req;
290 struct scsi_cmnd *cmd;
291
292 void *sense_buffer;
293 unsigned int sense_bufflen;
294 int sg_count;
295
296 u32 req_type;
297 u8 srb_status;
298 u8 scsi_status;
299};
300
301struct st_hba {
302 void __iomem *mmio_base; /* iomapped PCI memory space */
303 void *dma_mem;
304 dma_addr_t dma_handle;
Ed Lin94e91082006-12-04 17:49:39 -0800305 size_t dma_size;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400306
307 struct Scsi_Host *host;
308 struct pci_dev *pdev;
309
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400310 u32 req_head;
311 u32 req_tail;
312 u32 status_head;
313 u32 status_tail;
314
315 struct status_msg *status_buffer;
316 void *copy_buffer; /* temp buffer for driver-handled commands */
317 struct st_ccb ccb[MU_MAX_REQUEST];
318 struct st_ccb *wait_ccb;
319 wait_queue_head_t waitq;
320
321 unsigned int mu_status;
322 int out_req_cnt;
323
324 unsigned int cardtype;
325};
326
327static const char console_inq_page[] =
328{
329 0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
330 0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20, /* "Promise " */
331 0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E, /* "RAID Con" */
332 0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20, /* "sole " */
333 0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20, /* "1.00 " */
334 0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D, /* "SX/RSAF-" */
335 0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20, /* "TE1.00 " */
336 0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
337};
338
339MODULE_AUTHOR("Ed Lin");
340MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
341MODULE_LICENSE("GPL");
342MODULE_VERSION(ST_DRIVER_VERSION);
343
344static void stex_gettime(__le32 *time)
345{
346 struct timeval tv;
347 do_gettimeofday(&tv);
348
349 *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
350 *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
351}
352
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400353static struct status_msg *stex_get_status(struct st_hba *hba)
354{
355 struct status_msg *status =
356 hba->status_buffer + hba->status_tail;
357
358 ++hba->status_tail;
359 hba->status_tail %= MU_STATUS_COUNT;
360
361 return status;
362}
363
364static void stex_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
365{
366 cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
367
368 cmd->sense_buffer[0] = 0x70; /* fixed format, current */
369 cmd->sense_buffer[2] = sk;
370 cmd->sense_buffer[7] = 18 - 8; /* additional sense length */
371 cmd->sense_buffer[12] = asc;
372 cmd->sense_buffer[13] = ascq;
373}
374
375static void stex_invalid_field(struct scsi_cmnd *cmd,
376 void (*done)(struct scsi_cmnd *))
377{
378 /* "Invalid field in cbd" */
379 stex_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0);
380 done(cmd);
381}
382
383static struct req_msg *stex_alloc_req(struct st_hba *hba)
384{
385 struct req_msg *req = ((struct req_msg *)hba->dma_mem) +
386 hba->req_head;
387
388 ++hba->req_head;
389 hba->req_head %= MU_REQ_COUNT;
390
391 return req;
392}
393
394static int stex_map_sg(struct st_hba *hba,
395 struct req_msg *req, struct st_ccb *ccb)
396{
397 struct pci_dev *pdev = hba->pdev;
398 struct scsi_cmnd *cmd;
399 dma_addr_t dma_handle;
400 struct scatterlist *src;
401 struct st_sgtable *dst;
402 int i;
403
404 cmd = ccb->cmd;
405 dst = (struct st_sgtable *)req->variable;
406 dst->max_sg_count = cpu_to_le16(ST_MAX_SG);
407 dst->sz_in_byte = cpu_to_le32(cmd->request_bufflen);
408
409 if (cmd->use_sg) {
410 int n_elem;
411
412 src = (struct scatterlist *) cmd->request_buffer;
413 n_elem = pci_map_sg(pdev, src,
414 cmd->use_sg, cmd->sc_data_direction);
415 if (n_elem <= 0)
416 return -EIO;
417
418 ccb->sg_count = n_elem;
419 dst->sg_count = cpu_to_le16((u16)n_elem);
420
421 for (i = 0; i < n_elem; i++, src++) {
422 dst->table[i].count = cpu_to_le32((u32)sg_dma_len(src));
423 dst->table[i].addr =
424 cpu_to_le32(sg_dma_address(src) & 0xffffffff);
425 dst->table[i].addr_hi =
426 cpu_to_le32((sg_dma_address(src) >> 16) >> 16);
427 dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST;
428 }
429 dst->table[--i].ctrl |= SG_CF_EOT;
430 return 0;
431 }
432
433 dma_handle = pci_map_single(pdev, cmd->request_buffer,
434 cmd->request_bufflen, cmd->sc_data_direction);
435 cmd->SCp.dma_handle = dma_handle;
436
437 ccb->sg_count = 1;
438 dst->sg_count = cpu_to_le16(1);
439 dst->table[0].addr = cpu_to_le32(dma_handle & 0xffffffff);
440 dst->table[0].addr_hi = cpu_to_le32((dma_handle >> 16) >> 16);
441 dst->table[0].count = cpu_to_le32((u32)cmd->request_bufflen);
442 dst->table[0].ctrl = SG_CF_EOT | SG_CF_64B | SG_CF_HOST;
443
444 return 0;
445}
446
447static void stex_internal_copy(struct scsi_cmnd *cmd,
Ed Linfb4f66b2006-09-27 19:23:41 +0800448 const void *src, size_t *count, int sg_count, int direction)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400449{
450 size_t lcount;
451 size_t len;
452 void *s, *d, *base = NULL;
453 if (*count > cmd->request_bufflen)
454 *count = cmd->request_bufflen;
455 lcount = *count;
456 while (lcount) {
457 len = lcount;
458 s = (void *)src;
459 if (cmd->use_sg) {
460 size_t offset = *count - lcount;
461 s += offset;
462 base = scsi_kmap_atomic_sg(cmd->request_buffer,
463 sg_count, &offset, &len);
464 if (base == NULL) {
465 *count -= lcount;
466 return;
467 }
468 d = base + offset;
469 } else
470 d = cmd->request_buffer;
471
Ed Linfb4f66b2006-09-27 19:23:41 +0800472 if (direction == ST_TO_CMD)
473 memcpy(d, s, len);
474 else
475 memcpy(s, d, len);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400476
477 lcount -= len;
478 if (cmd->use_sg)
479 scsi_kunmap_atomic_sg(base);
480 }
481}
482
483static int stex_direct_copy(struct scsi_cmnd *cmd,
484 const void *src, size_t count)
485{
486 struct st_hba *hba = (struct st_hba *) &cmd->device->host->hostdata[0];
487 size_t cp_len = count;
488 int n_elem = 0;
489
490 if (cmd->use_sg) {
491 n_elem = pci_map_sg(hba->pdev, cmd->request_buffer,
492 cmd->use_sg, cmd->sc_data_direction);
493 if (n_elem <= 0)
494 return 0;
495 }
496
Ed Linfb4f66b2006-09-27 19:23:41 +0800497 stex_internal_copy(cmd, src, &cp_len, n_elem, ST_TO_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400498
499 if (cmd->use_sg)
500 pci_unmap_sg(hba->pdev, cmd->request_buffer,
501 cmd->use_sg, cmd->sc_data_direction);
502 return cp_len == count;
503}
504
505static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
506{
507 struct st_frame *p;
508 size_t count = sizeof(struct st_frame);
509
510 p = hba->copy_buffer;
Ed Lin4eea9dc2006-12-04 17:49:28 -0800511 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_FROM_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400512 memset(p->base, 0, sizeof(u32)*6);
513 *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0);
514 p->rom_addr = 0;
515
516 p->drv_ver.major = ST_VER_MAJOR;
517 p->drv_ver.minor = ST_VER_MINOR;
518 p->drv_ver.oem = ST_OEM;
519 p->drv_ver.build = ST_BUILD_VER;
520
521 p->bus = hba->pdev->bus->number;
522 p->slot = hba->pdev->devfn;
523 p->irq_level = 0;
524 p->irq_vec = hba->pdev->irq;
525 p->id = hba->pdev->vendor << 16 | hba->pdev->device;
526 p->subid =
527 hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device;
528
Ed Linfb4f66b2006-09-27 19:23:41 +0800529 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_TO_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400530}
531
532static void
533stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
534{
535 req->tag = cpu_to_le16(tag);
536 req->task_attr = TASK_ATTRIBUTE_SIMPLE;
537 req->task_manage = 0; /* not supported yet */
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400538
539 hba->ccb[tag].req = req;
540 hba->out_req_cnt++;
541
542 writel(hba->req_head, hba->mmio_base + IMR0);
543 writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
544 readl(hba->mmio_base + IDBL); /* flush */
545}
546
547static int
Ed Lincf355882006-09-01 14:31:51 +0800548stex_slave_alloc(struct scsi_device *sdev)
549{
550 /* Cheat: usually extracted from Inquiry data */
551 sdev->tagged_supported = 1;
552
553 scsi_activate_tcq(sdev, sdev->host->can_queue);
554
555 return 0;
556}
557
558static int
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400559stex_slave_config(struct scsi_device *sdev)
560{
561 sdev->use_10_for_rw = 1;
562 sdev->use_10_for_ms = 1;
563 sdev->timeout = 60 * HZ;
Ed Lincf355882006-09-01 14:31:51 +0800564 sdev->tagged_supported = 1;
565
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400566 return 0;
567}
568
569static void
570stex_slave_destroy(struct scsi_device *sdev)
571{
Ed Lincf355882006-09-01 14:31:51 +0800572 scsi_deactivate_tcq(sdev, 1);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400573}
574
575static int
576stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
577{
578 struct st_hba *hba;
579 struct Scsi_Host *host;
580 unsigned int id,lun;
581 struct req_msg *req;
582 u16 tag;
583 host = cmd->device->host;
584 id = cmd->device->id;
Ed Line0b2e592007-05-09 20:50:33 -0800585 lun = cmd->device->lun;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400586 hba = (struct st_hba *) &host->hostdata[0];
587
588 switch (cmd->cmnd[0]) {
589 case MODE_SENSE_10:
590 {
591 static char ms10_caching_page[12] =
592 { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
593 unsigned char page;
594 page = cmd->cmnd[2] & 0x3f;
595 if (page == 0x8 || page == 0x3f) {
596 stex_direct_copy(cmd, ms10_caching_page,
597 sizeof(ms10_caching_page));
598 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
599 done(cmd);
600 } else
601 stex_invalid_field(cmd, done);
602 return 0;
603 }
Ed Line0b2e592007-05-09 20:50:33 -0800604 case REPORT_LUNS:
605 /*
606 * The shasta firmware does not report actual luns in the
607 * target, so fail the command to force sequential lun scan.
608 * Also, the console device does not support this command.
609 */
610 if (hba->cardtype == st_shasta || id == host->max_id - 1) {
611 stex_invalid_field(cmd, done);
612 return 0;
613 }
614 break;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400615 case INQUIRY:
Ed Line0b2e592007-05-09 20:50:33 -0800616 if (id != host->max_id - 1)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400617 break;
618 if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
619 stex_direct_copy(cmd, console_inq_page,
620 sizeof(console_inq_page));
621 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
622 done(cmd);
623 } else
624 stex_invalid_field(cmd, done);
625 return 0;
626 case PASSTHRU_CMD:
627 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
628 struct st_drvver ver;
629 ver.major = ST_VER_MAJOR;
630 ver.minor = ST_VER_MINOR;
631 ver.oem = ST_OEM;
632 ver.build = ST_BUILD_VER;
633 ver.signature[0] = PASSTHRU_SIGNATURE;
Ed Line0b2e592007-05-09 20:50:33 -0800634 ver.console_id = host->max_id - 1;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400635 ver.host_no = hba->host->host_no;
636 cmd->result = stex_direct_copy(cmd, &ver, sizeof(ver)) ?
637 DID_OK << 16 | COMMAND_COMPLETE << 8 :
638 DID_ERROR << 16 | COMMAND_COMPLETE << 8;
639 done(cmd);
640 return 0;
641 }
642 default:
643 break;
644 }
645
646 cmd->scsi_done = done;
647
Ed Lincf355882006-09-01 14:31:51 +0800648 tag = cmd->request->tag;
649
650 if (unlikely(tag >= host->can_queue))
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400651 return SCSI_MLQUEUE_HOST_BUSY;
652
653 req = stex_alloc_req(hba);
Ed Linfb4f66b2006-09-27 19:23:41 +0800654
Ed Line0b2e592007-05-09 20:50:33 -0800655 req->lun = lun;
656 req->target = id;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400657
658 /* cdb */
659 memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
660
661 hba->ccb[tag].cmd = cmd;
662 hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
663 hba->ccb[tag].sense_buffer = cmd->sense_buffer;
664 hba->ccb[tag].req_type = 0;
665
666 if (cmd->sc_data_direction != DMA_NONE)
667 stex_map_sg(hba, req, &hba->ccb[tag]);
668
669 stex_send_cmd(hba, req, tag);
670 return 0;
671}
672
673static void stex_unmap_sg(struct st_hba *hba, struct scsi_cmnd *cmd)
674{
675 if (cmd->sc_data_direction != DMA_NONE) {
676 if (cmd->use_sg)
677 pci_unmap_sg(hba->pdev, cmd->request_buffer,
678 cmd->use_sg, cmd->sc_data_direction);
679 else
680 pci_unmap_single(hba->pdev, cmd->SCp.dma_handle,
681 cmd->request_bufflen, cmd->sc_data_direction);
682 }
683}
684
685static void stex_scsi_done(struct st_ccb *ccb)
686{
687 struct scsi_cmnd *cmd = ccb->cmd;
688 int result;
689
690 if (ccb->srb_status == SRB_STATUS_SUCCESS || ccb->srb_status == 0) {
691 result = ccb->scsi_status;
692 switch (ccb->scsi_status) {
693 case SAM_STAT_GOOD:
694 result |= DID_OK << 16 | COMMAND_COMPLETE << 8;
695 break;
696 case SAM_STAT_CHECK_CONDITION:
697 result |= DRIVER_SENSE << 24;
698 break;
699 case SAM_STAT_BUSY:
700 result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
701 break;
702 default:
703 result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8;
704 break;
705 }
706 }
707 else if (ccb->srb_status & SRB_SEE_SENSE)
708 result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION;
709 else switch (ccb->srb_status) {
710 case SRB_STATUS_SELECTION_TIMEOUT:
711 result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8;
712 break;
713 case SRB_STATUS_BUSY:
714 result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
715 break;
716 case SRB_STATUS_INVALID_REQUEST:
717 case SRB_STATUS_ERROR:
718 default:
719 result = DID_ERROR << 16 | COMMAND_COMPLETE << 8;
720 break;
721 }
722
723 cmd->result = result;
724 cmd->scsi_done(cmd);
725}
726
727static void stex_copy_data(struct st_ccb *ccb,
728 struct status_msg *resp, unsigned int variable)
729{
730 size_t count = variable;
731 if (resp->scsi_status != SAM_STAT_GOOD) {
732 if (ccb->sense_buffer != NULL)
733 memcpy(ccb->sense_buffer, resp->variable,
734 min(variable, ccb->sense_bufflen));
735 return;
736 }
737
738 if (ccb->cmd == NULL)
739 return;
Ed Linfb4f66b2006-09-27 19:23:41 +0800740 stex_internal_copy(ccb->cmd,
741 resp->variable, &count, ccb->sg_count, ST_TO_CMD);
742}
743
744static void stex_ys_commands(struct st_hba *hba,
745 struct st_ccb *ccb, struct status_msg *resp)
746{
747 size_t count;
748
749 if (ccb->cmd->cmnd[0] == MGT_CMD &&
750 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
751 ccb->cmd->request_bufflen =
752 le32_to_cpu(*(__le32 *)&resp->variable[0]);
753 return;
754 }
755
756 if (resp->srb_status != 0)
757 return;
758
759 /* determine inquiry command status by DeviceTypeQualifier */
760 if (ccb->cmd->cmnd[0] == INQUIRY &&
761 resp->scsi_status == SAM_STAT_GOOD) {
762 ST_INQ *inq_data;
763
764 count = STEX_EXTRA_SIZE;
765 stex_internal_copy(ccb->cmd, hba->copy_buffer,
766 &count, ccb->sg_count, ST_FROM_CMD);
767 inq_data = (ST_INQ *)hba->copy_buffer;
768 if (inq_data->DeviceTypeQualifier != 0)
769 ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
770 else
771 ccb->srb_status = SRB_STATUS_SUCCESS;
Ed Linfb4f66b2006-09-27 19:23:41 +0800772 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400773}
774
775static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
776{
777 void __iomem *base = hba->mmio_base;
778 struct status_msg *resp;
779 struct st_ccb *ccb;
780 unsigned int size;
781 u16 tag;
782
783 if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))
784 return;
785
786 /* status payloads */
787 hba->status_head = readl(base + OMR1);
788 if (unlikely(hba->status_head >= MU_STATUS_COUNT)) {
789 printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n",
790 pci_name(hba->pdev));
791 return;
792 }
793
Ed Linfb4f66b2006-09-27 19:23:41 +0800794 /*
795 * it's not a valid status payload if:
796 * 1. there are no pending requests(e.g. during init stage)
797 * 2. there are some pending requests, but the controller is in
798 * reset status, and its type is not st_yosemite
799 * firmware of st_yosemite in reset status will return pending requests
800 * to driver, so we allow it to pass
801 */
802 if (unlikely(hba->out_req_cnt <= 0 ||
803 (hba->mu_status == MU_STATE_RESETTING &&
804 hba->cardtype != st_yosemite))) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400805 hba->status_tail = hba->status_head;
806 goto update_status;
807 }
808
809 while (hba->status_tail != hba->status_head) {
810 resp = stex_get_status(hba);
811 tag = le16_to_cpu(resp->tag);
Ed Lincf355882006-09-01 14:31:51 +0800812 if (unlikely(tag >= hba->host->can_queue)) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400813 printk(KERN_WARNING DRV_NAME
814 "(%s): invalid tag\n", pci_name(hba->pdev));
815 continue;
816 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400817
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400818 ccb = &hba->ccb[tag];
819 if (hba->wait_ccb == ccb)
820 hba->wait_ccb = NULL;
821 if (unlikely(ccb->req == NULL)) {
822 printk(KERN_WARNING DRV_NAME
823 "(%s): lagging req\n", pci_name(hba->pdev));
Ed Linfb4f66b2006-09-27 19:23:41 +0800824 hba->out_req_cnt--;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400825 continue;
826 }
827
828 size = resp->payload_sz * sizeof(u32); /* payload size */
829 if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
830 size > sizeof(*resp))) {
831 printk(KERN_WARNING DRV_NAME "(%s): bad status size\n",
832 pci_name(hba->pdev));
833 } else {
834 size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */
835 if (size)
836 stex_copy_data(ccb, resp, size);
837 }
838
839 ccb->srb_status = resp->srb_status;
840 ccb->scsi_status = resp->scsi_status;
841
Ed Lincf355882006-09-01 14:31:51 +0800842 if (likely(ccb->cmd != NULL)) {
Ed Linfb4f66b2006-09-27 19:23:41 +0800843 if (hba->cardtype == st_yosemite)
844 stex_ys_commands(hba, ccb, resp);
845
Ed Lincf355882006-09-01 14:31:51 +0800846 if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD &&
847 ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER))
848 stex_controller_info(hba, ccb);
Ed Linfb4f66b2006-09-27 19:23:41 +0800849
Ed Lincf355882006-09-01 14:31:51 +0800850 stex_unmap_sg(hba, ccb->cmd);
851 stex_scsi_done(ccb);
852 hba->out_req_cnt--;
853 } else if (ccb->req_type & PASSTHRU_REQ_TYPE) {
854 hba->out_req_cnt--;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400855 if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) {
856 ccb->req_type = 0;
857 continue;
858 }
859 ccb->req_type = 0;
860 if (waitqueue_active(&hba->waitq))
861 wake_up(&hba->waitq);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400862 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400863 }
864
865update_status:
866 writel(hba->status_head, base + IMR1);
867 readl(base + IMR1); /* flush */
868}
869
David Howells7d12e782006-10-05 14:55:46 +0100870static irqreturn_t stex_intr(int irq, void *__hba)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400871{
872 struct st_hba *hba = __hba;
873 void __iomem *base = hba->mmio_base;
874 u32 data;
875 unsigned long flags;
876 int handled = 0;
877
878 spin_lock_irqsave(hba->host->host_lock, flags);
879
880 data = readl(base + ODBL);
881
882 if (data && data != 0xffffffff) {
883 /* clear the interrupt */
884 writel(data, base + ODBL);
885 readl(base + ODBL); /* flush */
886 stex_mu_intr(hba, data);
887 handled = 1;
888 }
889
890 spin_unlock_irqrestore(hba->host->host_lock, flags);
891
892 return IRQ_RETVAL(handled);
893}
894
895static int stex_handshake(struct st_hba *hba)
896{
897 void __iomem *base = hba->mmio_base;
898 struct handshake_frame *h;
899 dma_addr_t status_phys;
Ed Lin529e7a62006-12-04 17:49:34 -0800900 u32 data;
Ed Lin76fbf962006-12-04 17:49:42 -0800901 unsigned long before;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400902
903 if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
904 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
905 readl(base + IDBL);
Ed Lin76fbf962006-12-04 17:49:42 -0800906 before = jiffies;
907 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
908 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
909 printk(KERN_ERR DRV_NAME
910 "(%s): no handshake signature\n",
911 pci_name(hba->pdev));
912 return -1;
913 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400914 rmb();
915 msleep(1);
916 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400917 }
918
919 udelay(10);
920
Ed Lin529e7a62006-12-04 17:49:34 -0800921 data = readl(base + OMR1);
922 if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) {
923 data &= 0x0000ffff;
924 if (hba->host->can_queue > data)
925 hba->host->can_queue = data;
926 }
927
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400928 h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
929 h->rb_phy = cpu_to_le32(hba->dma_handle);
930 h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16);
931 h->req_sz = cpu_to_le16(sizeof(struct req_msg));
932 h->req_cnt = cpu_to_le16(MU_REQ_COUNT);
933 h->status_sz = cpu_to_le16(sizeof(struct status_msg));
934 h->status_cnt = cpu_to_le16(MU_STATUS_COUNT);
935 stex_gettime(&h->hosttime);
936 h->partner_type = HMU_PARTNER_TYPE;
Ed Lin94e91082006-12-04 17:49:39 -0800937 if (hba->dma_size > STEX_BUFFER_SIZE) {
938 h->extra_offset = cpu_to_le32(STEX_BUFFER_SIZE);
939 h->extra_size = cpu_to_le32(ST_ADDITIONAL_MEM);
940 } else
941 h->extra_offset = h->extra_size = 0;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400942
943 status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE;
944 writel(status_phys, base + IMR0);
945 readl(base + IMR0);
946 writel((status_phys >> 16) >> 16, base + IMR1);
947 readl(base + IMR1);
948
949 writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
950 readl(base + OMR0);
951 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
952 readl(base + IDBL); /* flush */
953
954 udelay(10);
Ed Lin76fbf962006-12-04 17:49:42 -0800955 before = jiffies;
956 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
957 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
958 printk(KERN_ERR DRV_NAME
959 "(%s): no signature after handshake frame\n",
960 pci_name(hba->pdev));
961 return -1;
962 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400963 rmb();
964 msleep(1);
965 }
966
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400967 writel(0, base + IMR0);
968 readl(base + IMR0);
969 writel(0, base + OMR0);
970 readl(base + OMR0);
971 writel(0, base + IMR1);
972 readl(base + IMR1);
973 writel(0, base + OMR1);
974 readl(base + OMR1); /* flush */
975 hba->mu_status = MU_STATE_STARTED;
976 return 0;
977}
978
979static int stex_abort(struct scsi_cmnd *cmd)
980{
981 struct Scsi_Host *host = cmd->device->host;
982 struct st_hba *hba = (struct st_hba *)host->hostdata;
Ed Lincf355882006-09-01 14:31:51 +0800983 u16 tag = cmd->request->tag;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400984 void __iomem *base;
985 u32 data;
986 int result = SUCCESS;
987 unsigned long flags;
988 base = hba->mmio_base;
989 spin_lock_irqsave(host->host_lock, flags);
Ed Lincf355882006-09-01 14:31:51 +0800990 if (tag < host->can_queue && hba->ccb[tag].cmd == cmd)
991 hba->wait_ccb = &hba->ccb[tag];
992 else {
993 for (tag = 0; tag < host->can_queue; tag++)
994 if (hba->ccb[tag].cmd == cmd) {
995 hba->wait_ccb = &hba->ccb[tag];
996 break;
997 }
998 if (tag >= host->can_queue)
999 goto out;
1000 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001001
1002 data = readl(base + ODBL);
1003 if (data == 0 || data == 0xffffffff)
1004 goto fail_out;
1005
1006 writel(data, base + ODBL);
1007 readl(base + ODBL); /* flush */
1008
1009 stex_mu_intr(hba, data);
1010
1011 if (hba->wait_ccb == NULL) {
1012 printk(KERN_WARNING DRV_NAME
1013 "(%s): lost interrupt\n", pci_name(hba->pdev));
1014 goto out;
1015 }
1016
1017fail_out:
Ed Lincf355882006-09-01 14:31:51 +08001018 stex_unmap_sg(hba, cmd);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001019 hba->wait_ccb->req = NULL; /* nullify the req's future return */
1020 hba->wait_ccb = NULL;
1021 result = FAILED;
1022out:
1023 spin_unlock_irqrestore(host->host_lock, flags);
1024 return result;
1025}
1026
1027static void stex_hard_reset(struct st_hba *hba)
1028{
1029 struct pci_bus *bus;
1030 int i;
1031 u16 pci_cmd;
1032 u8 pci_bctl;
1033
1034 for (i = 0; i < 16; i++)
1035 pci_read_config_dword(hba->pdev, i * 4,
1036 &hba->pdev->saved_config_space[i]);
1037
1038 /* Reset secondary bus. Our controller(MU/ATU) is the only device on
1039 secondary bus. Consult Intel 80331/3 developer's manual for detail */
1040 bus = hba->pdev->bus;
1041 pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
1042 pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET;
1043 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1044 msleep(1);
1045 pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
1046 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1047
Ed Lin76fbf962006-12-04 17:49:42 -08001048 for (i = 0; i < MU_HARD_RESET_WAIT; i++) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001049 pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
Ed Lin47c4f992006-12-04 17:49:31 -08001050 if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER))
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001051 break;
1052 msleep(1);
1053 }
1054
1055 ssleep(5);
1056 for (i = 0; i < 16; i++)
1057 pci_write_config_dword(hba->pdev, i * 4,
1058 hba->pdev->saved_config_space[i]);
1059}
1060
1061static int stex_reset(struct scsi_cmnd *cmd)
1062{
1063 struct st_hba *hba;
1064 unsigned long flags;
Ed Linfb4f66b2006-09-27 19:23:41 +08001065 unsigned long before;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001066 hba = (struct st_hba *) &cmd->device->host->hostdata[0];
1067
1068 hba->mu_status = MU_STATE_RESETTING;
1069
1070 if (hba->cardtype == st_shasta)
1071 stex_hard_reset(hba);
1072
Ed Linfb4f66b2006-09-27 19:23:41 +08001073 if (hba->cardtype != st_yosemite) {
1074 if (stex_handshake(hba)) {
1075 printk(KERN_WARNING DRV_NAME
1076 "(%s): resetting: handshake failed\n",
1077 pci_name(hba->pdev));
1078 return FAILED;
1079 }
1080 spin_lock_irqsave(hba->host->host_lock, flags);
1081 hba->req_head = 0;
1082 hba->req_tail = 0;
1083 hba->status_head = 0;
1084 hba->status_tail = 0;
1085 hba->out_req_cnt = 0;
1086 spin_unlock_irqrestore(hba->host->host_lock, flags);
1087 return SUCCESS;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001088 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001089
Ed Linfb4f66b2006-09-27 19:23:41 +08001090 /* st_yosemite */
1091 writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1092 readl(hba->mmio_base + IDBL); /* flush */
1093 before = jiffies;
1094 while (hba->out_req_cnt > 0) {
1095 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
1096 printk(KERN_WARNING DRV_NAME
1097 "(%s): reset timeout\n", pci_name(hba->pdev));
1098 return FAILED;
1099 }
1100 msleep(1);
1101 }
1102
1103 hba->mu_status = MU_STATE_STARTED;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001104 return SUCCESS;
1105}
1106
1107static int stex_biosparam(struct scsi_device *sdev,
1108 struct block_device *bdev, sector_t capacity, int geom[])
1109{
Ed Linb4b8bed2006-12-04 17:49:24 -08001110 int heads = 255, sectors = 63;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001111
1112 if (capacity < 0x200000) {
1113 heads = 64;
1114 sectors = 32;
1115 }
1116
Ed Linb4b8bed2006-12-04 17:49:24 -08001117 sector_div(capacity, heads * sectors);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001118
1119 geom[0] = heads;
1120 geom[1] = sectors;
Ed Linb4b8bed2006-12-04 17:49:24 -08001121 geom[2] = capacity;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001122
1123 return 0;
1124}
1125
1126static struct scsi_host_template driver_template = {
1127 .module = THIS_MODULE,
1128 .name = DRV_NAME,
1129 .proc_name = DRV_NAME,
1130 .bios_param = stex_biosparam,
1131 .queuecommand = stex_queuecommand,
Ed Lincf355882006-09-01 14:31:51 +08001132 .slave_alloc = stex_slave_alloc,
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001133 .slave_configure = stex_slave_config,
1134 .slave_destroy = stex_slave_destroy,
1135 .eh_abort_handler = stex_abort,
1136 .eh_host_reset_handler = stex_reset,
1137 .can_queue = ST_CAN_QUEUE,
1138 .this_id = -1,
1139 .sg_tablesize = ST_MAX_SG,
1140 .cmd_per_lun = ST_CMD_PER_LUN,
1141};
1142
1143static int stex_set_dma_mask(struct pci_dev * pdev)
1144{
1145 int ret;
1146 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1147 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1148 return 0;
1149 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1150 if (!ret)
1151 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1152 return ret;
1153}
1154
1155static int __devinit
1156stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1157{
1158 struct st_hba *hba;
1159 struct Scsi_Host *host;
1160 int err;
1161
1162 err = pci_enable_device(pdev);
1163 if (err)
1164 return err;
1165
1166 pci_set_master(pdev);
1167
1168 host = scsi_host_alloc(&driver_template, sizeof(struct st_hba));
1169
1170 if (!host) {
1171 printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n",
1172 pci_name(pdev));
1173 err = -ENOMEM;
1174 goto out_disable;
1175 }
1176
1177 hba = (struct st_hba *)host->hostdata;
1178 memset(hba, 0, sizeof(struct st_hba));
1179
1180 err = pci_request_regions(pdev, DRV_NAME);
1181 if (err < 0) {
1182 printk(KERN_ERR DRV_NAME "(%s): request regions failed\n",
1183 pci_name(pdev));
1184 goto out_scsi_host_put;
1185 }
1186
1187 hba->mmio_base = ioremap(pci_resource_start(pdev, 0),
1188 pci_resource_len(pdev, 0));
1189 if ( !hba->mmio_base) {
1190 printk(KERN_ERR DRV_NAME "(%s): memory map failed\n",
1191 pci_name(pdev));
1192 err = -ENOMEM;
1193 goto out_release_regions;
1194 }
1195
1196 err = stex_set_dma_mask(pdev);
1197 if (err) {
1198 printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n",
1199 pci_name(pdev));
1200 goto out_iounmap;
1201 }
1202
Ed Lin94e91082006-12-04 17:49:39 -08001203 hba->cardtype = (unsigned int) id->driver_data;
1204 if (hba->cardtype == st_vsc && (pdev->subsystem_device & 0xf) == 0x1)
1205 hba->cardtype = st_vsc1;
1206 hba->dma_size = (hba->cardtype == st_vsc1) ?
1207 (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001208 hba->dma_mem = dma_alloc_coherent(&pdev->dev,
Ed Lin94e91082006-12-04 17:49:39 -08001209 hba->dma_size, &hba->dma_handle, GFP_KERNEL);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001210 if (!hba->dma_mem) {
1211 err = -ENOMEM;
1212 printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n",
1213 pci_name(pdev));
1214 goto out_iounmap;
1215 }
1216
1217 hba->status_buffer =
1218 (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
1219 hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE;
1220 hba->mu_status = MU_STATE_STARTING;
1221
Ed Line0b2e592007-05-09 20:50:33 -08001222 if (hba->cardtype == st_shasta) {
1223 host->max_lun = 8;
1224 host->max_id = 16 + 1;
1225 } else if (hba->cardtype == st_yosemite) {
1226 host->max_lun = 128;
1227 host->max_id = 1 + 1;
1228 } else {
1229 /* st_vsc and st_vsc1 */
1230 host->max_lun = 1;
1231 host->max_id = 128 + 1;
1232 }
1233 host->max_channel = 0;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001234 host->unique_id = host->host_no;
1235 host->max_cmd_len = STEX_CDB_LENGTH;
1236
1237 hba->host = host;
1238 hba->pdev = pdev;
1239 init_waitqueue_head(&hba->waitq);
1240
1241 err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
1242 if (err) {
1243 printk(KERN_ERR DRV_NAME "(%s): request irq failed\n",
1244 pci_name(pdev));
1245 goto out_pci_free;
1246 }
1247
1248 err = stex_handshake(hba);
1249 if (err)
1250 goto out_free_irq;
1251
Ed Lin529e7a62006-12-04 17:49:34 -08001252 err = scsi_init_shared_tag_map(host, host->can_queue);
James Bottomleydeb81d82006-09-01 09:28:48 -04001253 if (err) {
Ed Lincf355882006-09-01 14:31:51 +08001254 printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n",
1255 pci_name(pdev));
1256 goto out_free_irq;
1257 }
1258
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001259 pci_set_drvdata(pdev, hba);
1260
1261 err = scsi_add_host(host, &pdev->dev);
1262 if (err) {
1263 printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n",
1264 pci_name(pdev));
1265 goto out_free_irq;
1266 }
1267
1268 scsi_scan_host(host);
1269
1270 return 0;
1271
1272out_free_irq:
1273 free_irq(pdev->irq, hba);
1274out_pci_free:
Ed Lin94e91082006-12-04 17:49:39 -08001275 dma_free_coherent(&pdev->dev, hba->dma_size,
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001276 hba->dma_mem, hba->dma_handle);
1277out_iounmap:
1278 iounmap(hba->mmio_base);
1279out_release_regions:
1280 pci_release_regions(pdev);
1281out_scsi_host_put:
1282 scsi_host_put(host);
1283out_disable:
1284 pci_disable_device(pdev);
1285
1286 return err;
1287}
1288
1289static void stex_hba_stop(struct st_hba *hba)
1290{
1291 struct req_msg *req;
1292 unsigned long flags;
1293 unsigned long before;
Ed Lincf355882006-09-01 14:31:51 +08001294 u16 tag = 0;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001295
1296 spin_lock_irqsave(hba->host->host_lock, flags);
1297 req = stex_alloc_req(hba);
1298 memset(req->cdb, 0, STEX_CDB_LENGTH);
1299
Ed Linfb4f66b2006-09-27 19:23:41 +08001300 if (hba->cardtype == st_yosemite) {
1301 req->cdb[0] = MGT_CMD;
1302 req->cdb[1] = MGT_CMD_SIGNATURE;
1303 req->cdb[2] = CTLR_CONFIG_CMD;
1304 req->cdb[3] = CTLR_SHUTDOWN;
1305 } else {
1306 req->cdb[0] = CONTROLLER_CMD;
1307 req->cdb[1] = CTLR_POWER_STATE_CHANGE;
1308 req->cdb[2] = CTLR_POWER_SAVING;
1309 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001310
1311 hba->ccb[tag].cmd = NULL;
1312 hba->ccb[tag].sg_count = 0;
1313 hba->ccb[tag].sense_bufflen = 0;
1314 hba->ccb[tag].sense_buffer = NULL;
1315 hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE;
1316
1317 stex_send_cmd(hba, req, tag);
1318 spin_unlock_irqrestore(hba->host->host_lock, flags);
1319
Ed Lincf355882006-09-01 14:31:51 +08001320 before = jiffies;
1321 while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
1322 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ))
1323 return;
1324 msleep(10);
1325 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001326}
1327
1328static void stex_hba_free(struct st_hba *hba)
1329{
1330 free_irq(hba->pdev->irq, hba);
1331
1332 iounmap(hba->mmio_base);
1333
1334 pci_release_regions(hba->pdev);
1335
Ed Lin94e91082006-12-04 17:49:39 -08001336 dma_free_coherent(&hba->pdev->dev, hba->dma_size,
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001337 hba->dma_mem, hba->dma_handle);
1338}
1339
1340static void stex_remove(struct pci_dev *pdev)
1341{
1342 struct st_hba *hba = pci_get_drvdata(pdev);
1343
1344 scsi_remove_host(hba->host);
1345
1346 pci_set_drvdata(pdev, NULL);
1347
1348 stex_hba_stop(hba);
1349
1350 stex_hba_free(hba);
1351
1352 scsi_host_put(hba->host);
1353
1354 pci_disable_device(pdev);
1355}
1356
1357static void stex_shutdown(struct pci_dev *pdev)
1358{
1359 struct st_hba *hba = pci_get_drvdata(pdev);
1360
1361 stex_hba_stop(hba);
1362}
1363
1364static struct pci_device_id stex_pci_tbl[] = {
Ed Linee926b22006-12-04 17:49:36 -08001365 /* st_shasta */
1366 { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1367 st_shasta }, /* SuperTrak EX8350/8300/16350/16300 */
1368 { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1369 st_shasta }, /* SuperTrak EX12350 */
1370 { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1371 st_shasta }, /* SuperTrak EX4350 */
1372 { 0x105a, 0xe350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1373 st_shasta }, /* SuperTrak EX24350 */
1374
1375 /* st_vsc */
1376 { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
1377
1378 /* st_yosemite */
1379 { 0x105a, 0x8650, PCI_ANY_ID, 0x4600, 0, 0,
1380 st_yosemite }, /* SuperTrak EX4650 */
1381 { 0x105a, 0x8650, PCI_ANY_ID, 0x4610, 0, 0,
1382 st_yosemite }, /* SuperTrak EX4650o */
1383 { 0x105a, 0x8650, PCI_ANY_ID, 0x8600, 0, 0,
1384 st_yosemite }, /* SuperTrak EX8650EL */
1385 { 0x105a, 0x8650, PCI_ANY_ID, 0x8601, 0, 0,
1386 st_yosemite }, /* SuperTrak EX8650 */
1387 { 0x105a, 0x8650, PCI_ANY_ID, 0x8602, 0, 0,
1388 st_yosemite }, /* SuperTrak EX8654 */
1389 { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1390 st_yosemite }, /* generic st_yosemite */
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001391 { } /* terminate list */
1392};
1393MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
1394
1395static struct pci_driver stex_pci_driver = {
1396 .name = DRV_NAME,
1397 .id_table = stex_pci_tbl,
1398 .probe = stex_probe,
1399 .remove = __devexit_p(stex_remove),
1400 .shutdown = stex_shutdown,
1401};
1402
1403static int __init stex_init(void)
1404{
1405 printk(KERN_INFO DRV_NAME
1406 ": Promise SuperTrak EX Driver version: %s\n",
1407 ST_DRIVER_VERSION);
1408
1409 return pci_register_driver(&stex_pci_driver);
1410}
1411
1412static void __exit stex_exit(void)
1413{
1414 pci_unregister_driver(&stex_pci_driver);
1415}
1416
1417module_init(stex_init);
1418module_exit(stex_exit);