Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | The MSI Driver Guide HOWTO |
| 2 | Tom L Nguyen tom.l.nguyen@intel.com |
| 3 | 10/03/2003 |
| 4 | Revised Feb 12, 2004 by Martine Silbermann |
| 5 | email: Martine.Silbermann@hp.com |
| 6 | Revised Jun 25, 2004 by Tom L Nguyen |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 7 | Revised Jul 9, 2008 by Matthew Wilcox <willy@linux.intel.com> |
| 8 | Copyright 2003, 2008 Intel Corporation |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | |
| 10 | 1. About this guide |
| 11 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 12 | This guide describes the basics of Message Signaled Interrupts (MSIs), |
| 13 | the advantages of using MSI over traditional interrupt mechanisms, how |
| 14 | to change your driver to use MSI or MSI-X and some basic diagnostics to |
| 15 | try if a device doesn't support MSIs. |
Randy Dunlap | 2500e7a | 2005-11-07 01:01:03 -0800 | [diff] [blame] | 16 | |
Randy Dunlap | 2500e7a | 2005-11-07 01:01:03 -0800 | [diff] [blame] | 17 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 18 | 2. What are MSIs? |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 20 | A Message Signaled Interrupt is a write from the device to a special |
| 21 | address which causes an interrupt to be received by the CPU. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 23 | The MSI capability was first specified in PCI 2.2 and was later enhanced |
| 24 | in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X |
| 25 | capability was also introduced with PCI 3.0. It supports more interrupts |
| 26 | per device than MSI and allows interrupts to be independently configured. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 28 | Devices may support both MSI and MSI-X, but only one can be enabled at |
| 29 | a time. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 32 | 3. Why use MSIs? |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 34 | There are three reasons why using MSIs can give an advantage over |
| 35 | traditional pin-based interrupts. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 37 | Pin-based PCI interrupts are often shared amongst several devices. |
| 38 | To support this, the kernel must call each interrupt handler associated |
| 39 | with an interrupt, which leads to reduced performance for the system as |
| 40 | a whole. MSIs are never shared, so this problem cannot arise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 42 | When a device writes data to memory, then raises a pin-based interrupt, |
| 43 | it is possible that the interrupt may arrive before all the data has |
| 44 | arrived in memory (this becomes more likely with devices behind PCI-PCI |
| 45 | bridges). In order to ensure that all the data has arrived in memory, |
| 46 | the interrupt handler must read a register on the device which raised |
| 47 | the interrupt. PCI transaction ordering rules require that all the data |
Michael Witten | 891f692 | 2011-07-14 17:53:54 +0000 | [diff] [blame] | 48 | arrive in memory before the value may be returned from the register. |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 49 | Using MSIs avoids this problem as the interrupt-generating write cannot |
| 50 | pass the data writes, so by the time the interrupt is raised, the driver |
| 51 | knows that all the data has arrived in memory. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 53 | PCI devices can only support a single pin-based interrupt per function. |
| 54 | Often drivers have to query the device to find out what event has |
| 55 | occurred, slowing down interrupt handling for the common case. With |
| 56 | MSIs, a device can support more interrupts, allowing each interrupt |
| 57 | to be specialised to a different purpose. One possible design gives |
| 58 | infrequent conditions (such as errors) their own interrupt which allows |
| 59 | the driver to handle the normal interrupt handling path more efficiently. |
| 60 | Other possible designs include giving one interrupt to each packet queue |
| 61 | in a network card or each port in a storage controller. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 64 | 4. How to use MSIs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 66 | PCI devices are initialised to use pin-based interrupts. The device |
| 67 | driver has to set up the device to use MSI or MSI-X. Not all machines |
| 68 | support MSIs correctly, and for those machines, the APIs described below |
| 69 | will simply fail and the device will continue to use pin-based interrupts. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 71 | 4.1 Include kernel support for MSIs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 73 | To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI |
| 74 | option enabled. This option is only available on some architectures, |
| 75 | and it may depend on some other options also being set. For example, |
| 76 | on x86, you must also enable X86_UP_APIC or SMP in order to see the |
| 77 | CONFIG_PCI_MSI option. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 79 | 4.2 Using MSI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 81 | Most of the hard work is done for the driver in the PCI layer. It simply |
| 82 | has to request that the PCI layer set up the MSI capability for this |
| 83 | device. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 85 | 4.2.1 pci_enable_msi |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | |
| 87 | int pci_enable_msi(struct pci_dev *dev) |
| 88 | |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 89 | A successful call allocates ONE interrupt to the device, regardless |
| 90 | of how many MSIs the device supports. The device is switched from |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 91 | pin-based interrupt mode to MSI mode. The dev->irq number is changed |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 92 | to a new number which represents the message signaled interrupt; |
| 93 | consequently, this function should be called before the driver calls |
| 94 | request_irq(), because an MSI is delivered via a vector that is |
| 95 | different from the vector of a pin-based interrupt. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 97 | 4.2.2 pci_enable_msi_block |
| 98 | |
| 99 | int pci_enable_msi_block(struct pci_dev *dev, int count) |
| 100 | |
| 101 | This variation on the above call allows a device driver to request multiple |
| 102 | MSIs. The MSI specification only allows interrupts to be allocated in |
| 103 | powers of two, up to a maximum of 2^5 (32). |
| 104 | |
| 105 | If this function returns 0, it has succeeded in allocating at least as many |
| 106 | interrupts as the driver requested (it may have allocated more in order |
| 107 | to satisfy the power-of-two requirement). In this case, the function |
| 108 | enables MSI on this device and updates dev->irq to be the lowest of |
| 109 | the new interrupts assigned to it. The other interrupts assigned to |
| 110 | the device are in the range dev->irq to dev->irq + count - 1. |
| 111 | |
| 112 | If this function returns a negative number, it indicates an error and |
| 113 | the driver should not attempt to request any more MSI interrupts for |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 114 | this device. If this function returns a positive number, it is |
| 115 | less than 'count' and indicates the number of interrupts that could have |
| 116 | been allocated. In neither case is the irq value updated or the device |
| 117 | switched into MSI mode. |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 118 | |
| 119 | The device driver must decide what action to take if |
Michael Witten | a2d4d50 | 2011-07-14 20:03:28 +0000 | [diff] [blame] | 120 | pci_enable_msi_block() returns a value less than the number requested. |
Michael Witten | 1d15afc | 2011-07-14 20:05:01 +0000 | [diff] [blame] | 121 | For instance, the driver could still make use of fewer interrupts; |
| 122 | in this case the driver should call pci_enable_msi_block() |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 123 | again. Note that it is not guaranteed to succeed, even when the |
| 124 | 'count' has been reduced to the value returned from a previous call to |
| 125 | pci_enable_msi_block(). This is because there are multiple constraints |
| 126 | on the number of vectors that can be allocated; pci_enable_msi_block() |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 127 | returns as soon as it finds any constraint that doesn't allow the |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 128 | call to succeed. |
| 129 | |
| 130 | 4.2.3 pci_disable_msi |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | |
| 132 | void pci_disable_msi(struct pci_dev *dev) |
| 133 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 134 | This function should be used to undo the effect of pci_enable_msi() or |
| 135 | pci_enable_msi_block(). Calling it restores dev->irq to the pin-based |
| 136 | interrupt number and frees the previously allocated message signaled |
| 137 | interrupt(s). The interrupt may subsequently be assigned to another |
| 138 | device, so drivers should not cache the value of dev->irq. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | |
Michael Witten | 263d8d5 | 2011-07-14 21:28:00 +0000 | [diff] [blame] | 140 | Before calling this function, a device driver must always call free_irq() |
| 141 | on any interrupt for which it previously called request_irq(). |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 142 | Failure to do so results in a BUG_ON(), leaving the device with |
| 143 | MSI enabled and thus leaking its vector. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 145 | 4.3 Using MSI-X |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 147 | The MSI-X capability is much more flexible than the MSI capability. |
| 148 | It supports up to 2048 interrupts, each of which can be controlled |
| 149 | independently. To support this flexibility, drivers must use an array of |
| 150 | `struct msix_entry': |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | |
| 152 | struct msix_entry { |
| 153 | u16 vector; /* kernel uses to write alloc vector */ |
| 154 | u16 entry; /* driver uses to specify entry */ |
| 155 | }; |
| 156 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 157 | This allows for the device to use these interrupts in a sparse fashion; |
Michael Witten | e443923 | 2011-07-14 21:30:18 +0000 | [diff] [blame] | 158 | for example, it could use interrupts 3 and 1027 and yet allocate only a |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 159 | two-element array. The driver is expected to fill in the 'entry' value |
Michael Witten | e443923 | 2011-07-14 21:30:18 +0000 | [diff] [blame] | 160 | in each element of the array to indicate for which entries the kernel |
| 161 | should assign interrupts; it is invalid to fill in two entries with the |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 162 | same number. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 164 | 4.3.1 pci_enable_msix |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 166 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) |
| 167 | |
| 168 | Calling this function asks the PCI subsystem to allocate 'nvec' MSIs. |
| 169 | The 'entries' argument is a pointer to an array of msix_entry structs |
| 170 | which should be at least 'nvec' entries in size. On success, the |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 171 | device is switched into MSI-X mode and the function returns 0. |
| 172 | The 'vector' member in each entry is populated with the interrupt number; |
| 173 | the driver should then call request_irq() for each 'vector' that it |
Michael Witten | 6457d9b | 2011-07-14 21:54:18 +0000 | [diff] [blame] | 174 | decides to use. The device driver is responsible for keeping track of the |
| 175 | interrupts assigned to the MSI-X vectors so it can free them again later. |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 176 | |
| 177 | If this function returns a negative number, it indicates an error and |
| 178 | the driver should not attempt to allocate any more MSI-X interrupts for |
| 179 | this device. If it returns a positive number, it indicates the maximum |
Michael Ellerman | fafad5b | 2009-03-20 15:22:12 +1100 | [diff] [blame] | 180 | number of interrupt vectors that could have been allocated. See example |
| 181 | below. |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 182 | |
| 183 | This function, in contrast with pci_enable_msi(), does not adjust |
| 184 | dev->irq. The device will not generate interrupts for this interrupt |
Michael Witten | 6457d9b | 2011-07-14 21:54:18 +0000 | [diff] [blame] | 185 | number once MSI-X is enabled. |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 186 | |
| 187 | Device drivers should normally call this function once per device |
| 188 | during the initialization phase. |
| 189 | |
Michael Witten | 5a84fc3 | 2011-07-14 21:55:05 +0000 | [diff] [blame] | 190 | It is ideal if drivers can cope with a variable number of MSI-X interrupts; |
Michael Ellerman | fafad5b | 2009-03-20 15:22:12 +1100 | [diff] [blame] | 191 | there are many reasons why the platform may not be able to provide the |
Michael Witten | ed737c1 | 2011-07-18 16:15:00 +0000 | [diff] [blame] | 192 | exact number that a driver asks for. |
Michael Ellerman | fafad5b | 2009-03-20 15:22:12 +1100 | [diff] [blame] | 193 | |
| 194 | A request loop to achieve that might look like: |
| 195 | |
| 196 | static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec) |
| 197 | { |
| 198 | while (nvec >= FOO_DRIVER_MINIMUM_NVEC) { |
| 199 | rc = pci_enable_msix(adapter->pdev, |
| 200 | adapter->msix_entries, nvec); |
| 201 | if (rc > 0) |
| 202 | nvec = rc; |
| 203 | else |
| 204 | return rc; |
| 205 | } |
| 206 | |
| 207 | return -ENOSPC; |
| 208 | } |
| 209 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 210 | 4.3.2 pci_disable_msix |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | |
| 212 | void pci_disable_msix(struct pci_dev *dev) |
| 213 | |
Michael Witten | e6ffceb | 2011-07-14 23:30:47 +0000 | [diff] [blame] | 214 | This function should be used to undo the effect of pci_enable_msix(). It frees |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 215 | the previously allocated message signaled interrupts. The interrupts may |
| 216 | subsequently be assigned to another device, so drivers should not cache |
| 217 | the value of the 'vector' elements over a call to pci_disable_msix(). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | |
Michael Witten | 263d8d5 | 2011-07-14 21:28:00 +0000 | [diff] [blame] | 219 | Before calling this function, a device driver must always call free_irq() |
| 220 | on any interrupt for which it previously called request_irq(). |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 221 | Failure to do so results in a BUG_ON(), leaving the device with |
| 222 | MSI-X enabled and thus leaking its vector. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 224 | 4.3.3 The MSI-X Table |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 226 | The MSI-X capability specifies a BAR and offset within that BAR for the |
| 227 | MSI-X Table. This address is mapped by the PCI subsystem, and should not |
| 228 | be accessed directly by the device driver. If the driver wishes to |
| 229 | mask or unmask an interrupt, it should call disable_irq() / enable_irq(). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 231 | 4.4 Handling devices implementing both MSI and MSI-X capabilities |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 233 | If a device implements both MSI and MSI-X capabilities, it can |
Michael Witten | e14bd7e | 2011-07-15 03:12:13 +0000 | [diff] [blame^] | 234 | run in either MSI mode or MSI-X mode, but not both simultaneously. |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 235 | This is a requirement of the PCI spec, and it is enforced by the |
| 236 | PCI layer. Calling pci_enable_msi() when MSI-X is already enabled or |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 237 | pci_enable_msix() when MSI is already enabled results in an error. |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 238 | If a device driver wishes to switch between MSI and MSI-X at runtime, |
| 239 | it must first quiesce the device, then switch it back to pin-interrupt |
| 240 | mode, before calling pci_enable_msi() or pci_enable_msix() and resuming |
| 241 | operation. This is not expected to be a common operation but may be |
| 242 | useful for debugging or testing during development. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 244 | 4.5 Considerations when using MSIs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 246 | 4.5.1 Choosing between MSI-X and MSI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 247 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 248 | If your device supports both MSI-X and MSI capabilities, you should use |
| 249 | the MSI-X facilities in preference to the MSI facilities. As mentioned |
| 250 | above, MSI-X supports any number of interrupts between 1 and 2048. |
| 251 | In constrast, MSI is restricted to a maximum of 32 interrupts (and |
| 252 | must be a power of two). In addition, the MSI interrupt vectors must |
| 253 | be allocated consecutively, so the system may not be able to allocate |
| 254 | as many vectors for MSI as it could for MSI-X. On some platforms, MSI |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 255 | interrupts must all be targeted at the same set of CPUs whereas MSI-X |
| 256 | interrupts can all be targeted at different CPUs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 258 | 4.5.2 Spinlocks |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 260 | Most device drivers have a per-device spinlock which is taken in the |
| 261 | interrupt handler. With pin-based interrupts or a single MSI, it is not |
| 262 | necessary to disable interrupts (Linux guarantees the same interrupt will |
| 263 | not be re-entered). If a device uses multiple interrupts, the driver |
| 264 | must disable interrupts while the lock is held. If the device sends |
| 265 | a different interrupt, the driver will deadlock trying to recursively |
| 266 | acquire the spinlock. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 268 | There are two solutions. The first is to take the lock with |
| 269 | spin_lock_irqsave() or spin_lock_irq() (see |
| 270 | Documentation/DocBook/kernel-locking). The second is to specify |
| 271 | IRQF_DISABLED to request_irq() so that the kernel runs the entire |
| 272 | interrupt routine with interrupts disabled. |
Randy Dunlap | 2500e7a | 2005-11-07 01:01:03 -0800 | [diff] [blame] | 273 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 274 | If your MSI interrupt routine does not hold the lock for the whole time |
| 275 | it is running, the first solution may be best. The second solution is |
| 276 | normally preferred as it avoids making two transitions from interrupt |
| 277 | disabled to enabled and back again. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 279 | 4.6 How to tell whether MSI/MSI-X is enabled on a device |
Randy Dunlap | 2500e7a | 2005-11-07 01:01:03 -0800 | [diff] [blame] | 280 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 281 | Using 'lspci -v' (as root) may show some devices with "MSI", "Message |
| 282 | Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 283 | has an 'Enable' flag which is followed with either "+" (enabled) |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 284 | or "-" (disabled). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 285 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 287 | 5. MSI quirks |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 289 | Several PCI chipsets or devices are known not to support MSIs. |
| 290 | The PCI stack provides three ways to disable MSIs: |
Randy Dunlap | 2500e7a | 2005-11-07 01:01:03 -0800 | [diff] [blame] | 291 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 292 | 1. globally |
| 293 | 2. on all devices behind a specific bridge |
| 294 | 3. on a single device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 296 | 5.1. Disabling MSIs globally |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 298 | Some host chipsets simply don't support MSIs properly. If we're |
| 299 | lucky, the manufacturer knows this and has indicated it in the ACPI |
Michael Witten | 4979de6 | 2011-07-14 19:52:56 +0000 | [diff] [blame] | 300 | FADT table. In this case, Linux automatically disables MSIs. |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 301 | Some boards don't include this information in the table and so we have |
| 302 | to detect them ourselves. The complete list of these is found near the |
| 303 | quirk_disable_all_msi() function in drivers/pci/quirks.c. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 305 | If you have a board which has problems with MSIs, you can pass pci=nomsi |
| 306 | on the kernel command line to disable MSIs on all devices. It would be |
| 307 | in your best interests to report the problem to linux-pci@vger.kernel.org |
| 308 | including a full 'lspci -v' so we can add the quirks to the kernel. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 310 | 5.2. Disabling MSIs below a bridge |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 312 | Some PCI bridges are not able to route MSIs between busses properly. |
| 313 | In this case, MSIs must be disabled on all devices behind the bridge. |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 314 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 315 | Some bridges allow you to enable MSIs by changing some bits in their |
| 316 | PCI configuration space (especially the Hypertransport chipsets such |
| 317 | as the nVidia nForce and Serverworks HT2000). As with host chipsets, |
| 318 | Linux mostly knows about them and automatically enables MSIs if it can. |
| 319 | If you have a bridge which Linux doesn't yet know about, you can enable |
| 320 | MSIs in configuration space using whatever method you know works, then |
| 321 | enable MSIs on that bridge by doing: |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 322 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 323 | echo 1 > /sys/bus/pci/devices/$bridge/msi_bus |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 324 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 325 | where $bridge is the PCI address of the bridge you've enabled (eg |
| 326 | 0000:00:0e.0). |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 327 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 328 | To disable MSIs, echo 0 instead of 1. Changing this value should be |
| 329 | done with caution as it can break interrupt handling for all devices |
| 330 | below this bridge. |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 331 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 332 | Again, please notify linux-pci@vger.kernel.org of any bridges that need |
| 333 | special handling. |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 334 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 335 | 5.3. Disabling MSIs on a single device |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 336 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 337 | Some devices are known to have faulty MSI implementations. Usually this |
| 338 | is handled in the individual device driver but occasionally it's necessary |
| 339 | to handle this with a quirk. Some drivers have an option to disable use |
| 340 | of MSI. While this is a convenient workaround for the driver author, |
| 341 | it is not good practise, and should not be emulated. |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 342 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 343 | 5.4. Finding why MSIs are disabled on a device |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 344 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 345 | From the above three sections, you can see that there are many reasons |
| 346 | why MSIs may not be enabled for a given device. Your first step should |
| 347 | be to examine your dmesg carefully to determine whether MSIs are enabled |
| 348 | for your machine. You should also check your .config to be sure you |
| 349 | have enabled CONFIG_PCI_MSI. |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 350 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 351 | Then, 'lspci -t' gives the list of bridges above a device. Reading |
| 352 | /sys/bus/pci/devices/*/msi_bus will tell you whether MSI are enabled (1) |
| 353 | or disabled (0). If 0 is found in any of the msi_bus files belonging |
| 354 | to bridges between the PCI root and the device, MSIs are disabled. |
Brice Goglin | 0cc2b37 | 2006-10-05 10:24:42 +0200 | [diff] [blame] | 355 | |
Matthew Wilcox | c41ade2 | 2009-03-17 08:54:05 -0400 | [diff] [blame] | 356 | It is also worth checking the device driver to see whether it supports MSIs. |
| 357 | For example, it may contain calls to pci_enable_msi(), pci_enable_msix() or |
| 358 | pci_enable_msi_block(). |