blob: de158b76bcd572da1e261713c66d43fa4428f72c [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010050#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080051
Jesse Barnes79e53942008-11-07 14:24:08 -080052
Chris Wilson2e88e402010-08-07 11:01:27 +010053static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080054 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61};
62
63#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
Chris Wilsonea5b2132010-08-04 13:50:23 +010065struct intel_sdvo {
66 struct intel_encoder base;
67
Chris Wilsonf899fc62010-07-20 15:44:45 -070068 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070069 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080070
Chris Wilsone957d772010-09-24 12:52:03 +010071 struct i2c_adapter ddc;
72
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070074 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080075
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /*
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
82 */
Jesse Barnes79e53942008-11-07 14:24:08 -080083 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080084
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 int pixel_clock_min, pixel_clock_max;
87
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080088 /*
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
91 */
92 uint16_t attached_output;
93
Jesse Barnese2f0ba92009-02-02 15:11:52 -080094 /**
95 * This is set if we're going to treat the device as TV-out.
96 *
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
100 */
101 bool is_tv;
102
Zhao Yakuice6feab2009-08-24 13:50:26 +0800103 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100104 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800105
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800106 /**
107 * This is set if we treat the device as HDMI, instead of DVI.
108 */
109 bool is_hdmi;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100110 bool has_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800111
Ma Ling7086c872009-05-13 11:20:06 +0800112 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100113 * This is set if we detect output of sdvo device as LVDS and
114 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800115 */
116 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800117
118 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800119 * This is sdvo fixed pannel mode pointer
120 */
121 struct drm_display_mode *sdvo_lvds_fixed_mode;
122
Eric Anholtc751ce42010-03-25 11:48:48 -0700123 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800124 uint8_t ddc_bus;
125
Chris Wilson6c9547f2010-08-25 10:05:17 +0100126 /* Input timings for adjusted_mode */
127 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800128};
129
130struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100131 struct intel_connector base;
132
Zhenyu Wang14571b42010-03-30 14:06:33 +0800133 /* Mark the type of connector */
134 uint16_t output_flag;
135
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100136 int force_audio;
137
Zhenyu Wang14571b42010-03-30 14:06:33 +0800138 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100139 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800140 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100141 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800142
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100143 struct drm_property *force_audio_property;
144
Zhao Yakuib9219c52009-09-10 15:45:46 +0800145 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100146 struct drm_property *left;
147 struct drm_property *right;
148 struct drm_property *top;
149 struct drm_property *bottom;
150 struct drm_property *hpos;
151 struct drm_property *vpos;
152 struct drm_property *contrast;
153 struct drm_property *saturation;
154 struct drm_property *hue;
155 struct drm_property *sharpness;
156 struct drm_property *flicker_filter;
157 struct drm_property *flicker_filter_adaptive;
158 struct drm_property *flicker_filter_2d;
159 struct drm_property *tv_chroma_filter;
160 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100161 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800162
163 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100164 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800165
166 /* Add variable to record current setting for the above property */
167 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100168
Zhao Yakuib9219c52009-09-10 15:45:46 +0800169 /* this is to get the range of margin.*/
170 u32 max_hscan, max_vscan;
171 u32 max_hpos, cur_hpos;
172 u32 max_vpos, cur_vpos;
173 u32 cur_brightness, max_brightness;
174 u32 cur_contrast, max_contrast;
175 u32 cur_saturation, max_saturation;
176 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100177 u32 cur_sharpness, max_sharpness;
178 u32 cur_flicker_filter, max_flicker_filter;
179 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
180 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
181 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
182 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100183 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800184};
185
Chris Wilson890f3352010-09-14 16:46:59 +0100186static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100187{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100188 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100189}
190
Chris Wilsondf0e9242010-09-09 16:20:55 +0100191static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
192{
193 return container_of(intel_attached_encoder(connector),
194 struct intel_sdvo, base);
195}
196
Chris Wilson615fb932010-08-04 13:50:24 +0100197static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
198{
199 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
200}
201
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800202static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100203intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100204static bool
205intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
206 struct intel_sdvo_connector *intel_sdvo_connector,
207 int type);
208static bool
209intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
210 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800211
Jesse Barnes79e53942008-11-07 14:24:08 -0800212/**
213 * Writes the SDVOB or SDVOC with the given value, but always writes both
214 * SDVOB and SDVOC to work around apparent hardware issues (according to
215 * comments in the BIOS).
216 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100217static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800218{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100219 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800220 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800221 u32 bval = val, cval = val;
222 int i;
223
Chris Wilsonea5b2132010-08-04 13:50:23 +0100224 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
225 I915_WRITE(intel_sdvo->sdvo_reg, val);
226 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800227 return;
228 }
229
Chris Wilsonea5b2132010-08-04 13:50:23 +0100230 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800231 cval = I915_READ(SDVOC);
232 } else {
233 bval = I915_READ(SDVOB);
234 }
235 /*
236 * Write the registers twice for luck. Sometimes,
237 * writing them only once doesn't appear to 'stick'.
238 * The BIOS does this too. Yay, magic
239 */
240 for (i = 0; i < 2; i++)
241 {
242 I915_WRITE(SDVOB, bval);
243 I915_READ(SDVOB);
244 I915_WRITE(SDVOC, cval);
245 I915_READ(SDVOC);
246 }
247}
248
Chris Wilson32aad862010-08-04 13:50:25 +0100249static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800250{
Jesse Barnes79e53942008-11-07 14:24:08 -0800251 struct i2c_msg msgs[] = {
252 {
Chris Wilsone957d772010-09-24 12:52:03 +0100253 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800254 .flags = 0,
255 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100256 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800257 },
258 {
Chris Wilsone957d772010-09-24 12:52:03 +0100259 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800260 .flags = I2C_M_RD,
261 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100262 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800263 }
264 };
Chris Wilson32aad862010-08-04 13:50:25 +0100265 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800266
Chris Wilsonf899fc62010-07-20 15:44:45 -0700267 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800268 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800269
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800270 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 return false;
272}
273
Jesse Barnes79e53942008-11-07 14:24:08 -0800274#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
275/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100276static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800277 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100278 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800279} sdvo_cmd_names[] = {
280 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100323
Zhao Yakuib9219c52009-09-10 15:45:46 +0800324 /* Add the op code for SDVO enhancements */
Chris Wilsonc5521702010-08-04 13:50:28 +0100325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Chris Wilsonc5521702010-08-04 13:50:28 +0100349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
369
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800370 /* HDMI op code */
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800391};
392
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800393#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100394#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800395
Chris Wilsonea5b2132010-08-04 13:50:23 +0100396static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100397 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800398{
Jesse Barnes79e53942008-11-07 14:24:08 -0800399 int i;
400
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800401 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100402 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800403 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800404 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800405 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800406 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400407 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800408 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800409 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800410 break;
411 }
412 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400413 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800414 DRM_LOG_KMS("(%02X)", cmd);
415 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800416}
Jesse Barnes79e53942008-11-07 14:24:08 -0800417
Jesse Barnes79e53942008-11-07 14:24:08 -0800418static const char *cmd_status_names[] = {
419 "Power on",
420 "Success",
421 "Not supported",
422 "Invalid arg",
423 "Pending",
424 "Target not specified",
425 "Scaling not supported"
426};
427
Chris Wilsone957d772010-09-24 12:52:03 +0100428static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
429 const void *args, int args_len)
430{
431 u8 buf[args_len*2 + 2], status;
432 struct i2c_msg msgs[args_len + 3];
433 int i, ret;
434
435 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
436
437 for (i = 0; i < args_len; i++) {
438 msgs[i].addr = intel_sdvo->slave_addr;
439 msgs[i].flags = 0;
440 msgs[i].len = 2;
441 msgs[i].buf = buf + 2 *i;
442 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
443 buf[2*i + 1] = ((u8*)args)[i];
444 }
445 msgs[i].addr = intel_sdvo->slave_addr;
446 msgs[i].flags = 0;
447 msgs[i].len = 2;
448 msgs[i].buf = buf + 2*i;
449 buf[2*i + 0] = SDVO_I2C_OPCODE;
450 buf[2*i + 1] = cmd;
451
452 /* the following two are to read the response */
453 status = SDVO_I2C_CMD_STATUS;
454 msgs[i+1].addr = intel_sdvo->slave_addr;
455 msgs[i+1].flags = 0;
456 msgs[i+1].len = 1;
457 msgs[i+1].buf = &status;
458
459 msgs[i+2].addr = intel_sdvo->slave_addr;
460 msgs[i+2].flags = I2C_M_RD;
461 msgs[i+2].len = 1;
462 msgs[i+2].buf = &status;
463
464 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
465 if (ret < 0) {
466 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
467 return false;
468 }
469 if (ret != i+3) {
470 /* failure in I2C transfer */
471 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
472 return false;
473 }
474
475 i = 3;
476 while (status == SDVO_CMD_STATUS_PENDING && i--) {
477 if (!intel_sdvo_read_byte(intel_sdvo,
478 SDVO_I2C_CMD_STATUS,
479 &status))
480 return false;
481 }
482 if (status != SDVO_CMD_STATUS_SUCCESS) {
483 DRM_DEBUG_KMS("command returns response %s [%d]\n",
484 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
485 status);
486 return false;
487 }
488
489 return true;
490}
491
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100492static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
493 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800494{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100495 u8 retry = 5;
496 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800497 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800498
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100499 /*
500 * The documentation states that all commands will be
501 * processed within 15µs, and that we need only poll
502 * the status byte a maximum of 3 times in order for the
503 * command to be complete.
504 *
505 * Check 5 times in case the hardware failed to read the docs.
506 */
507 do {
508 if (!intel_sdvo_read_byte(intel_sdvo,
509 SDVO_I2C_CMD_STATUS,
510 &status))
511 return false;
512 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
513
Chris Wilsonea5b2132010-08-04 13:50:23 +0100514 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -0800515 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800516 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800517 else
yakui_zhao342dc382009-06-02 14:12:00 +0800518 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800519
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100520 if (status != SDVO_CMD_STATUS_SUCCESS)
521 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800522
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100523 /* Read the command response */
524 for (i = 0; i < response_len; i++) {
525 if (!intel_sdvo_read_byte(intel_sdvo,
526 SDVO_I2C_RETURN_0 + i,
527 &((u8 *)response)[i]))
528 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100529 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800530 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100531 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100532 return true;
533
534log_fail:
535 DRM_LOG_KMS("\n");
536 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800537}
538
Hannes Ederb358d0a2008-12-18 21:18:47 +0100539static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800540{
541 if (mode->clock >= 100000)
542 return 1;
543 else if (mode->clock >= 50000)
544 return 2;
545 else
546 return 4;
547}
548
Chris Wilsone957d772010-09-24 12:52:03 +0100549static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
550 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800551{
Chris Wilsone957d772010-09-24 12:52:03 +0100552 return intel_sdvo_write_cmd(intel_sdvo,
553 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
554 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800555}
556
Chris Wilson32aad862010-08-04 13:50:25 +0100557static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
558{
Chris Wilsone957d772010-09-24 12:52:03 +0100559 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
Chris Wilson32aad862010-08-04 13:50:25 +0100560}
561
562static bool
563intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
564{
565 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
566 return false;
567
568 return intel_sdvo_read_response(intel_sdvo, value, len);
569}
570
571static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800572{
573 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100574 return intel_sdvo_set_value(intel_sdvo,
575 SDVO_CMD_SET_TARGET_INPUT,
576 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800577}
578
579/**
580 * Return whether each input is trained.
581 *
582 * This function is making an assumption about the layout of the response,
583 * which should be checked against the docs.
584 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100585static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800586{
587 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800588
Chris Wilson32aad862010-08-04 13:50:25 +0100589 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
590 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800591 return false;
592
593 *input_1 = response.input0_trained;
594 *input_2 = response.input1_trained;
595 return true;
596}
597
Chris Wilsonea5b2132010-08-04 13:50:23 +0100598static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800599 u16 outputs)
600{
Chris Wilson32aad862010-08-04 13:50:25 +0100601 return intel_sdvo_set_value(intel_sdvo,
602 SDVO_CMD_SET_ACTIVE_OUTPUTS,
603 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800604}
605
Chris Wilsonea5b2132010-08-04 13:50:23 +0100606static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800607 int mode)
608{
Chris Wilson32aad862010-08-04 13:50:25 +0100609 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800610
611 switch (mode) {
612 case DRM_MODE_DPMS_ON:
613 state = SDVO_ENCODER_STATE_ON;
614 break;
615 case DRM_MODE_DPMS_STANDBY:
616 state = SDVO_ENCODER_STATE_STANDBY;
617 break;
618 case DRM_MODE_DPMS_SUSPEND:
619 state = SDVO_ENCODER_STATE_SUSPEND;
620 break;
621 case DRM_MODE_DPMS_OFF:
622 state = SDVO_ENCODER_STATE_OFF;
623 break;
624 }
625
Chris Wilson32aad862010-08-04 13:50:25 +0100626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800628}
629
Chris Wilsonea5b2132010-08-04 13:50:23 +0100630static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800631 int *clock_min,
632 int *clock_max)
633{
634 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800635
Chris Wilson32aad862010-08-04 13:50:25 +0100636 if (!intel_sdvo_get_value(intel_sdvo,
637 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
638 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800639 return false;
640
641 /* Convert the values from units of 10 kHz to kHz. */
642 *clock_min = clocks.min * 10;
643 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800644 return true;
645}
646
Chris Wilsonea5b2132010-08-04 13:50:23 +0100647static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800648 u16 outputs)
649{
Chris Wilson32aad862010-08-04 13:50:25 +0100650 return intel_sdvo_set_value(intel_sdvo,
651 SDVO_CMD_SET_TARGET_OUTPUT,
652 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800653}
654
Chris Wilsonea5b2132010-08-04 13:50:23 +0100655static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800656 struct intel_sdvo_dtd *dtd)
657{
Chris Wilson32aad862010-08-04 13:50:25 +0100658 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
659 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800660}
661
Chris Wilsonea5b2132010-08-04 13:50:23 +0100662static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800663 struct intel_sdvo_dtd *dtd)
664{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100665 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800666 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
667}
668
Chris Wilsonea5b2132010-08-04 13:50:23 +0100669static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 struct intel_sdvo_dtd *dtd)
671{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100672 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800673 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
674}
675
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800676static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100677intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800678 uint16_t clock,
679 uint16_t width,
680 uint16_t height)
681{
682 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800683
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800684 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800685 args.clock = clock;
686 args.width = width;
687 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800688 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800689
Chris Wilsonea5b2132010-08-04 13:50:23 +0100690 if (intel_sdvo->is_lvds &&
691 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
692 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800693 args.scaled = 1;
694
Chris Wilson32aad862010-08-04 13:50:25 +0100695 return intel_sdvo_set_value(intel_sdvo,
696 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
697 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800698}
699
Chris Wilsonea5b2132010-08-04 13:50:23 +0100700static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800701 struct intel_sdvo_dtd *dtd)
702{
Chris Wilson32aad862010-08-04 13:50:25 +0100703 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
704 &dtd->part1, sizeof(dtd->part1)) &&
705 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
706 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800707}
Jesse Barnes79e53942008-11-07 14:24:08 -0800708
Chris Wilsonea5b2132010-08-04 13:50:23 +0100709static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800710{
Chris Wilson32aad862010-08-04 13:50:25 +0100711 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800712}
713
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800714static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100715 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800716{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800717 uint16_t width, height;
718 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
719 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800720
721 width = mode->crtc_hdisplay;
722 height = mode->crtc_vdisplay;
723
724 /* do some mode translations */
725 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
726 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
727
728 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
729 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
730
731 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
732 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
733
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800734 dtd->part1.clock = mode->clock / 10;
735 dtd->part1.h_active = width & 0xff;
736 dtd->part1.h_blank = h_blank_len & 0xff;
737 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800738 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800739 dtd->part1.v_active = height & 0xff;
740 dtd->part1.v_blank = v_blank_len & 0xff;
741 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800742 ((v_blank_len >> 8) & 0xf);
743
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800744 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800745 dtd->part2.h_sync_width = h_sync_len & 0xff;
746 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800747 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800748 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800749 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
750 ((v_sync_len & 0x30) >> 4);
751
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800752 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800753 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800755 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800756 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800757
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800758 dtd->part2.sdvo_flags = 0;
759 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
760 dtd->part2.reserved = 0;
761}
Jesse Barnes79e53942008-11-07 14:24:08 -0800762
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800763static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100764 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800765{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800766 mode->hdisplay = dtd->part1.h_active;
767 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
768 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800769 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800770 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
771 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
772 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
773 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
774
775 mode->vdisplay = dtd->part1.v_active;
776 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
777 mode->vsync_start = mode->vdisplay;
778 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800779 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800780 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
781 mode->vsync_end = mode->vsync_start +
782 (dtd->part2.v_sync_off_width & 0xf);
783 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
784 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
785 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
786
787 mode->clock = dtd->part1.clock * 10;
788
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800789 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800790 if (dtd->part2.dtd_flags & 0x2)
791 mode->flags |= DRM_MODE_FLAG_PHSYNC;
792 if (dtd->part2.dtd_flags & 0x4)
793 mode->flags |= DRM_MODE_FLAG_PVSYNC;
794}
795
Chris Wilsone27d8532010-10-22 09:15:22 +0100796static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800797{
Chris Wilsone27d8532010-10-22 09:15:22 +0100798 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800799
Chris Wilsone27d8532010-10-22 09:15:22 +0100800 return intel_sdvo_get_value(intel_sdvo,
801 SDVO_CMD_GET_SUPP_ENCODE,
802 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803}
804
Chris Wilsonea5b2132010-08-04 13:50:23 +0100805static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700806 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800807{
Chris Wilson32aad862010-08-04 13:50:25 +0100808 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800809}
810
Chris Wilsonea5b2132010-08-04 13:50:23 +0100811static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800812 uint8_t mode)
813{
Chris Wilson32aad862010-08-04 13:50:25 +0100814 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800815}
816
817#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100818static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800819{
820 int i, j;
821 uint8_t set_buf_index[2];
822 uint8_t av_split;
823 uint8_t buf_size;
824 uint8_t buf[48];
825 uint8_t *pos;
826
Chris Wilson32aad862010-08-04 13:50:25 +0100827 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800828
829 for (i = 0; i <= av_split; i++) {
830 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700831 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800832 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700833 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
834 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800835
836 pos = buf;
837 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700838 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800839 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700840 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841 pos += 8;
842 }
843 }
844}
845#endif
846
David Härdeman3c17fe42010-09-24 21:44:32 +0200847static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800848{
849 struct dip_infoframe avi_if = {
850 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200851 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800852 .len = DIP_LEN_AVI,
853 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200854 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
855 uint8_t set_buf_index[2] = { 1, 0 };
856 uint64_t *data = (uint64_t *)&avi_if;
857 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800858
David Härdeman3c17fe42010-09-24 21:44:32 +0200859 intel_dip_infoframe_csum(&avi_if);
860
861 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
862 set_buf_index, 2))
863 return false;
864
865 for (i = 0; i < sizeof(avi_if); i += 8) {
866 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
867 data, 8))
868 return false;
869 data++;
870 }
871
872 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
873 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800874}
875
Chris Wilson32aad862010-08-04 13:50:25 +0100876static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800877{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800878 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100879 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800880
Chris Wilson40039752010-08-04 13:50:26 +0100881 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800882 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100883 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800884
Chris Wilson32aad862010-08-04 13:50:25 +0100885 BUILD_BUG_ON(sizeof(format) != 6);
886 return intel_sdvo_set_value(intel_sdvo,
887 SDVO_CMD_SET_TV_FORMAT,
888 &format, sizeof(format));
889}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800890
Chris Wilson32aad862010-08-04 13:50:25 +0100891static bool
892intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
893 struct drm_display_mode *mode)
894{
895 struct intel_sdvo_dtd output_dtd;
896
897 if (!intel_sdvo_set_target_output(intel_sdvo,
898 intel_sdvo->attached_output))
899 return false;
900
901 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
902 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
903 return false;
904
905 return true;
906}
907
908static bool
909intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
910 struct drm_display_mode *mode,
911 struct drm_display_mode *adjusted_mode)
912{
Chris Wilson32aad862010-08-04 13:50:25 +0100913 /* Reset the input timing to the screen. Assume always input 0. */
914 if (!intel_sdvo_set_target_input(intel_sdvo))
915 return false;
916
917 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
918 mode->clock / 10,
919 mode->hdisplay,
920 mode->vdisplay))
921 return false;
922
923 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100924 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100925 return false;
926
Chris Wilson6c9547f2010-08-25 10:05:17 +0100927 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100928
929 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100930 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800931}
932
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800933static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
934 struct drm_display_mode *mode,
935 struct drm_display_mode *adjusted_mode)
936{
Chris Wilson890f3352010-09-14 16:46:59 +0100937 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100938 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800939
Chris Wilson32aad862010-08-04 13:50:25 +0100940 /* We need to construct preferred input timings based on our
941 * output timings. To do that, we have to set the output
942 * timings, even though this isn't really the right place in
943 * the sequence to do it. Oh well.
944 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100945 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100946 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800947 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100948
Pavel Roskinc74696b2010-09-02 14:46:34 -0400949 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
950 mode,
951 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100952 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100953 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100954 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800955 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800956
Pavel Roskinc74696b2010-09-02 14:46:34 -0400957 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
958 mode,
959 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800960 }
Chris Wilson32aad862010-08-04 13:50:25 +0100961
962 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100963 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100964 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100965 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
966 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100967
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800968 return true;
969}
970
971static void intel_sdvo_mode_set(struct drm_encoder *encoder,
972 struct drm_display_mode *mode,
973 struct drm_display_mode *adjusted_mode)
974{
975 struct drm_device *dev = encoder->dev;
976 struct drm_i915_private *dev_priv = dev->dev_private;
977 struct drm_crtc *crtc = encoder->crtc;
978 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100979 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100980 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800981 struct intel_sdvo_in_out_map in_out;
982 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +0100983 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
984 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800985
986 if (!mode)
987 return;
988
989 /* First, set the input mapping for the first input to our controlled
990 * output. This is only correct if we're a single-input device, in
991 * which case the first input is the output from the appropriate SDVO
992 * channel on the motherboard. In a two-input device, the first input
993 * will be SDVOB and the second SDVOC.
994 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100995 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800996 in_out.in1 = 0;
997
Pavel Roskinc74696b2010-09-02 14:46:34 -0400998 intel_sdvo_set_value(intel_sdvo,
999 SDVO_CMD_SET_IN_OUT_MAP,
1000 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001001
Chris Wilson6c9547f2010-08-25 10:05:17 +01001002 /* Set the output timings to the screen */
1003 if (!intel_sdvo_set_target_output(intel_sdvo,
1004 intel_sdvo->attached_output))
1005 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001006
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001007 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001008 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001009 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001010 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1011 input_dtd = intel_sdvo->input_dtd;
1012 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001013 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001014 if (!intel_sdvo_set_target_output(intel_sdvo,
1015 intel_sdvo->attached_output))
1016 return;
1017
Chris Wilson6c9547f2010-08-25 10:05:17 +01001018 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001019 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001020 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001021
1022 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001023 if (!intel_sdvo_set_target_input(intel_sdvo))
1024 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001025
Chris Wilson6c9547f2010-08-25 10:05:17 +01001026 if (intel_sdvo->is_hdmi &&
David Härdeman3c17fe42010-09-24 21:44:32 +02001027 !intel_sdvo_set_avi_infoframe(intel_sdvo))
Chris Wilson6c9547f2010-08-25 10:05:17 +01001028 return;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001029
Chris Wilson6c9547f2010-08-25 10:05:17 +01001030 if (intel_sdvo->is_tv &&
1031 !intel_sdvo_set_tv_format(intel_sdvo))
1032 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001033
Pavel Roskinc74696b2010-09-02 14:46:34 -04001034 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001035
Chris Wilson6c9547f2010-08-25 10:05:17 +01001036 switch (pixel_multiplier) {
1037 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001038 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1039 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1040 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001041 }
Chris Wilson32aad862010-08-04 13:50:25 +01001042 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1043 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001044
1045 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001046 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001047 sdvox = SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001048 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1049 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1050 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1051 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001052 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001053 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001054 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001055 case SDVOB:
1056 sdvox &= SDVOB_PRESERVE_MASK;
1057 break;
1058 case SDVOC:
1059 sdvox &= SDVOC_PRESERVE_MASK;
1060 break;
1061 }
1062 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1063 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001064 if (intel_crtc->pipe == 1)
1065 sdvox |= SDVO_PIPE_B_SELECT;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001066 if (intel_sdvo->has_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001067 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001068
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001069 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001070 /* done in crtc_mode_set as the dpll_md reg must be written early */
1071 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1072 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001073 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001074 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001075 }
1076
Chris Wilson6c9547f2010-08-25 10:05:17 +01001077 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001078 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001079 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001080}
1081
1082static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1083{
1084 struct drm_device *dev = encoder->dev;
1085 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001086 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001087 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001088 u32 temp;
1089
1090 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001091 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001092 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001093 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001094
1095 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001096 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001097 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001098 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001099 }
1100 }
1101 } else {
1102 bool input1, input2;
1103 int i;
1104 u8 status;
1105
Chris Wilsonea5b2132010-08-04 13:50:23 +01001106 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001107 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001108 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001109 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001110 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001111
Chris Wilson32aad862010-08-04 13:50:25 +01001112 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001113 /* Warn if the device reported failure to sync.
1114 * A lot of SDVO devices fail to notify of sync, but it's
1115 * a given it the status is a success, we succeeded.
1116 */
1117 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001118 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001119 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001120 }
1121
1122 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001123 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1124 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001125 }
1126 return;
1127}
1128
Jesse Barnes79e53942008-11-07 14:24:08 -08001129static int intel_sdvo_mode_valid(struct drm_connector *connector,
1130 struct drm_display_mode *mode)
1131{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001132 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001133
1134 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1135 return MODE_NO_DBLESCAN;
1136
Chris Wilsonea5b2132010-08-04 13:50:23 +01001137 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001138 return MODE_CLOCK_LOW;
1139
Chris Wilsonea5b2132010-08-04 13:50:23 +01001140 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001141 return MODE_CLOCK_HIGH;
1142
Chris Wilson85454232010-08-08 14:28:23 +01001143 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001144 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001145 return MODE_PANEL;
1146
Chris Wilsonea5b2132010-08-04 13:50:23 +01001147 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001148 return MODE_PANEL;
1149 }
1150
Jesse Barnes79e53942008-11-07 14:24:08 -08001151 return MODE_OK;
1152}
1153
Chris Wilsonea5b2132010-08-04 13:50:23 +01001154static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001155{
Chris Wilsone957d772010-09-24 12:52:03 +01001156 if (!intel_sdvo_get_value(intel_sdvo,
1157 SDVO_CMD_GET_DEVICE_CAPS,
1158 caps, sizeof(*caps)))
1159 return false;
1160
1161 DRM_DEBUG_KMS("SDVO capabilities:\n"
1162 " vendor_id: %d\n"
1163 " device_id: %d\n"
1164 " device_rev_id: %d\n"
1165 " sdvo_version_major: %d\n"
1166 " sdvo_version_minor: %d\n"
1167 " sdvo_inputs_mask: %d\n"
1168 " smooth_scaling: %d\n"
1169 " sharp_scaling: %d\n"
1170 " up_scaling: %d\n"
1171 " down_scaling: %d\n"
1172 " stall_support: %d\n"
1173 " output_flags: %d\n",
1174 caps->vendor_id,
1175 caps->device_id,
1176 caps->device_rev_id,
1177 caps->sdvo_version_major,
1178 caps->sdvo_version_minor,
1179 caps->sdvo_inputs_mask,
1180 caps->smooth_scaling,
1181 caps->sharp_scaling,
1182 caps->up_scaling,
1183 caps->down_scaling,
1184 caps->stall_support,
1185 caps->output_flags);
1186
1187 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001188}
1189
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001190/* No use! */
1191#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001192struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1193{
1194 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001195 struct intel_sdvo *iout = NULL;
1196 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001197
1198 /* find the sdvo connector */
1199 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001200 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001201
1202 if (iout->type != INTEL_OUTPUT_SDVO)
1203 continue;
1204
1205 sdvo = iout->dev_priv;
1206
Eric Anholtc751ce42010-03-25 11:48:48 -07001207 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001208 return connector;
1209
Eric Anholtc751ce42010-03-25 11:48:48 -07001210 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001211 return connector;
1212
1213 }
1214
1215 return NULL;
1216}
1217
1218int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1219{
1220 u8 response[2];
1221 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001222 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001223 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001224
1225 if (!connector)
1226 return 0;
1227
Chris Wilsonea5b2132010-08-04 13:50:23 +01001228 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001229
Chris Wilson32aad862010-08-04 13:50:25 +01001230 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1231 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001232}
1233
1234void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1235{
1236 u8 response[2];
1237 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001238 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001239
Chris Wilsonea5b2132010-08-04 13:50:23 +01001240 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1241 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001242
1243 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001244 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1245 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001246
Chris Wilsonea5b2132010-08-04 13:50:23 +01001247 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001248 } else {
1249 response[0] = 0;
1250 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001251 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001252 }
1253
Chris Wilsonea5b2132010-08-04 13:50:23 +01001254 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1255 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001256}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001257#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001258
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001259static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001260intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001261{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001262 int caps = 0;
1263
Chris Wilsonea5b2132010-08-04 13:50:23 +01001264 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001265 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1266 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001267 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001268 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1269 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001270 if (intel_sdvo->caps.output_flags &
Roel Kluin19e1f882009-08-09 13:50:53 +02001271 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001272 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001273 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001274 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1275 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001276 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001277 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1278 caps++;
1279
Chris Wilsonea5b2132010-08-04 13:50:23 +01001280 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001281 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1282 caps++;
1283
Chris Wilsonea5b2132010-08-04 13:50:23 +01001284 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001285 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1286 caps++;
1287
1288 return (caps > 1);
1289}
1290
Chris Wilsonf899fc62010-07-20 15:44:45 -07001291static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001292intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001293{
Chris Wilsone957d772010-09-24 12:52:03 +01001294 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1295 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001296}
1297
Keith Packard57cdaf92009-09-04 13:07:54 +08001298static struct drm_connector *
1299intel_find_analog_connector(struct drm_device *dev)
1300{
1301 struct drm_connector *connector;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001302 struct intel_sdvo *encoder;
Keith Packard57cdaf92009-09-04 13:07:54 +08001303
Chris Wilsondf0e9242010-09-09 16:20:55 +01001304 list_for_each_entry(encoder,
1305 &dev->mode_config.encoder_list,
1306 base.base.head) {
1307 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1308 list_for_each_entry(connector,
1309 &dev->mode_config.connector_list,
1310 head) {
1311 if (&encoder->base ==
1312 intel_attached_encoder(connector))
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001313 return connector;
1314 }
1315 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001316 }
Chris Wilsondf0e9242010-09-09 16:20:55 +01001317
Keith Packard57cdaf92009-09-04 13:07:54 +08001318 return NULL;
1319}
1320
1321static int
1322intel_analog_is_connected(struct drm_device *dev)
1323{
1324 struct drm_connector *analog_connector;
Keith Packard57cdaf92009-09-04 13:07:54 +08001325
Chris Wilson32aad862010-08-04 13:50:25 +01001326 analog_connector = intel_find_analog_connector(dev);
Keith Packard57cdaf92009-09-04 13:07:54 +08001327 if (!analog_connector)
1328 return false;
1329
Chris Wilson930a9e22010-09-14 11:07:23 +01001330 if (analog_connector->funcs->detect(analog_connector, false) ==
Keith Packard57cdaf92009-09-04 13:07:54 +08001331 connector_status_disconnected)
1332 return false;
1333
1334 return true;
1335}
1336
Chris Wilsonff482d82010-09-15 10:40:38 +01001337/* Mac mini hack -- use the same DDC as the analog connector */
1338static struct edid *
1339intel_sdvo_get_analog_edid(struct drm_connector *connector)
1340{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001341 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001342
Chris Wilsonf899fc62010-07-20 15:44:45 -07001343 if (!intel_analog_is_connected(connector->dev))
Chris Wilsonff482d82010-09-15 10:40:38 +01001344 return NULL;
1345
Chris Wilsonf899fc62010-07-20 15:44:45 -07001346 return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001347}
1348
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +08001349enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001350intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001351{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001352 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001353 enum drm_connector_status status;
1354 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001355
Chris Wilsone957d772010-09-24 12:52:03 +01001356 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001357
Chris Wilsonea5b2132010-08-04 13:50:23 +01001358 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001359 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001360
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001361 /*
1362 * Don't use the 1 as the argument of DDC bus switch to get
1363 * the EDID. It is used for SDVO SPD ROM.
1364 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001365 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001366 intel_sdvo->ddc_bus = ddc;
1367 edid = intel_sdvo_get_edid(connector);
1368 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001369 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001370 }
Chris Wilsone957d772010-09-24 12:52:03 +01001371 /*
1372 * If we found the EDID on the other bus,
1373 * assume that is the correct DDC bus.
1374 */
1375 if (edid == NULL)
1376 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001377 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001378
1379 /*
1380 * When there is no edid and no monitor is connected with VGA
1381 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001382 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001383 if (edid == NULL)
1384 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001385
Chris Wilson2f551c82010-09-15 10:42:50 +01001386 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001387 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001388 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001389 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1390 status = connector_status_connected;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001391 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001392 intel_sdvo->has_audio = drm_detect_monitor_audio(edid);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001393 }
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001394 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001395 kfree(edid);
1396 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001397
1398 if (status == connector_status_connected) {
1399 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1400 if (intel_sdvo_connector->force_audio)
1401 intel_sdvo->has_audio = intel_sdvo_connector->force_audio > 0;
1402 }
1403
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +08001404 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001405}
1406
Chris Wilson7b334fc2010-09-09 23:51:02 +01001407static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001408intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001409{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001410 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001411 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001412 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001413 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001414
Chris Wilson32aad862010-08-04 13:50:25 +01001415 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001416 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001417 return connector_status_unknown;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001418 if (intel_sdvo->is_tv) {
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001419 /* add 30ms delay when the output type is SDVO-TV */
1420 mdelay(30);
1421 }
Chris Wilson32aad862010-08-04 13:50:25 +01001422 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1423 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001424
Chris Wilsone957d772010-09-24 12:52:03 +01001425 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1426 response & 0xff, response >> 8,
1427 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001428
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001429 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001430 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001431
Chris Wilsonea5b2132010-08-04 13:50:23 +01001432 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001433
Chris Wilson615fb932010-08-04 13:50:24 +01001434 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001435 ret = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001436 else if (response & SDVO_TMDS_MASK)
1437 ret = intel_sdvo_hdmi_sink_detect(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001438 else
1439 ret = connector_status_connected;
1440
1441 /* May update encoder flag for like clock for SDVO TV, etc.*/
1442 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001443 intel_sdvo->is_tv = false;
1444 intel_sdvo->is_lvds = false;
1445 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001446
1447 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001448 intel_sdvo->is_tv = true;
1449 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001450 }
1451 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001452 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001453 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001454
1455 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001456}
1457
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001458static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001459{
Chris Wilsonff482d82010-09-15 10:40:38 +01001460 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001461
1462 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001463 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001464
Keith Packard57cdaf92009-09-04 13:07:54 +08001465 /*
1466 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1467 * link between analog and digital outputs. So, if the regular SDVO
1468 * DDC fails, check to see if the analog output is disconnected, in
1469 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001470 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001471 if (edid == NULL)
1472 edid = intel_sdvo_get_analog_edid(connector);
1473
Chris Wilsonff482d82010-09-15 10:40:38 +01001474 if (edid != NULL) {
1475 drm_mode_connector_update_edid_property(connector, edid);
1476 drm_add_edid_modes(connector, edid);
1477 connector->display_info.raw_edid = NULL;
1478 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001479 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001480}
1481
1482/*
1483 * Set of SDVO TV modes.
1484 * Note! This is in reply order (see loop in get_tv_modes).
1485 * XXX: all 60Hz refresh?
1486 */
1487struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001488 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1489 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1492 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001494 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1495 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001497 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1498 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001500 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1501 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001503 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1504 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001506 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1507 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001509 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1510 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001512 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1513 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001515 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1516 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001518 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1519 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001521 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1522 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001524 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1525 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001527 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1528 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001530 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1531 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001533 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1534 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001536 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1537 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001538 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001539 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1540 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001541 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001542 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1543 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1545};
1546
1547static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1548{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001549 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001550 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001551 uint32_t reply = 0, format_map = 0;
1552 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001553
1554 /* Read the list of supported input resolutions for the selected TV
1555 * format.
1556 */
Chris Wilson40039752010-08-04 13:50:26 +01001557 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001558 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001559 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001560
Chris Wilson32aad862010-08-04 13:50:25 +01001561 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1562 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001563
Chris Wilson32aad862010-08-04 13:50:25 +01001564 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001565 if (!intel_sdvo_write_cmd(intel_sdvo,
1566 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001567 &tv_res, sizeof(tv_res)))
1568 return;
1569 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001570 return;
1571
1572 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001573 if (reply & (1 << i)) {
1574 struct drm_display_mode *nmode;
1575 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001576 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001577 if (nmode)
1578 drm_mode_probed_add(connector, nmode);
1579 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001580}
1581
Ma Ling7086c872009-05-13 11:20:06 +08001582static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1583{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001584 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001585 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001586 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001587
1588 /*
1589 * Attempt to get the mode list from DDC.
1590 * Assume that the preferred modes are
1591 * arranged in priority order.
1592 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001593 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001594 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001595 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001596
1597 /* Fetch modes from VBT */
1598 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001599 newmode = drm_mode_duplicate(connector->dev,
1600 dev_priv->sdvo_lvds_vbt_mode);
1601 if (newmode != NULL) {
1602 /* Guarantee the mode is preferred */
1603 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1604 DRM_MODE_TYPE_DRIVER);
1605 drm_mode_probed_add(connector, newmode);
1606 }
1607 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001608
1609end:
1610 list_for_each_entry(newmode, &connector->probed_modes, head) {
1611 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001612 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001613 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001614
1615 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1616 0);
1617
Chris Wilson85454232010-08-08 14:28:23 +01001618 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001619 break;
1620 }
1621 }
1622
Ma Ling7086c872009-05-13 11:20:06 +08001623}
1624
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001625static int intel_sdvo_get_modes(struct drm_connector *connector)
1626{
Chris Wilson615fb932010-08-04 13:50:24 +01001627 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001628
Chris Wilson615fb932010-08-04 13:50:24 +01001629 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001630 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001631 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001632 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001633 else
1634 intel_sdvo_get_ddc_modes(connector);
1635
Chris Wilson32aad862010-08-04 13:50:25 +01001636 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001637}
1638
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001639static void
1640intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001641{
Chris Wilson615fb932010-08-04 13:50:24 +01001642 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001643 struct drm_device *dev = connector->dev;
1644
Chris Wilsonc5521702010-08-04 13:50:28 +01001645 if (intel_sdvo_connector->left)
1646 drm_property_destroy(dev, intel_sdvo_connector->left);
1647 if (intel_sdvo_connector->right)
1648 drm_property_destroy(dev, intel_sdvo_connector->right);
1649 if (intel_sdvo_connector->top)
1650 drm_property_destroy(dev, intel_sdvo_connector->top);
1651 if (intel_sdvo_connector->bottom)
1652 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1653 if (intel_sdvo_connector->hpos)
1654 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1655 if (intel_sdvo_connector->vpos)
1656 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1657 if (intel_sdvo_connector->saturation)
1658 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1659 if (intel_sdvo_connector->contrast)
1660 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1661 if (intel_sdvo_connector->hue)
1662 drm_property_destroy(dev, intel_sdvo_connector->hue);
1663 if (intel_sdvo_connector->sharpness)
1664 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1665 if (intel_sdvo_connector->flicker_filter)
1666 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1667 if (intel_sdvo_connector->flicker_filter_2d)
1668 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1669 if (intel_sdvo_connector->flicker_filter_adaptive)
1670 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1671 if (intel_sdvo_connector->tv_luma_filter)
1672 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1673 if (intel_sdvo_connector->tv_chroma_filter)
1674 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001675 if (intel_sdvo_connector->dot_crawl)
1676 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001677 if (intel_sdvo_connector->brightness)
1678 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001679}
1680
Jesse Barnes79e53942008-11-07 14:24:08 -08001681static void intel_sdvo_destroy(struct drm_connector *connector)
1682{
Chris Wilson615fb932010-08-04 13:50:24 +01001683 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001684
Chris Wilsonc5521702010-08-04 13:50:28 +01001685 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001686 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001687 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001688
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001689 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001690 drm_sysfs_connector_remove(connector);
1691 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001692 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001693}
1694
Zhao Yakuice6feab2009-08-24 13:50:26 +08001695static int
1696intel_sdvo_set_property(struct drm_connector *connector,
1697 struct drm_property *property,
1698 uint64_t val)
1699{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001700 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001701 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001702 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001703 uint8_t cmd;
1704 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001705
1706 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001707 if (ret)
1708 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001709
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001710 if (property == intel_sdvo_connector->force_audio_property) {
1711 if (val == intel_sdvo_connector->force_audio)
1712 return 0;
1713
1714 intel_sdvo_connector->force_audio = val;
1715
1716 if (val > 0 && intel_sdvo->has_audio)
1717 return 0;
1718 if (val < 0 && !intel_sdvo->has_audio)
1719 return 0;
1720
1721 intel_sdvo->has_audio = val > 0;
1722 goto done;
1723 }
1724
Chris Wilsonc5521702010-08-04 13:50:28 +01001725#define CHECK_PROPERTY(name, NAME) \
1726 if (intel_sdvo_connector->name == property) { \
1727 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1728 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1729 cmd = SDVO_CMD_SET_##NAME; \
1730 intel_sdvo_connector->cur_##name = temp_value; \
1731 goto set_value; \
1732 }
1733
1734 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001735 if (val >= TV_FORMAT_NUM)
1736 return -EINVAL;
1737
Chris Wilson40039752010-08-04 13:50:26 +01001738 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001739 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001740 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001741
Chris Wilson40039752010-08-04 13:50:26 +01001742 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001743 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001744 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001745 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001746 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001747 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001748 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001749 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001750 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001751
Chris Wilson615fb932010-08-04 13:50:24 +01001752 intel_sdvo_connector->left_margin = temp_value;
1753 intel_sdvo_connector->right_margin = temp_value;
1754 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001755 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001756 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001757 goto set_value;
1758 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001759 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001760 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001761 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001762 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001763
Chris Wilson615fb932010-08-04 13:50:24 +01001764 intel_sdvo_connector->left_margin = temp_value;
1765 intel_sdvo_connector->right_margin = temp_value;
1766 temp_value = intel_sdvo_connector->max_hscan -
1767 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001768 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001769 goto set_value;
1770 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001771 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001772 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001773 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001774 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001775
Chris Wilson615fb932010-08-04 13:50:24 +01001776 intel_sdvo_connector->top_margin = temp_value;
1777 intel_sdvo_connector->bottom_margin = temp_value;
1778 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001779 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001780 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001781 goto set_value;
1782 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001783 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001784 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001785 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001786 return 0;
1787
Chris Wilson615fb932010-08-04 13:50:24 +01001788 intel_sdvo_connector->top_margin = temp_value;
1789 intel_sdvo_connector->bottom_margin = temp_value;
1790 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001791 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001792 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001793 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001794 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001795 CHECK_PROPERTY(hpos, HPOS)
1796 CHECK_PROPERTY(vpos, VPOS)
1797 CHECK_PROPERTY(saturation, SATURATION)
1798 CHECK_PROPERTY(contrast, CONTRAST)
1799 CHECK_PROPERTY(hue, HUE)
1800 CHECK_PROPERTY(brightness, BRIGHTNESS)
1801 CHECK_PROPERTY(sharpness, SHARPNESS)
1802 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1803 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1804 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1805 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1806 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001807 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001808 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001809
1810 return -EINVAL; /* unknown property */
1811
1812set_value:
1813 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1814 return -EIO;
1815
1816
1817done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001818 if (intel_sdvo->base.base.crtc) {
1819 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001820 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001821 crtc->y, crtc->fb);
1822 }
1823
Chris Wilson32aad862010-08-04 13:50:25 +01001824 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001825#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001826}
1827
Jesse Barnes79e53942008-11-07 14:24:08 -08001828static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1829 .dpms = intel_sdvo_dpms,
1830 .mode_fixup = intel_sdvo_mode_fixup,
1831 .prepare = intel_encoder_prepare,
1832 .mode_set = intel_sdvo_mode_set,
1833 .commit = intel_encoder_commit,
1834};
1835
1836static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001837 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001838 .detect = intel_sdvo_detect,
1839 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001840 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001841 .destroy = intel_sdvo_destroy,
1842};
1843
1844static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1845 .get_modes = intel_sdvo_get_modes,
1846 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001847 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001848};
1849
Hannes Ederb358d0a2008-12-18 21:18:47 +01001850static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001851{
Chris Wilson890f3352010-09-14 16:46:59 +01001852 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001853
Chris Wilsonea5b2132010-08-04 13:50:23 +01001854 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001855 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001856 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001857
Chris Wilsone957d772010-09-24 12:52:03 +01001858 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001859 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001860}
1861
1862static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1863 .destroy = intel_sdvo_enc_destroy,
1864};
1865
Chris Wilsonb66d8422010-08-12 15:26:41 +01001866static void
1867intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1868{
1869 uint16_t mask = 0;
1870 unsigned int num_bits;
1871
1872 /* Make a mask of outputs less than or equal to our own priority in the
1873 * list.
1874 */
1875 switch (sdvo->controlled_output) {
1876 case SDVO_OUTPUT_LVDS1:
1877 mask |= SDVO_OUTPUT_LVDS1;
1878 case SDVO_OUTPUT_LVDS0:
1879 mask |= SDVO_OUTPUT_LVDS0;
1880 case SDVO_OUTPUT_TMDS1:
1881 mask |= SDVO_OUTPUT_TMDS1;
1882 case SDVO_OUTPUT_TMDS0:
1883 mask |= SDVO_OUTPUT_TMDS0;
1884 case SDVO_OUTPUT_RGB1:
1885 mask |= SDVO_OUTPUT_RGB1;
1886 case SDVO_OUTPUT_RGB0:
1887 mask |= SDVO_OUTPUT_RGB0;
1888 break;
1889 }
1890
1891 /* Count bits to find what number we are in the priority list. */
1892 mask &= sdvo->caps.output_flags;
1893 num_bits = hweight16(mask);
1894 /* If more than 3 outputs, default to DDC bus 3 for now. */
1895 if (num_bits > 3)
1896 num_bits = 3;
1897
1898 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1899 sdvo->ddc_bus = 1 << num_bits;
1900}
Jesse Barnes79e53942008-11-07 14:24:08 -08001901
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001902/**
1903 * Choose the appropriate DDC bus for control bus switch command for this
1904 * SDVO output based on the controlled output.
1905 *
1906 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1907 * outputs, then LVDS outputs.
1908 */
1909static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001910intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001911 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001912{
Adam Jacksonb1083332010-04-23 16:07:40 -04001913 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001914
Adam Jacksonb1083332010-04-23 16:07:40 -04001915 if (IS_SDVOB(reg))
1916 mapping = &(dev_priv->sdvo_mappings[0]);
1917 else
1918 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001919
Chris Wilsonb66d8422010-08-12 15:26:41 +01001920 if (mapping->initialized)
1921 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1922 else
1923 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001924}
1925
Chris Wilsone957d772010-09-24 12:52:03 +01001926static void
1927intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1928 struct intel_sdvo *sdvo, u32 reg)
1929{
1930 struct sdvo_device_mapping *mapping;
1931 u8 pin, speed;
1932
1933 if (IS_SDVOB(reg))
1934 mapping = &dev_priv->sdvo_mappings[0];
1935 else
1936 mapping = &dev_priv->sdvo_mappings[1];
1937
1938 pin = GMBUS_PORT_DPB;
1939 speed = GMBUS_RATE_1MHZ >> 8;
1940 if (mapping->initialized) {
1941 pin = mapping->i2c_pin;
1942 speed = mapping->i2c_speed;
1943 }
1944
1945 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1946 intel_gmbus_set_speed(sdvo->i2c, speed);
1947 intel_gmbus_force_bit(sdvo->i2c, true);
1948}
1949
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001950static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001951intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001952{
Chris Wilsone27d8532010-10-22 09:15:22 +01001953 int is_hdmi;
1954
1955 if (!intel_sdvo_check_supp_encode(intel_sdvo))
1956 return false;
1957
1958 if (!intel_sdvo_set_target_output(intel_sdvo,
1959 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1))
1960 return false;
1961
1962 is_hdmi = 0;
1963 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, &is_hdmi, 1))
1964 return false;
1965
1966 return !!is_hdmi;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001967}
1968
yakui_zhao714605e2009-05-31 17:18:07 +08001969static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001970intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001971{
1972 struct drm_i915_private *dev_priv = dev->dev_private;
1973 struct sdvo_device_mapping *my_mapping, *other_mapping;
1974
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001975 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001976 my_mapping = &dev_priv->sdvo_mappings[0];
1977 other_mapping = &dev_priv->sdvo_mappings[1];
1978 } else {
1979 my_mapping = &dev_priv->sdvo_mappings[1];
1980 other_mapping = &dev_priv->sdvo_mappings[0];
1981 }
1982
1983 /* If the BIOS described our SDVO device, take advantage of it. */
1984 if (my_mapping->slave_addr)
1985 return my_mapping->slave_addr;
1986
1987 /* If the BIOS only described a different SDVO device, use the
1988 * address that it isn't using.
1989 */
1990 if (other_mapping->slave_addr) {
1991 if (other_mapping->slave_addr == 0x70)
1992 return 0x72;
1993 else
1994 return 0x70;
1995 }
1996
1997 /* No SDVO device info is found for another DVO port,
1998 * so use mapping assumption we had before BIOS parsing.
1999 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002000 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08002001 return 0x70;
2002 else
2003 return 0x72;
2004}
2005
Zhenyu Wang14571b42010-03-30 14:06:33 +08002006static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002007intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2008 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002009{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002010 drm_connector_init(encoder->base.base.dev,
2011 &connector->base.base,
2012 &intel_sdvo_connector_funcs,
2013 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002014
Chris Wilsondf0e9242010-09-09 16:20:55 +01002015 drm_connector_helper_add(&connector->base.base,
2016 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002017
Chris Wilsondf0e9242010-09-09 16:20:55 +01002018 connector->base.base.interlace_allowed = 0;
2019 connector->base.base.doublescan_allowed = 0;
2020 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002021
Chris Wilsondf0e9242010-09-09 16:20:55 +01002022 intel_connector_attach_encoder(&connector->base, &encoder->base);
2023 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002024}
2025
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002026static void
2027intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2028{
2029 struct drm_device *dev = connector->base.base.dev;
2030
2031 connector->force_audio_property =
2032 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2033 if (connector->force_audio_property) {
2034 connector->force_audio_property->values[0] = -1;
2035 connector->force_audio_property->values[1] = 1;
2036 drm_connector_attach_property(&connector->base.base,
2037 connector->force_audio_property, 0);
2038 }
2039}
2040
Zhenyu Wang14571b42010-03-30 14:06:33 +08002041static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002042intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002043{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002044 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002045 struct drm_connector *connector;
2046 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002047 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002048
Chris Wilson615fb932010-08-04 13:50:24 +01002049 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2050 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002051 return false;
2052
Zhenyu Wang14571b42010-03-30 14:06:33 +08002053 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002054 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002055 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002056 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002057 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002058 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002059 }
2060
Chris Wilson615fb932010-08-04 13:50:24 +01002061 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002062 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002063 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002064 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2065 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2066
Chris Wilsone27d8532010-10-22 09:15:22 +01002067 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002068 /* enable hdmi encoding mode if supported */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002069 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2070 intel_sdvo_set_colorimetry(intel_sdvo,
Zhenyu Wang14571b42010-03-30 14:06:33 +08002071 SDVO_COLORIMETRY_RGB256);
2072 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002073 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002074 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002075 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2076 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002077
Chris Wilsondf0e9242010-09-09 16:20:55 +01002078 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002079
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002080 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2081
Zhenyu Wang14571b42010-03-30 14:06:33 +08002082 return true;
2083}
2084
2085static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002086intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002087{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002088 struct drm_encoder *encoder = &intel_sdvo->base.base;
2089 struct drm_connector *connector;
2090 struct intel_connector *intel_connector;
2091 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002092
Chris Wilson615fb932010-08-04 13:50:24 +01002093 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2094 if (!intel_sdvo_connector)
2095 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002096
Chris Wilson615fb932010-08-04 13:50:24 +01002097 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002098 connector = &intel_connector->base;
2099 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2100 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002101
Chris Wilson4ef69c72010-09-09 15:14:28 +01002102 intel_sdvo->controlled_output |= type;
2103 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002104
Chris Wilson4ef69c72010-09-09 15:14:28 +01002105 intel_sdvo->is_tv = true;
2106 intel_sdvo->base.needs_tv_clock = true;
2107 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002108
Chris Wilsondf0e9242010-09-09 16:20:55 +01002109 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002110
Chris Wilson4ef69c72010-09-09 15:14:28 +01002111 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002112 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002113
Chris Wilson4ef69c72010-09-09 15:14:28 +01002114 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002115 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002116
Chris Wilson4ef69c72010-09-09 15:14:28 +01002117 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002118
2119err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002120 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002121 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002122}
2123
2124static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002125intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002126{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002127 struct drm_encoder *encoder = &intel_sdvo->base.base;
2128 struct drm_connector *connector;
2129 struct intel_connector *intel_connector;
2130 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002131
Chris Wilson615fb932010-08-04 13:50:24 +01002132 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2133 if (!intel_sdvo_connector)
2134 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002135
Chris Wilson615fb932010-08-04 13:50:24 +01002136 intel_connector = &intel_sdvo_connector->base;
2137 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002138 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2139 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2140 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002141
Chris Wilson4ef69c72010-09-09 15:14:28 +01002142 if (device == 0) {
2143 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2144 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2145 } else if (device == 1) {
2146 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2147 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2148 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002149
Chris Wilson4ef69c72010-09-09 15:14:28 +01002150 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2151 (1 << INTEL_ANALOG_CLONE_BIT));
2152
Chris Wilsondf0e9242010-09-09 16:20:55 +01002153 intel_sdvo_connector_init(intel_sdvo_connector,
2154 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002155 return true;
2156}
2157
2158static bool
2159intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2160{
2161 struct drm_encoder *encoder = &intel_sdvo->base.base;
2162 struct drm_connector *connector;
2163 struct intel_connector *intel_connector;
2164 struct intel_sdvo_connector *intel_sdvo_connector;
2165
2166 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2167 if (!intel_sdvo_connector)
2168 return false;
2169
2170 intel_connector = &intel_sdvo_connector->base;
2171 connector = &intel_connector->base;
2172 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2173 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2174
2175 if (device == 0) {
2176 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2177 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2178 } else if (device == 1) {
2179 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2180 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2181 }
2182
2183 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002184 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002185
Chris Wilsondf0e9242010-09-09 16:20:55 +01002186 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002187 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002188 goto err;
2189
2190 return true;
2191
2192err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002193 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002194 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002195}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002196
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002197static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002198intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002199{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002200 intel_sdvo->is_tv = false;
2201 intel_sdvo->base.needs_tv_clock = false;
2202 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002203
Zhenyu Wang14571b42010-03-30 14:06:33 +08002204 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002205
Zhenyu Wang14571b42010-03-30 14:06:33 +08002206 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002207 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002208 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002209
Zhenyu Wang14571b42010-03-30 14:06:33 +08002210 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002211 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002212 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002213
Zhenyu Wang14571b42010-03-30 14:06:33 +08002214 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7f2010-03-29 23:16:13 +08002215 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002216 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002217 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002218
Zhenyu Wang14571b42010-03-30 14:06:33 +08002219 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002220 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002221 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002222
Zhenyu Wang14571b42010-03-30 14:06:33 +08002223 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002224 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002225 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002226
Zhenyu Wang14571b42010-03-30 14:06:33 +08002227 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002228 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002230
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002232 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002233 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002234
Zhenyu Wang14571b42010-03-30 14:06:33 +08002235 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002236 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002237 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002238
Zhenyu Wang14571b42010-03-30 14:06:33 +08002239 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002240 unsigned char bytes[2];
2241
Chris Wilsonea5b2132010-08-04 13:50:23 +01002242 intel_sdvo->controlled_output = 0;
2243 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002244 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002245 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002246 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002247 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002248 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002249 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002250
Zhenyu Wang14571b42010-03-30 14:06:33 +08002251 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002252}
2253
Chris Wilson32aad862010-08-04 13:50:25 +01002254static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2255 struct intel_sdvo_connector *intel_sdvo_connector,
2256 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002257{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002258 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002259 struct intel_sdvo_tv_format format;
2260 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002261
Chris Wilson32aad862010-08-04 13:50:25 +01002262 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2263 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002264
Chris Wilson32aad862010-08-04 13:50:25 +01002265 if (!intel_sdvo_get_value(intel_sdvo,
2266 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2267 &format, sizeof(format)))
2268 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002269
Chris Wilson32aad862010-08-04 13:50:25 +01002270 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002271
2272 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002273 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002274
Chris Wilson615fb932010-08-04 13:50:24 +01002275 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002276 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002277 if (format_map & (1 << i))
2278 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002279
2280
Chris Wilsonc5521702010-08-04 13:50:28 +01002281 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002282 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2283 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002284 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002285 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002286
Chris Wilson615fb932010-08-04 13:50:24 +01002287 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002288 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002289 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002290 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002291
Chris Wilson40039752010-08-04 13:50:26 +01002292 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002293 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002294 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002295 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002296
2297}
2298
Chris Wilsonc5521702010-08-04 13:50:28 +01002299#define ENHANCEMENT(name, NAME) do { \
2300 if (enhancements.name) { \
2301 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2302 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2303 return false; \
2304 intel_sdvo_connector->max_##name = data_value[0]; \
2305 intel_sdvo_connector->cur_##name = response; \
2306 intel_sdvo_connector->name = \
2307 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2308 if (!intel_sdvo_connector->name) return false; \
2309 intel_sdvo_connector->name->values[0] = 0; \
2310 intel_sdvo_connector->name->values[1] = data_value[0]; \
2311 drm_connector_attach_property(connector, \
2312 intel_sdvo_connector->name, \
2313 intel_sdvo_connector->cur_##name); \
2314 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2315 data_value[0], data_value[1], response); \
2316 } \
2317} while(0)
2318
2319static bool
2320intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2321 struct intel_sdvo_connector *intel_sdvo_connector,
2322 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002323{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002324 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002325 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002326 uint16_t response, data_value[2];
2327
Chris Wilsonc5521702010-08-04 13:50:28 +01002328 /* when horizontal overscan is supported, Add the left/right property */
2329 if (enhancements.overscan_h) {
2330 if (!intel_sdvo_get_value(intel_sdvo,
2331 SDVO_CMD_GET_MAX_OVERSCAN_H,
2332 &data_value, 4))
2333 return false;
2334
2335 if (!intel_sdvo_get_value(intel_sdvo,
2336 SDVO_CMD_GET_OVERSCAN_H,
2337 &response, 2))
2338 return false;
2339
2340 intel_sdvo_connector->max_hscan = data_value[0];
2341 intel_sdvo_connector->left_margin = data_value[0] - response;
2342 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2343 intel_sdvo_connector->left =
2344 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2345 "left_margin", 2);
2346 if (!intel_sdvo_connector->left)
2347 return false;
2348
2349 intel_sdvo_connector->left->values[0] = 0;
2350 intel_sdvo_connector->left->values[1] = data_value[0];
2351 drm_connector_attach_property(connector,
2352 intel_sdvo_connector->left,
2353 intel_sdvo_connector->left_margin);
2354
2355 intel_sdvo_connector->right =
2356 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2357 "right_margin", 2);
2358 if (!intel_sdvo_connector->right)
2359 return false;
2360
2361 intel_sdvo_connector->right->values[0] = 0;
2362 intel_sdvo_connector->right->values[1] = data_value[0];
2363 drm_connector_attach_property(connector,
2364 intel_sdvo_connector->right,
2365 intel_sdvo_connector->right_margin);
2366 DRM_DEBUG_KMS("h_overscan: max %d, "
2367 "default %d, current %d\n",
2368 data_value[0], data_value[1], response);
2369 }
2370
2371 if (enhancements.overscan_v) {
2372 if (!intel_sdvo_get_value(intel_sdvo,
2373 SDVO_CMD_GET_MAX_OVERSCAN_V,
2374 &data_value, 4))
2375 return false;
2376
2377 if (!intel_sdvo_get_value(intel_sdvo,
2378 SDVO_CMD_GET_OVERSCAN_V,
2379 &response, 2))
2380 return false;
2381
2382 intel_sdvo_connector->max_vscan = data_value[0];
2383 intel_sdvo_connector->top_margin = data_value[0] - response;
2384 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2385 intel_sdvo_connector->top =
2386 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2387 "top_margin", 2);
2388 if (!intel_sdvo_connector->top)
2389 return false;
2390
2391 intel_sdvo_connector->top->values[0] = 0;
2392 intel_sdvo_connector->top->values[1] = data_value[0];
2393 drm_connector_attach_property(connector,
2394 intel_sdvo_connector->top,
2395 intel_sdvo_connector->top_margin);
2396
2397 intel_sdvo_connector->bottom =
2398 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2399 "bottom_margin", 2);
2400 if (!intel_sdvo_connector->bottom)
2401 return false;
2402
2403 intel_sdvo_connector->bottom->values[0] = 0;
2404 intel_sdvo_connector->bottom->values[1] = data_value[0];
2405 drm_connector_attach_property(connector,
2406 intel_sdvo_connector->bottom,
2407 intel_sdvo_connector->bottom_margin);
2408 DRM_DEBUG_KMS("v_overscan: max %d, "
2409 "default %d, current %d\n",
2410 data_value[0], data_value[1], response);
2411 }
2412
2413 ENHANCEMENT(hpos, HPOS);
2414 ENHANCEMENT(vpos, VPOS);
2415 ENHANCEMENT(saturation, SATURATION);
2416 ENHANCEMENT(contrast, CONTRAST);
2417 ENHANCEMENT(hue, HUE);
2418 ENHANCEMENT(sharpness, SHARPNESS);
2419 ENHANCEMENT(brightness, BRIGHTNESS);
2420 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2421 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2422 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2423 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2424 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2425
Chris Wilsone0442182010-08-04 13:50:29 +01002426 if (enhancements.dot_crawl) {
2427 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2428 return false;
2429
2430 intel_sdvo_connector->max_dot_crawl = 1;
2431 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2432 intel_sdvo_connector->dot_crawl =
2433 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2434 if (!intel_sdvo_connector->dot_crawl)
2435 return false;
2436
2437 intel_sdvo_connector->dot_crawl->values[0] = 0;
2438 intel_sdvo_connector->dot_crawl->values[1] = 1;
2439 drm_connector_attach_property(connector,
2440 intel_sdvo_connector->dot_crawl,
2441 intel_sdvo_connector->cur_dot_crawl);
2442 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2443 }
2444
Chris Wilsonc5521702010-08-04 13:50:28 +01002445 return true;
2446}
2447
2448static bool
2449intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2450 struct intel_sdvo_connector *intel_sdvo_connector,
2451 struct intel_sdvo_enhancements_reply enhancements)
2452{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002453 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002454 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2455 uint16_t response, data_value[2];
2456
2457 ENHANCEMENT(brightness, BRIGHTNESS);
2458
2459 return true;
2460}
2461#undef ENHANCEMENT
2462
2463static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2464 struct intel_sdvo_connector *intel_sdvo_connector)
2465{
2466 union {
2467 struct intel_sdvo_enhancements_reply reply;
2468 uint16_t response;
2469 } enhancements;
2470
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002471 enhancements.response = 0;
2472 intel_sdvo_get_value(intel_sdvo,
2473 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2474 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002475 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002476 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002477 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002478 }
Chris Wilson32aad862010-08-04 13:50:25 +01002479
Chris Wilsonc5521702010-08-04 13:50:28 +01002480 if (IS_TV(intel_sdvo_connector))
2481 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2482 else if(IS_LVDS(intel_sdvo_connector))
2483 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2484 else
2485 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002486}
Chris Wilson32aad862010-08-04 13:50:25 +01002487
Chris Wilsone957d772010-09-24 12:52:03 +01002488static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2489 struct i2c_msg *msgs,
2490 int num)
2491{
2492 struct intel_sdvo *sdvo = adapter->algo_data;
2493
2494 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2495 return -EIO;
2496
2497 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2498}
2499
2500static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2501{
2502 struct intel_sdvo *sdvo = adapter->algo_data;
2503 return sdvo->i2c->algo->functionality(sdvo->i2c);
2504}
2505
2506static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2507 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2508 .functionality = intel_sdvo_ddc_proxy_func
2509};
2510
2511static bool
2512intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2513 struct drm_device *dev)
2514{
2515 sdvo->ddc.owner = THIS_MODULE;
2516 sdvo->ddc.class = I2C_CLASS_DDC;
2517 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2518 sdvo->ddc.dev.parent = &dev->pdev->dev;
2519 sdvo->ddc.algo_data = sdvo;
2520 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2521
2522 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002523}
2524
Eric Anholtc751ce42010-03-25 11:48:48 -07002525bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002526{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002527 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002528 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002529 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002530 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002531
Chris Wilsonea5b2132010-08-04 13:50:23 +01002532 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2533 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002534 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002535
Chris Wilsone957d772010-09-24 12:52:03 +01002536 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2537 kfree(intel_sdvo);
2538 return false;
2539 }
2540
Chris Wilsonea5b2132010-08-04 13:50:23 +01002541 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002542
Chris Wilsonea5b2132010-08-04 13:50:23 +01002543 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002544 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002545 /* encoder type will be decided later */
2546 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002547
Chris Wilsone957d772010-09-24 12:52:03 +01002548 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2549 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002550
Jesse Barnes79e53942008-11-07 14:24:08 -08002551 /* Read the regs to test if we can talk to the device */
2552 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002553 u8 byte;
2554
2555 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002556 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002557 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002558 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002559 }
2560 }
2561
Chris Wilsonf899fc62010-07-20 15:44:45 -07002562 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002563 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002564 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002565 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002566
Chris Wilson4ef69c72010-09-09 15:14:28 +01002567 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002568
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002569 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002570 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002571 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002572
Chris Wilsonea5b2132010-08-04 13:50:23 +01002573 if (intel_sdvo_output_setup(intel_sdvo,
2574 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002575 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002576 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002577 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002578 }
2579
Chris Wilsonea5b2132010-08-04 13:50:23 +01002580 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002581
Jesse Barnes79e53942008-11-07 14:24:08 -08002582 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002583 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002584 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002585
Chris Wilson32aad862010-08-04 13:50:25 +01002586 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2587 &intel_sdvo->pixel_clock_min,
2588 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002589 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002590
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002591 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002592 "clock range %dMHz - %dMHz, "
2593 "input 1: %c, input 2: %c, "
2594 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002595 SDVO_NAME(intel_sdvo),
2596 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2597 intel_sdvo->caps.device_rev_id,
2598 intel_sdvo->pixel_clock_min / 1000,
2599 intel_sdvo->pixel_clock_max / 1000,
2600 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2601 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002602 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002603 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002604 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002605 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002606 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002607 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002608
Chris Wilsonf899fc62010-07-20 15:44:45 -07002609err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002610 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002611 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002612 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002613
Eric Anholt7d573822009-01-02 13:33:00 -08002614 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002615}