| David Brownell | f492ec9 | 2009-05-14 13:01:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * <mach/asp.h> - DaVinci Audio Serial Port support |
| 3 | */ |
| 4 | #ifndef __ASM_ARCH_DAVINCI_ASP_H |
| 5 | #define __ASM_ARCH_DAVINCI_ASP_H |
| 6 | |
| 7 | #include <mach/irqs.h> |
| Chaithrika U S | 25acf55 | 2009-06-05 06:28:08 -0400 | [diff] [blame] | 8 | #include <mach/edma.h> |
| David Brownell | f492ec9 | 2009-05-14 13:01:59 -0700 | [diff] [blame] | 9 | |
| Chaithrika U S | 25acf55 | 2009-06-05 06:28:08 -0400 | [diff] [blame] | 10 | /* Bases of dm644x and dm355 register banks */ |
| David Brownell | f492ec9 | 2009-05-14 13:01:59 -0700 | [diff] [blame] | 11 | #define DAVINCI_ASP0_BASE 0x01E02000 |
| 12 | #define DAVINCI_ASP1_BASE 0x01E04000 |
| 13 | |
| Chaithrika U S | 25acf55 | 2009-06-05 06:28:08 -0400 | [diff] [blame] | 14 | /* Bases of dm646x register banks */ |
| 15 | #define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 |
| 16 | #define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 |
| 17 | |
| 18 | /* EDMA channels of dm644x and dm355 */ |
| David Brownell | f492ec9 | 2009-05-14 13:01:59 -0700 | [diff] [blame] | 19 | #define DAVINCI_DMA_ASP0_TX 2 |
| 20 | #define DAVINCI_DMA_ASP0_RX 3 |
| 21 | #define DAVINCI_DMA_ASP1_TX 8 |
| 22 | #define DAVINCI_DMA_ASP1_RX 9 |
| 23 | |
| Chaithrika U S | 25acf55 | 2009-06-05 06:28:08 -0400 | [diff] [blame] | 24 | /* EDMA channels of dm646x */ |
| 25 | #define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6 |
| 26 | #define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 |
| 27 | #define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 |
| 28 | |
| David Brownell | f492ec9 | 2009-05-14 13:01:59 -0700 | [diff] [blame] | 29 | /* Interrupts */ |
| 30 | #define DAVINCI_ASP0_RX_INT IRQ_MBRINT |
| 31 | #define DAVINCI_ASP0_TX_INT IRQ_MBXINT |
| 32 | #define DAVINCI_ASP1_RX_INT IRQ_MBRINT |
| 33 | #define DAVINCI_ASP1_TX_INT IRQ_MBXINT |
| 34 | |
| Chaithrika U S | 25acf55 | 2009-06-05 06:28:08 -0400 | [diff] [blame] | 35 | struct snd_platform_data { |
| Chaithrika U S | 25acf55 | 2009-06-05 06:28:08 -0400 | [diff] [blame] | 36 | u32 tx_dma_offset; |
| 37 | u32 rx_dma_offset; |
| 38 | enum dma_event_q eventq_no; /* event queue number */ |
| 39 | unsigned int codec_fmt; |
| 40 | |
| 41 | /* McASP specific fields */ |
| 42 | int tdm_slots; |
| 43 | u8 op_mode; |
| 44 | u8 num_serializer; |
| 45 | u8 *serial_dir; |
| 46 | }; |
| 47 | |
| 48 | #define INACTIVE_MODE 0 |
| 49 | #define TX_MODE 1 |
| 50 | #define RX_MODE 2 |
| 51 | |
| 52 | #define DAVINCI_MCASP_IIS_MODE 0 |
| 53 | #define DAVINCI_MCASP_DIT_MODE 1 |
| 54 | |
| David Brownell | f492ec9 | 2009-05-14 13:01:59 -0700 | [diff] [blame] | 55 | #endif /* __ASM_ARCH_DAVINCI_ASP_H */ |