Xiaozhe Shi | faa942c | 2013-02-21 10:52:03 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
Kenneth Heitke | db6e1b1 | 2012-11-20 15:24:42 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &spmi_bus { |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <0>; |
| 16 | interrupt-controller; |
| 17 | #interrupt-cells = <3>; |
Xiaozhe Shi | faa942c | 2013-02-21 10:52:03 -0800 | [diff] [blame] | 18 | |
| 19 | qcom,pm8110@0 { |
| 20 | spmi-slave-container; |
| 21 | reg = <0x0>; |
| 22 | #address-cells = <1>; |
| 23 | #size-cells = <1>; |
Siddartha Mohanadoss | 0f664a8 | 2013-03-11 22:52:01 -0700 | [diff] [blame] | 24 | |
Xiaozhe Shi | a0e6c23 | 2013-03-06 15:22:05 -0800 | [diff] [blame] | 25 | qcom,revid@100 { |
| 26 | compatible = "qcom,qpnp-revid"; |
| 27 | reg = <0x100 0x100>; |
| 28 | }; |
| 29 | |
Amy Maloche | e4aaca2 | 2013-04-01 20:34:09 -0700 | [diff] [blame] | 30 | qcom,power-on@800 { |
| 31 | compatible = "qcom,qpnp-power-on"; |
| 32 | reg = <0x800 0x100>; |
| 33 | interrupts = <0x0 0x8 0x0>, |
| 34 | <0x0 0x8 0x1>, |
| 35 | <0x0 0x8 0x4>; |
| 36 | interrupt-names = "kpdpwr", "resin", "resin-bark"; |
| 37 | qcom,pon-dbc-delay = <15625>; |
| 38 | qcom,system-reset; |
| 39 | |
| 40 | qcom,pon_1 { |
| 41 | qcom,pon-type = <0>; |
| 42 | qcom,pull-up = <1>; |
| 43 | linux,code = <116>; |
| 44 | }; |
| 45 | |
| 46 | qcom,pon_2 { |
| 47 | qcom,pon-type = <1>; |
| 48 | qcom,pull-up = <1>; |
| 49 | linux,code = <114>; |
| 50 | }; |
| 51 | }; |
| 52 | |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 53 | pm8110_chg: qcom,charger { |
| 54 | spmi-dev-container; |
| 55 | compatible = "qcom,qpnp-charger"; |
| 56 | #address-cells = <1>; |
| 57 | #size-cells = <1>; |
| 58 | status = "disabled"; |
| 59 | |
Xiaozhe Shi | 8bc042a | 2013-04-18 15:44:08 -0700 | [diff] [blame] | 60 | qcom,vddmax-mv = <4200>; |
Xiaozhe Shi | 22aa0cd | 2013-05-28 10:45:12 -0700 | [diff] [blame] | 61 | qcom,vddsafe-mv = <4230>; |
Xiaozhe Shi | 555dffd | 2013-07-25 17:21:10 -0700 | [diff] [blame] | 62 | qcom,vinmin-mv = <4300>; |
Xiaozhe Shi | 8bc042a | 2013-04-18 15:44:08 -0700 | [diff] [blame] | 63 | qcom,vbatdet-mv = <4100>; |
| 64 | qcom,ibatmax-ma = <1500>; |
Xiaozhe Shi | a797f94 | 2013-07-12 10:45:55 -0700 | [diff] [blame] | 65 | qcom,ibatterm-ma = <100>; |
Xiaozhe Shi | 8bc042a | 2013-04-18 15:44:08 -0700 | [diff] [blame] | 66 | qcom,ibatsafe-ma = <1500>; |
| 67 | qcom,thermal-mitigation = <1500 700 600 325>; |
Xiaozhe Shi | c220bf8 | 2013-07-25 17:15:57 -0700 | [diff] [blame] | 68 | qcom,vbatdet-delta-mv = <100>; |
Xiaozhe Shi | 1acc092 | 2013-07-12 10:55:21 -0700 | [diff] [blame] | 69 | qcom,resume-soc = <99>; |
Xiaozhe Shi | 8b502bc | 2013-04-18 15:55:56 -0700 | [diff] [blame] | 70 | qcom,tchg-mins = <150>; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 71 | qcom,chg-vadc = <&pm8110_vadc>; |
Siddartha Mohanadoss | 88a3fde | 2013-06-24 16:18:52 -0700 | [diff] [blame] | 72 | qcom,chg-adc_tm = <&pm8110_adc_tm>; |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 73 | |
Xiaozhe Shi | 8bc042a | 2013-04-18 15:44:08 -0700 | [diff] [blame] | 74 | qcom,chgr@1000 { |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 75 | status = "disabled"; |
| 76 | reg = <0x1000 0x100>; |
| 77 | interrupts = <0x0 0x10 0x0>, |
| 78 | <0x0 0x10 0x1>, |
| 79 | <0x0 0x10 0x2>, |
| 80 | <0x0 0x10 0x3>, |
| 81 | <0x0 0x10 0x4>, |
| 82 | <0x0 0x10 0x5>, |
| 83 | <0x0 0x10 0x6>, |
| 84 | <0x0 0x10 0x7>; |
| 85 | |
| 86 | interrupt-names = "vbat-det-lo", |
| 87 | "vbat-det-hi", |
| 88 | "chgwdog", |
| 89 | "state-change", |
| 90 | "trkl-chg-on", |
| 91 | "fast-chg-on", |
| 92 | "chg-failed", |
| 93 | "chg-done"; |
| 94 | }; |
| 95 | |
Xiaozhe Shi | 8bc042a | 2013-04-18 15:44:08 -0700 | [diff] [blame] | 96 | qcom,buck@1100 { |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 97 | status = "disabled"; |
| 98 | reg = <0x1100 0x100>; |
| 99 | interrupts = <0x0 0x11 0x0>, |
| 100 | <0x0 0x11 0x1>, |
| 101 | <0x0 0x11 0x2>, |
| 102 | <0x0 0x11 0x3>, |
| 103 | <0x0 0x11 0x4>, |
| 104 | <0x0 0x11 0x5>, |
| 105 | <0x0 0x11 0x6>; |
| 106 | |
| 107 | interrupt-names = "vbat-ov", |
| 108 | "vreg-ov", |
| 109 | "overtemp", |
| 110 | "vchg-loop", |
| 111 | "ichg-loop", |
| 112 | "ibat-loop", |
| 113 | "vdd-loop"; |
| 114 | }; |
| 115 | |
Xiaozhe Shi | 8bc042a | 2013-04-18 15:44:08 -0700 | [diff] [blame] | 116 | qcom,bat-if@1200 { |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 117 | status = "disabled"; |
| 118 | reg = <0x1200 0x100>; |
| 119 | interrupts = <0x0 0x12 0x0>, |
| 120 | <0x0 0x12 0x1>, |
| 121 | <0x0 0x12 0x2>, |
| 122 | <0x0 0x12 0x3>, |
| 123 | <0x0 0x12 0x4>; |
| 124 | |
| 125 | interrupt-names = "batt-pres", |
| 126 | "bat-temp-ok", |
| 127 | "bat-fet-on", |
| 128 | "vcp-on", |
| 129 | "psi"; |
| 130 | }; |
| 131 | |
Xiaozhe Shi | 8bc042a | 2013-04-18 15:44:08 -0700 | [diff] [blame] | 132 | qcom,usb-chgpth@1300 { |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 133 | status = "disabled"; |
| 134 | reg = <0x1300 0x100>; |
| 135 | interrupts = <0 0x13 0x0>, |
| 136 | <0 0x13 0x1>, |
David Keitel | 0b62bdd | 2013-07-10 17:30:51 -0700 | [diff] [blame] | 137 | <0x0 0x13 0x2>, |
| 138 | <0x0 0x13 0x3>; |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 139 | |
| 140 | interrupt-names = "coarse-det-usb", |
| 141 | "usbin-valid", |
David Keitel | 0b62bdd | 2013-07-10 17:30:51 -0700 | [diff] [blame] | 142 | "chg-gone", |
| 143 | "usb-ocp"; |
Xiaozhe Shi | f7d9daf | 2013-04-08 15:29:55 -0700 | [diff] [blame] | 144 | }; |
| 145 | |
| 146 | qcom,chg-misc@1600 { |
| 147 | status = "disabled"; |
| 148 | reg = <0x1600 0x100>; |
| 149 | }; |
| 150 | }; |
| 151 | |
Xiaozhe Shi | 67ba76b | 2013-04-18 18:20:05 -0700 | [diff] [blame] | 152 | pm8110_gpios: gpios { |
| 153 | spmi-dev-container; |
| 154 | compatible = "qcom,qpnp-pin"; |
| 155 | gpio-controller; |
| 156 | #gpio-cells = <2>; |
| 157 | #address-cells = <1>; |
| 158 | #size-cells = <1>; |
| 159 | label = "pm8110-gpio"; |
| 160 | |
| 161 | gpio@c000 { |
| 162 | reg = <0xc000 0x100>; |
| 163 | qcom,pin-num = <1>; |
| 164 | }; |
| 165 | |
| 166 | gpio@c100 { |
| 167 | reg = <0xc100 0x100>; |
| 168 | qcom,pin-num = <2>; |
| 169 | }; |
| 170 | |
| 171 | gpio@c200 { |
| 172 | reg = <0xc200 0x100>; |
| 173 | qcom,pin-num = <3>; |
| 174 | }; |
| 175 | |
| 176 | gpio@c300 { |
| 177 | reg = <0xc300 0x100>; |
| 178 | qcom,pin-num = <4>; |
| 179 | }; |
| 180 | }; |
| 181 | |
| 182 | pm8110_mpps: mpps { |
| 183 | spmi-dev-container; |
| 184 | compatible = "qcom,qpnp-pin"; |
| 185 | gpio-controller; |
| 186 | #gpio-cells = <2>; |
| 187 | #address-cells = <1>; |
| 188 | #size-cells = <1>; |
| 189 | label = "pm8110-mpp"; |
| 190 | |
| 191 | mpp@a000 { |
| 192 | reg = <0xa000 0x100>; |
| 193 | qcom,pin-num = <1>; |
| 194 | }; |
| 195 | |
| 196 | mpp@a100 { |
| 197 | reg = <0xa100 0x100>; |
| 198 | qcom,pin-num = <2>; |
| 199 | }; |
| 200 | |
| 201 | mpp@a200 { |
| 202 | reg = <0xa200 0x100>; |
| 203 | qcom,pin-num = <3>; |
| 204 | }; |
| 205 | |
| 206 | mpp@a300 { |
| 207 | reg = <0xa300 0x100>; |
| 208 | qcom,pin-num = <4>; |
| 209 | }; |
| 210 | }; |
| 211 | |
Siddartha Mohanadoss | 0f664a8 | 2013-03-11 22:52:01 -0700 | [diff] [blame] | 212 | pm8110_vadc: vadc@3100 { |
| 213 | compatible = "qcom,qpnp-vadc"; |
| 214 | reg = <0x3100 0x100>; |
| 215 | #address-cells = <1>; |
| 216 | #size-cells = <0>; |
| 217 | interrupts = <0x0 0x31 0x0>; |
| 218 | interrupt-names = "eoc-int-en-set"; |
| 219 | qcom,adc-bit-resolution = <15>; |
| 220 | qcom,adc-vdd-reference = <1800>; |
Siddartha Mohanadoss | a3f2130 | 2013-08-01 13:32:40 -0700 | [diff] [blame] | 221 | qcom,vadc-poll-eoc; |
Siddartha Mohanadoss | 0f664a8 | 2013-03-11 22:52:01 -0700 | [diff] [blame] | 222 | |
| 223 | chan@8 { |
| 224 | label = "die_temp"; |
| 225 | reg = <8>; |
| 226 | qcom,decimation = <0>; |
| 227 | qcom,pre-div-channel-scaling = <0>; |
| 228 | qcom,calibration-type = "absolute"; |
| 229 | qcom,scale-function = <3>; |
| 230 | qcom,hw-settle-time = <0>; |
| 231 | qcom,fast-avg-setup = <0>; |
| 232 | }; |
| 233 | |
| 234 | chan@9 { |
| 235 | label = "ref_625mv"; |
| 236 | reg = <9>; |
| 237 | qcom,decimation = <0>; |
| 238 | qcom,pre-div-channel-scaling = <0>; |
| 239 | qcom,calibration-type = "absolute"; |
| 240 | qcom,scale-function = <0>; |
| 241 | qcom,hw-settle-time = <0>; |
| 242 | qcom,fast-avg-setup = <0>; |
| 243 | }; |
| 244 | |
| 245 | chan@a { |
| 246 | label = "ref_1250v"; |
| 247 | reg = <0xa>; |
| 248 | qcom,decimation = <0>; |
| 249 | qcom,pre-div-channel-scaling = <0>; |
| 250 | qcom,calibration-type = "absolute"; |
| 251 | qcom,scale-function = <0>; |
| 252 | qcom,hw-settle-time = <0>; |
| 253 | qcom,fast-avg-setup = <0>; |
| 254 | }; |
| 255 | }; |
| 256 | |
Siddartha Mohanadoss | 55d0bca | 2013-06-24 08:29:34 -0700 | [diff] [blame] | 257 | pm8110_iadc: iadc@3600 { |
Siddartha Mohanadoss | 0f664a8 | 2013-03-11 22:52:01 -0700 | [diff] [blame] | 258 | compatible = "qcom,qpnp-iadc"; |
| 259 | reg = <0x3600 0x100>; |
| 260 | #address-cells = <1>; |
| 261 | #size-cells = <0>; |
| 262 | interrupts = <0x0 0x36 0x0>; |
| 263 | interrupt-names = "eoc-int-en-set"; |
| 264 | qcom,adc-bit-resolution = <16>; |
| 265 | qcom,adc-vdd-reference = <1800>; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 266 | qcom,iadc-vadc = <&pm8110_vadc>; |
Siddartha Mohanadoss | a3f2130 | 2013-08-01 13:32:40 -0700 | [diff] [blame] | 267 | qcom,iadc-poll-eoc; |
Siddartha Mohanadoss | 0f664a8 | 2013-03-11 22:52:01 -0700 | [diff] [blame] | 268 | |
| 269 | chan@0 { |
| 270 | label = "internal_rsense"; |
| 271 | reg = <0>; |
| 272 | qcom,decimation = <0>; |
| 273 | qcom,pre-div-channel-scaling = <1>; |
| 274 | qcom,calibration-type = "absolute"; |
| 275 | qcom,scale-function = <0>; |
| 276 | qcom,hw-settle-time = <0>; |
| 277 | qcom,fast-avg-setup = <0>; |
| 278 | }; |
| 279 | }; |
Ashay Jaiswal | ad1db36 | 2013-04-01 11:11:41 +0530 | [diff] [blame] | 280 | |
Siddartha Mohanadoss | 236e095 | 2013-05-13 10:40:26 -0700 | [diff] [blame] | 281 | pm8110_adc_tm: vadc@3400 { |
| 282 | compatible = "qcom,qpnp-adc-tm"; |
| 283 | reg = <0x3400 0x100>; |
| 284 | #address-cells = <1>; |
| 285 | #size-cells = <0>; |
| 286 | interrupts = <0x0 0x34 0x0>, |
| 287 | <0x0 0x34 0x3>, |
| 288 | <0x0 0x34 0x4>; |
| 289 | interrupt-names = "eoc-int-en-set", |
| 290 | "high-thr-en-set", |
| 291 | "low-thr-en-set"; |
| 292 | qcom,adc-bit-resolution = <15>; |
| 293 | qcom,adc-vdd-reference = <1800>; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 294 | qcom,adc_tm-vadc = <&pm8110_vadc>; |
Siddartha Mohanadoss | 236e095 | 2013-05-13 10:40:26 -0700 | [diff] [blame] | 295 | }; |
| 296 | |
David Collins | 7799635 | 2013-05-20 14:27:51 -0700 | [diff] [blame] | 297 | qcom,temp-alarm@2400 { |
| 298 | compatible = "qcom,qpnp-temp-alarm"; |
| 299 | reg = <0x2400 0x100>; |
| 300 | interrupts = <0x0 0x24 0x0>; |
| 301 | label = "pm8110_tz"; |
| 302 | qcom,channel-num = <8>; |
| 303 | qcom,threshold-set = <0>; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 304 | qcom,temp_alarm-vadc = <&pm8110_vadc>; |
David Collins | 7799635 | 2013-05-20 14:27:51 -0700 | [diff] [blame] | 305 | }; |
| 306 | |
Xiaozhe Shi | 294c7e2 | 2013-04-17 14:59:15 -0700 | [diff] [blame] | 307 | pm8110_bms: qcom,bms { |
| 308 | spmi-dev-container; |
| 309 | compatible = "qcom,qpnp-bms"; |
| 310 | #address-cells = <1>; |
| 311 | #size-cells = <1>; |
| 312 | status = "disabled"; |
| 313 | |
| 314 | qcom,r-sense-uohm = <10000>; |
| 315 | qcom,v-cutoff-uv = <3400000>; |
| 316 | qcom,max-voltage-uv = <4200000>; |
| 317 | qcom,r-conn-mohm = <0>; |
Xiaozhe Shi | 8e1fe4c | 2013-09-11 10:53:59 -0700 | [diff] [blame] | 318 | qcom,shutdown-soc-valid-limit = <100>; |
Xiaozhe Shi | 294c7e2 | 2013-04-17 14:59:15 -0700 | [diff] [blame] | 319 | qcom,adjust-soc-low-threshold = <15>; |
| 320 | qcom,ocv-voltage-high-threshold-uv = <3750000>; |
| 321 | qcom,ocv-voltage-low-threshold-uv = <3650000>; |
| 322 | qcom,low-soc-calculate-soc-threshold = <15>; |
| 323 | qcom,low-soc-calculate-soc-ms = <5000>; |
| 324 | qcom,calculate-soc-ms = <20000>; |
| 325 | qcom,chg-term-ua = <100000>; |
| 326 | qcom,batt-type = <0>; |
| 327 | qcom,low-voltage-threshold = <3420000>; |
Xiaozhe Shi | 535494d | 2013-04-05 12:27:51 -0700 | [diff] [blame] | 328 | qcom,tm-temp-margin = <5000>; |
Xiaozhe Shi | 294c7e2 | 2013-04-17 14:59:15 -0700 | [diff] [blame] | 329 | qcom,low-ocv-correction-limit-uv = <100>; |
| 330 | qcom,high-ocv-correction-limit-uv = <50>; |
| 331 | qcom,hold-soc-est = <3>; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 332 | qcom,bms-vadc = <&pm8110_vadc>; |
Siddartha Mohanadoss | 55d0bca | 2013-06-24 08:29:34 -0700 | [diff] [blame] | 333 | qcom,bms-iadc = <&pm8110_iadc>; |
Siddartha Mohanadoss | 88a3fde | 2013-06-24 16:18:52 -0700 | [diff] [blame] | 334 | qcom,bms-adc_tm = <&pm8110_adc_tm>; |
Xiaozhe Shi | 294c7e2 | 2013-04-17 14:59:15 -0700 | [diff] [blame] | 335 | |
| 336 | qcom,bms-iadc@3800 { |
| 337 | reg = <0x3800 0x100>; |
| 338 | }; |
| 339 | |
| 340 | qcom,bms-bms@4000 { |
| 341 | reg = <0x4000 0x100>; |
| 342 | interrupts = <0x0 0x40 0x0>, |
| 343 | <0x0 0x40 0x1>, |
| 344 | <0x0 0x40 0x2>, |
| 345 | <0x0 0x40 0x3>, |
| 346 | <0x0 0x40 0x4>, |
| 347 | <0x0 0x40 0x5>, |
| 348 | <0x0 0x40 0x6>, |
| 349 | <0x0 0x40 0x7>; |
| 350 | |
Xiaozhe Shi | c4c04ee | 2013-07-29 10:41:48 -0700 | [diff] [blame] | 351 | interrupt-names = "cc_thr", |
Xiaozhe Shi | 294c7e2 | 2013-04-17 14:59:15 -0700 | [diff] [blame] | 352 | "ocv_for_r", |
Xiaozhe Shi | c4c04ee | 2013-07-29 10:41:48 -0700 | [diff] [blame] | 353 | "good_ocv", |
| 354 | "charge_begin", |
| 355 | "ocv_thr", |
| 356 | "sw_cc_thr", |
| 357 | "vsense_avg", |
| 358 | "vsense_for_r"; |
Xiaozhe Shi | 294c7e2 | 2013-04-17 14:59:15 -0700 | [diff] [blame] | 359 | }; |
| 360 | }; |
| 361 | |
Ashay Jaiswal | ad1db36 | 2013-04-01 11:11:41 +0530 | [diff] [blame] | 362 | qcom,pm8110_rtc { |
| 363 | spmi-dev-container; |
| 364 | compatible = "qcom,qpnp-rtc"; |
| 365 | #address-cells = <1>; |
| 366 | #size-cells = <1>; |
| 367 | qcom,qpnp-rtc-write = <0>; |
| 368 | qcom,qpnp-rtc-alarm-pwrup = <0>; |
| 369 | |
| 370 | qcom,pm8110_rtc_rw@6000 { |
| 371 | reg = <0x6000 0x100>; |
| 372 | }; |
| 373 | |
| 374 | qcom,pm8110_rtc_alarm@6100 { |
| 375 | reg = <0x6100 0x100>; |
| 376 | interrupts = <0x0 0x61 0x1>; |
| 377 | }; |
| 378 | }; |
Amy Maloche | 9a113c1 | 2013-04-11 19:46:20 -0700 | [diff] [blame] | 379 | |
Chun Zhang | 9e808b8 | 2013-04-18 15:38:18 -0700 | [diff] [blame] | 380 | qcom,leds@a100 { |
| 381 | compatible = "qcom,leds-qpnp"; |
| 382 | reg = <0xa100 0x100>; |
| 383 | label = "mpp"; |
| 384 | }; |
| 385 | |
Amy Maloche | 9a113c1 | 2013-04-11 19:46:20 -0700 | [diff] [blame] | 386 | qcom,leds@a200 { |
| 387 | compatible = "qcom,leds-qpnp"; |
| 388 | reg = <0xa200 0x100>; |
| 389 | label = "mpp"; |
| 390 | }; |
Xiaozhe Shi | faa942c | 2013-02-21 10:52:03 -0800 | [diff] [blame] | 391 | }; |
| 392 | |
| 393 | qcom,pm8110@1 { |
| 394 | spmi-slave-container; |
| 395 | reg = <0x1>; |
| 396 | #address-cells = <1>; |
| 397 | #size-cells = <1>; |
Xiaozhe Shi | a9571ca | 2013-02-21 10:52:03 -0800 | [diff] [blame] | 398 | |
| 399 | regulator@1400 { |
| 400 | compatible = "qcom,qpnp-regulator"; |
| 401 | regulator-name = "8110_s1"; |
| 402 | spmi-dev-container; |
| 403 | #address-cells = <1>; |
| 404 | #size-cells = <1>; |
| 405 | reg = <0x1400 0x300>; |
| 406 | status = "disabled"; |
| 407 | |
| 408 | qcom,ctl@1400 { |
| 409 | reg = <0x1400 0x100>; |
| 410 | }; |
| 411 | qcom,ps@1500 { |
| 412 | reg = <0x1500 0x100>; |
| 413 | }; |
| 414 | qcom,freq@1600 { |
| 415 | reg = <0x1600 0x100>; |
| 416 | }; |
| 417 | }; |
| 418 | |
| 419 | regulator@1700 { |
| 420 | compatible = "qcom,qpnp-regulator"; |
| 421 | regulator-name = "8110_s2"; |
| 422 | spmi-dev-container; |
| 423 | #address-cells = <1>; |
| 424 | #size-cells = <1>; |
| 425 | reg = <0x1700 0x300>; |
| 426 | status = "disabled"; |
| 427 | |
| 428 | qcom,ctl@1700 { |
| 429 | reg = <0x1700 0x100>; |
| 430 | }; |
| 431 | qcom,ps@1800 { |
| 432 | reg = <0x1800 0x100>; |
| 433 | }; |
| 434 | qcom,freq@1900 { |
| 435 | reg = <0x1900 0x100>; |
| 436 | }; |
| 437 | }; |
| 438 | |
| 439 | regulator@1a00 { |
| 440 | compatible = "qcom,qpnp-regulator"; |
| 441 | regulator-name = "8110_s3"; |
| 442 | spmi-dev-container; |
| 443 | #address-cells = <1>; |
| 444 | #size-cells = <1>; |
| 445 | reg = <0x1a00 0x300>; |
| 446 | status = "disabled"; |
| 447 | |
| 448 | qcom,ctl@1a00 { |
| 449 | reg = <0x1a00 0x100>; |
| 450 | }; |
| 451 | qcom,ps@1b00 { |
| 452 | reg = <0x1b00 0x100>; |
| 453 | }; |
| 454 | qcom,freq@1c00 { |
| 455 | reg = <0x1c00 0x100>; |
| 456 | }; |
| 457 | }; |
| 458 | |
| 459 | regulator@1d00 { |
| 460 | compatible = "qcom,qpnp-regulator"; |
| 461 | regulator-name = "8110_s4"; |
| 462 | spmi-dev-container; |
| 463 | #address-cells = <1>; |
| 464 | #size-cells = <1>; |
| 465 | reg = <0x1d00 0x300>; |
| 466 | status = "disabled"; |
| 467 | |
| 468 | qcom,ctl@1d00 { |
| 469 | reg = <0x1d00 0x100>; |
| 470 | }; |
| 471 | qcom,ps@1e00 { |
| 472 | reg = <0x1e00 0x100>; |
| 473 | }; |
| 474 | qcom,freq@1f00 { |
| 475 | reg = <0x1f00 0x100>; |
| 476 | }; |
| 477 | }; |
| 478 | |
| 479 | regulator@4000 { |
| 480 | compatible = "qcom,qpnp-regulator"; |
| 481 | regulator-name = "8110_l1"; |
| 482 | reg = <0x4000 0x100>; |
| 483 | status = "disabled"; |
| 484 | }; |
| 485 | |
| 486 | regulator@4100 { |
| 487 | compatible = "qcom,qpnp-regulator"; |
| 488 | regulator-name = "8110_l2"; |
| 489 | reg = <0x4100 0x100>; |
| 490 | status = "disabled"; |
| 491 | }; |
| 492 | |
| 493 | regulator@4200 { |
| 494 | compatible = "qcom,qpnp-regulator"; |
| 495 | regulator-name = "8110_l3"; |
| 496 | reg = <0x4200 0x100>; |
| 497 | status = "disabled"; |
| 498 | }; |
| 499 | |
| 500 | regulator@4300 { |
| 501 | compatible = "qcom,qpnp-regulator"; |
| 502 | regulator-name = "8110_l4"; |
| 503 | reg = <0x4300 0x100>; |
| 504 | status = "disabled"; |
| 505 | }; |
| 506 | |
| 507 | regulator@4400 { |
| 508 | compatible = "qcom,qpnp-regulator"; |
| 509 | regulator-name = "8110_l5"; |
| 510 | reg = <0x4400 0x100>; |
| 511 | status = "disabled"; |
| 512 | }; |
| 513 | |
| 514 | regulator@4500 { |
| 515 | compatible = "qcom,qpnp-regulator"; |
| 516 | regulator-name = "8110_l6"; |
| 517 | reg = <0x4500 0x100>; |
| 518 | status = "disabled"; |
| 519 | }; |
| 520 | |
| 521 | regulator@4600 { |
| 522 | compatible = "qcom,qpnp-regulator"; |
| 523 | regulator-name = "8110_l7"; |
| 524 | reg = <0x4600 0x100>; |
| 525 | status = "disabled"; |
| 526 | }; |
| 527 | |
| 528 | regulator@4700 { |
| 529 | compatible = "qcom,qpnp-regulator"; |
| 530 | regulator-name = "8110_l8"; |
| 531 | reg = <0x4700 0x100>; |
| 532 | status = "disabled"; |
| 533 | }; |
| 534 | |
| 535 | regulator@4800 { |
| 536 | compatible = "qcom,qpnp-regulator"; |
| 537 | regulator-name = "8110_l9"; |
| 538 | reg = <0x4800 0x100>; |
| 539 | status = "disabled"; |
| 540 | }; |
| 541 | |
| 542 | regulator@4900 { |
| 543 | compatible = "qcom,qpnp-regulator"; |
| 544 | regulator-name = "8110_l10"; |
| 545 | reg = <0x4900 0x100>; |
| 546 | status = "disabled"; |
| 547 | }; |
| 548 | |
| 549 | regulator@4b00 { |
| 550 | compatible = "qcom,qpnp-regulator"; |
| 551 | regulator-name = "8110_l12"; |
| 552 | reg = <0x4b00 0x100>; |
| 553 | status = "disabled"; |
| 554 | }; |
| 555 | |
| 556 | regulator@4d00 { |
| 557 | compatible = "qcom,qpnp-regulator"; |
| 558 | regulator-name = "8110_l14"; |
| 559 | reg = <0x4d00 0x100>; |
| 560 | status = "disabled"; |
| 561 | }; |
| 562 | |
| 563 | regulator@4e00 { |
| 564 | compatible = "qcom,qpnp-regulator"; |
| 565 | regulator-name = "8110_l15"; |
| 566 | reg = <0x4e00 0x100>; |
| 567 | status = "disabled"; |
| 568 | }; |
| 569 | |
| 570 | regulator@4f00 { |
| 571 | compatible = "qcom,qpnp-regulator"; |
| 572 | regulator-name = "8110_l16"; |
| 573 | reg = <0x4f00 0x100>; |
| 574 | status = "disabled"; |
| 575 | }; |
| 576 | |
| 577 | regulator@5000 { |
| 578 | compatible = "qcom,qpnp-regulator"; |
| 579 | regulator-name = "8110_l17"; |
| 580 | reg = <0x5000 0x100>; |
| 581 | status = "disabled"; |
| 582 | }; |
| 583 | |
| 584 | regulator@5100 { |
| 585 | compatible = "qcom,qpnp-regulator"; |
| 586 | regulator-name = "8110_l18"; |
| 587 | reg = <0x5100 0x100>; |
| 588 | status = "disabled"; |
| 589 | }; |
| 590 | |
| 591 | regulator@5200 { |
| 592 | compatible = "qcom,qpnp-regulator"; |
| 593 | regulator-name = "8110_l19"; |
| 594 | reg = <0x5200 0x100>; |
| 595 | status = "disabled"; |
| 596 | }; |
| 597 | |
| 598 | regulator@5300 { |
| 599 | compatible = "qcom,qpnp-regulator"; |
| 600 | regulator-name = "8110_l20"; |
| 601 | reg = <0x5300 0x100>; |
| 602 | status = "disabled"; |
| 603 | }; |
| 604 | |
| 605 | regulator@5400 { |
| 606 | compatible = "qcom,qpnp-regulator"; |
| 607 | regulator-name = "8110_l21"; |
| 608 | reg = <0x5400 0x100>; |
| 609 | status = "disabled"; |
| 610 | }; |
| 611 | |
| 612 | regulator@5500 { |
| 613 | compatible = "qcom,qpnp-regulator"; |
| 614 | regulator-name = "8110_l22"; |
| 615 | reg = <0x5500 0x100>; |
| 616 | status = "disabled"; |
| 617 | }; |
Chun Zhang | 3450f83 | 2013-04-15 11:46:29 -0700 | [diff] [blame] | 618 | |
| 619 | qcom,vibrator@c000 { |
| 620 | compatible = "qcom,qpnp-vibrator"; |
| 621 | reg = <0xc000 0x100>; |
| 622 | label = "vibrator"; |
| 623 | status = "disabled"; |
| 624 | }; |
Jay Chokshi | 40b5f32 | 2013-05-01 17:18:12 -0700 | [diff] [blame] | 625 | |
| 626 | pwm@bc00 { |
| 627 | compatible = "qcom,qpnp-pwm"; |
| 628 | reg = <0xbc00 0x100>; |
| 629 | reg-names = "qpnp-lpg-channel-base"; |
| 630 | qcom,channel-id = <0>; |
| 631 | }; |
Xiaozhe Shi | faa942c | 2013-02-21 10:52:03 -0800 | [diff] [blame] | 632 | }; |
Kenneth Heitke | db6e1b1 | 2012-11-20 15:24:42 -0700 | [diff] [blame] | 633 | }; |