Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm / e7cadf700b63918cbd7e01d70fc7a045be69d1b4 / . / arch / arm / mach-msm / include / mach / rpm-9615.h
blob: 5c9d882af3b082aa3d337d4cbf169fa8c6cecb77 [file] [log] [blame]
Duy Truong790f06d2013-02-13 16:38:12 -0800[diff] [blame]1/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __ARCH_ARM_MACH_MSM_RPM_9615_H
14#define __ARCH_ARM_MACH_MSM_RPM_9615_H
15
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]16/* RPM control message RAM enums */
17enum {
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]18 MSM_RPM_9615_CTRL_VERSION_MAJOR,
19 MSM_RPM_9615_CTRL_VERSION_MINOR,
20 MSM_RPM_9615_CTRL_VERSION_BUILD,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]21
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]22 MSM_RPM_9615_CTRL_REQ_CTX_0,
23 MSM_RPM_9615_CTRL_REQ_CTX_7 = MSM_RPM_9615_CTRL_REQ_CTX_0 + 7,
24 MSM_RPM_9615_CTRL_REQ_SEL_0,
25 MSM_RPM_9615_CTRL_REQ_SEL_3 = MSM_RPM_9615_CTRL_REQ_SEL_0 + 3,
26 MSM_RPM_9615_CTRL_ACK_CTX_0,
27 MSM_RPM_9615_CTRL_ACK_CTX_7 = MSM_RPM_9615_CTRL_ACK_CTX_0 + 7,
28 MSM_RPM_9615_CTRL_ACK_SEL_0,
29 MSM_RPM_9615_CTRL_ACK_SEL_7 = MSM_RPM_9615_CTRL_ACK_SEL_0 + 7,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]30};
31
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]32enum {
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]33 MSM_RPM_9615_SEL_NOTIFICATION = 0,
34 MSM_RPM_9615_SEL_INVALIDATE = 1,
35 MSM_RPM_9615_SEL_TRIGGER_TIMED = 2,
36 MSM_RPM_9615_SEL_RPM_CTL = 3,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]37
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]38 MSM_RPM_9615_SEL_CXO_CLK = 5,
39 MSM_RPM_9615_SEL_SYSTEM_FABRIC_CLK = 9,
40 MSM_RPM_9615_SEL_DAYTONA_FABRIC_CLK = 11,
41 MSM_RPM_9615_SEL_SFPB_CLK = 12,
42 MSM_RPM_9615_SEL_CFPB_CLK = 13,
43 MSM_RPM_9615_SEL_EBI1_CLK = 16,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]44
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]45 MSM_RPM_9615_SEL_SYS_FABRIC_CFG_HALT = 22,
46 MSM_RPM_9615_SEL_SYS_FABRIC_CFG_CLKMOD = 23,
47 MSM_RPM_9615_SEL_SYS_FABRIC_CFG_IOCTL = 24,
48 MSM_RPM_9615_SEL_SYSTEM_FABRIC_ARB = 25,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]49
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]50 MSM_RPM_9615_SEL_PM8018_S1 = 30,
51 MSM_RPM_9615_SEL_PM8018_S2 = 31,
52 MSM_RPM_9615_SEL_PM8018_S3 = 32,
53 MSM_RPM_9615_SEL_PM8018_S4 = 33,
54 MSM_RPM_9615_SEL_PM8018_S5 = 34,
55 MSM_RPM_9615_SEL_PM8018_L1 = 35,
56 MSM_RPM_9615_SEL_PM8018_L2 = 36,
57 MSM_RPM_9615_SEL_PM8018_L3 = 37,
58 MSM_RPM_9615_SEL_PM8018_L4 = 38,
59 MSM_RPM_9615_SEL_PM8018_L5 = 39,
60 MSM_RPM_9615_SEL_PM8018_L6 = 40,
61 MSM_RPM_9615_SEL_PM8018_L7 = 41,
62 MSM_RPM_9615_SEL_PM8018_L8 = 42,
63 MSM_RPM_9615_SEL_PM8018_L9 = 43,
64 MSM_RPM_9615_SEL_PM8018_L10 = 44,
65 MSM_RPM_9615_SEL_PM8018_L11 = 45,
66 MSM_RPM_9615_SEL_PM8018_L12 = 46,
67 MSM_RPM_9615_SEL_PM8018_L13 = 47,
68 MSM_RPM_9615_SEL_PM8018_L14 = 48,
69 MSM_RPM_9615_SEL_PM8018_LVS1 = 49,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]70
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]71 MSM_RPM_9615_SEL_NCP = 80,
72 MSM_RPM_9615_SEL_CXO_BUFFERS = 81,
73 MSM_RPM_9615_SEL_USB_OTG_SWITCH = 82,
74 MSM_RPM_9615_SEL_HDMI_SWITCH = 83,
Mahesh Sivasubramanian36f361b2012-02-01 16:00:19 -0700[diff] [blame]75 MSM_RPM_9615_SEL_VOLTAGE_CORNER = 87,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]76
Mahesh Sivasubramanian36f361b2012-02-01 16:00:19 -0700[diff] [blame]77 MSM_RPM_9615_SEL_LAST = MSM_RPM_9615_SEL_VOLTAGE_CORNER,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]78};
79
80/* RPM resource (4 byte) word ID enum */
81enum {
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]82 MSM_RPM_9615_ID_NOTIFICATION_CONFIGURED_0 = 0,
83 MSM_RPM_9615_ID_NOTIFICATION_CONFIGURED_3 =
84 MSM_RPM_9615_ID_NOTIFICATION_CONFIGURED_0 + 3,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]85
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]86 MSM_RPM_9615_ID_NOTIFICATION_REGISTERED_0 = 4,
87 MSM_RPM_9615_ID_NOTIFICATION_REGISTERED_3 =
88 MSM_RPM_9615_ID_NOTIFICATION_REGISTERED_0 + 3,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]89
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]90 MSM_RPM_9615_ID_INVALIDATE_0 = 8,
91 MSM_RPM_9615_ID_INVALIDATE_7 =
92 MSM_RPM_9615_ID_INVALIDATE_0 + 7,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]93
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]94 MSM_RPM_9615_ID_TRIGGER_TIMED_TO = 16,
95 MSM_RPM_9615_ID_TRIGGER_TIMED_SCLK_COUNT = 17,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]96
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]97 MSM_RPM_9615_ID_RPM_CTL = 18,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]98
99 /* TRIGGER_CLEAR/SET deprecated in these 24 RESERVED bytes */
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]100 MSM_RPM_9615_ID_RESERVED_0 = 19,
101 MSM_RPM_9615_ID_RESERVED_5 =
102 MSM_RPM_9615_ID_RESERVED_0 + 5,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]103
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]104 MSM_RPM_9615_ID_CXO_CLK = 25,
105 MSM_RPM_9615_ID_SYSTEM_FABRIC_CLK = 26,
106 MSM_RPM_9615_ID_DAYTONA_FABRIC_CLK = 27,
107 MSM_RPM_9615_ID_SFPB_CLK = 28,
108 MSM_RPM_9615_ID_CFPB_CLK = 29,
109 MSM_RPM_9615_ID_EBI1_CLK = 30,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]110
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]111 MSM_RPM_9615_ID_SYS_FABRIC_CFG_HALT_0 = 31,
112 MSM_RPM_9615_ID_SYS_FABRIC_CFG_HALT_1 = 32,
113 MSM_RPM_9615_ID_SYS_FABRIC_CFG_CLKMOD_0 = 33,
114 MSM_RPM_9615_ID_SYS_FABRIC_CFG_CLKMOD_1 = 34,
115 MSM_RPM_9615_ID_SYS_FABRIC_CFG_CLKMOD_2 = 35,
116 MSM_RPM_9615_ID_SYS_FABRIC_CFG_IOCTL = 36,
117 MSM_RPM_9615_ID_SYSTEM_FABRIC_ARB_0 = 37,
118 MSM_RPM_9615_ID_SYSTEM_FABRIC_ARB_26 =
119 MSM_RPM_9615_ID_SYSTEM_FABRIC_ARB_0 + 26,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]120
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]121 MSM_RPM_9615_ID_PM8018_S1_0 = 64,
122 MSM_RPM_9615_ID_PM8018_S1_1 = 65,
123 MSM_RPM_9615_ID_PM8018_S2_0 = 66,
124 MSM_RPM_9615_ID_PM8018_S2_1 = 67,
125 MSM_RPM_9615_ID_PM8018_S3_0 = 68,
126 MSM_RPM_9615_ID_PM8018_S3_1 = 69,
127 MSM_RPM_9615_ID_PM8018_S4_0 = 70,
128 MSM_RPM_9615_ID_PM8018_S4_1 = 71,
129 MSM_RPM_9615_ID_PM8018_S5_0 = 72,
130 MSM_RPM_9615_ID_PM8018_S5_1 = 73,
131 MSM_RPM_9615_ID_PM8018_L1_0 = 74,
132 MSM_RPM_9615_ID_PM8018_L1_1 = 75,
133 MSM_RPM_9615_ID_PM8018_L2_0 = 76,
134 MSM_RPM_9615_ID_PM8018_L2_1 = 77,
135 MSM_RPM_9615_ID_PM8018_L3_0 = 78,
136 MSM_RPM_9615_ID_PM8018_L3_1 = 79,
137 MSM_RPM_9615_ID_PM8018_L4_0 = 80,
138 MSM_RPM_9615_ID_PM8018_L4_1 = 81,
139 MSM_RPM_9615_ID_PM8018_L5_0 = 82,
140 MSM_RPM_9615_ID_PM8018_L5_1 = 83,
141 MSM_RPM_9615_ID_PM8018_L6_0 = 84,
142 MSM_RPM_9615_ID_PM8018_L6_1 = 85,
143 MSM_RPM_9615_ID_PM8018_L7_0 = 86,
144 MSM_RPM_9615_ID_PM8018_L7_1 = 87,
145 MSM_RPM_9615_ID_PM8018_L8_0 = 88,
146 MSM_RPM_9615_ID_PM8018_L8_1 = 89,
147 MSM_RPM_9615_ID_PM8018_L9_0 = 90,
148 MSM_RPM_9615_ID_PM8018_L9_1 = 91,
149 MSM_RPM_9615_ID_PM8018_L10_0 = 92,
150 MSM_RPM_9615_ID_PM8018_L10_1 = 93,
151 MSM_RPM_9615_ID_PM8018_L11_0 = 94,
152 MSM_RPM_9615_ID_PM8018_L11_1 = 95,
153 MSM_RPM_9615_ID_PM8018_L12_0 = 96,
154 MSM_RPM_9615_ID_PM8018_L12_1 = 97,
155 MSM_RPM_9615_ID_PM8018_L13_0 = 98,
156 MSM_RPM_9615_ID_PM8018_L13_1 = 99,
157 MSM_RPM_9615_ID_PM8018_L14_0 = 100,
158 MSM_RPM_9615_ID_PM8018_L14_1 = 101,
159 MSM_RPM_9615_ID_PM8018_LVS1 = 102,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]160
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]161 MSM_RPM_9615_ID_NCP_0 = 103,
162 MSM_RPM_9615_ID_NCP_1 = 104,
163 MSM_RPM_9615_ID_CXO_BUFFERS = 105,
164 MSM_RPM_9615_ID_USB_OTG_SWITCH = 106,
165 MSM_RPM_9615_ID_HDMI_SWITCH = 107,
Mahesh Sivasubramanian36f361b2012-02-01 16:00:19 -0700[diff] [blame]166 MSM_RPM_9615_ID_VOLTAGE_CORNER = 109,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]167
Mahesh Sivasubramanian36f361b2012-02-01 16:00:19 -0700[diff] [blame]168 MSM_RPM_9615_ID_LAST = MSM_RPM_9615_ID_VOLTAGE_CORNER,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]169};
170
171/* RPM status ID enum */
172enum {
Praveen Chidambaram78499012011-11-01 17:15:17 -0600[diff] [blame]173 MSM_RPM_9615_STATUS_ID_VERSION_MAJOR = 0,
174 MSM_RPM_9615_STATUS_ID_VERSION_MINOR = 1,
175 MSM_RPM_9615_STATUS_ID_VERSION_BUILD = 2,
176 MSM_RPM_9615_STATUS_ID_SUPPORTED_RESOURCES_0 = 3,
177 MSM_RPM_9615_STATUS_ID_SUPPORTED_RESOURCES_1 = 4,
178 MSM_RPM_9615_STATUS_ID_SUPPORTED_RESOURCES_2 = 5,
179 MSM_RPM_9615_STATUS_ID_RESERVED_SUPPORTED_RESOURCES_0 = 6,
180 MSM_RPM_9615_STATUS_ID_SEQUENCE = 7,
181 MSM_RPM_9615_STATUS_ID_RPM_CTL = 8,
182 MSM_RPM_9615_STATUS_ID_CXO_CLK = 9,
183 MSM_RPM_9615_STATUS_ID_SYSTEM_FABRIC_CLK = 10,
184 MSM_RPM_9615_STATUS_ID_DAYTONA_FABRIC_CLK = 11,
185 MSM_RPM_9615_STATUS_ID_SFPB_CLK = 12,
186 MSM_RPM_9615_STATUS_ID_CFPB_CLK = 13,
187 MSM_RPM_9615_STATUS_ID_EBI1_CLK = 14,
188 MSM_RPM_9615_STATUS_ID_SYS_FABRIC_CFG_HALT = 15,
189 MSM_RPM_9615_STATUS_ID_SYS_FABRIC_CFG_CLKMOD = 16,
190 MSM_RPM_9615_STATUS_ID_SYS_FABRIC_CFG_IOCTL = 17,
191 MSM_RPM_9615_STATUS_ID_SYSTEM_FABRIC_ARB = 18,
192 MSM_RPM_9615_STATUS_ID_PM8018_S1_0 = 19,
193 MSM_RPM_9615_STATUS_ID_PM8018_S1_1 = 20,
194 MSM_RPM_9615_STATUS_ID_PM8018_S2_0 = 21,
195 MSM_RPM_9615_STATUS_ID_PM8018_S2_1 = 22,
196 MSM_RPM_9615_STATUS_ID_PM8018_S3_0 = 23,
197 MSM_RPM_9615_STATUS_ID_PM8018_S3_1 = 24,
198 MSM_RPM_9615_STATUS_ID_PM8018_S4_0 = 25,
199 MSM_RPM_9615_STATUS_ID_PM8018_S4_1 = 26,
200 MSM_RPM_9615_STATUS_ID_PM8018_S5_0 = 27,
201 MSM_RPM_9615_STATUS_ID_PM8018_S5_1 = 28,
202 MSM_RPM_9615_STATUS_ID_PM8018_L1_0 = 29,
203 MSM_RPM_9615_STATUS_ID_PM8018_L1_1 = 30,
204 MSM_RPM_9615_STATUS_ID_PM8018_L2_0 = 31,
205 MSM_RPM_9615_STATUS_ID_PM8018_L2_1 = 32,
206 MSM_RPM_9615_STATUS_ID_PM8018_L3_0 = 33,
207 MSM_RPM_9615_STATUS_ID_PM8018_L3_1 = 34,
208 MSM_RPM_9615_STATUS_ID_PM8018_L4_0 = 35,
209 MSM_RPM_9615_STATUS_ID_PM8018_L4_1 = 36,
210 MSM_RPM_9615_STATUS_ID_PM8018_L5_0 = 37,
211 MSM_RPM_9615_STATUS_ID_PM8018_L5_1 = 38,
212 MSM_RPM_9615_STATUS_ID_PM8018_L6_0 = 39,
213 MSM_RPM_9615_STATUS_ID_PM8018_L6_1 = 40,
214 MSM_RPM_9615_STATUS_ID_PM8018_L7_0 = 41,
215 MSM_RPM_9615_STATUS_ID_PM8018_L7_1 = 42,
216 MSM_RPM_9615_STATUS_ID_PM8018_L8_0 = 43,
217 MSM_RPM_9615_STATUS_ID_PM8018_L8_1 = 44,
218 MSM_RPM_9615_STATUS_ID_PM8018_L9_0 = 45,
219 MSM_RPM_9615_STATUS_ID_PM8018_L9_1 = 46,
220 MSM_RPM_9615_STATUS_ID_PM8018_L10_0 = 47,
221 MSM_RPM_9615_STATUS_ID_PM8018_L10_1 = 48,
222 MSM_RPM_9615_STATUS_ID_PM8018_L11_0 = 49,
223 MSM_RPM_9615_STATUS_ID_PM8018_L11_1 = 50,
224 MSM_RPM_9615_STATUS_ID_PM8018_L12_0 = 51,
225 MSM_RPM_9615_STATUS_ID_PM8018_L12_1 = 52,
226 MSM_RPM_9615_STATUS_ID_PM8018_L13_0 = 53,
227 MSM_RPM_9615_STATUS_ID_PM8018_L13_1 = 54,
228 MSM_RPM_9615_STATUS_ID_PM8018_L14_0 = 55,
229 MSM_RPM_9615_STATUS_ID_PM8018_L14_1 = 56,
230 MSM_RPM_9615_STATUS_ID_PM8018_LVS1 = 57,
231 MSM_RPM_9615_STATUS_ID_NCP_0 = 58,
232 MSM_RPM_9615_STATUS_ID_NCP_1 = 59,
233 MSM_RPM_9615_STATUS_ID_CXO_BUFFERS = 60,
234 MSM_RPM_9615_STATUS_ID_USB_OTG_SWITCH = 61,
235 MSM_RPM_9615_STATUS_ID_HDMI_SWITCH = 62,
Mahesh Sivasubramanian36f361b2012-02-01 16:00:19 -0700[diff] [blame]236 MSM_RPM_9615_STATUS_ID_VOLTAGE_CORNER = 64,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]237
Mahesh Sivasubramanian36f361b2012-02-01 16:00:19 -0700[diff] [blame]238 MSM_RPM_9615_STATUS_ID_LAST = MSM_RPM_9615_STATUS_ID_VOLTAGE_CORNER,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -0600[diff] [blame]239};
240
241#endif /* __ARCH_ARM_MACH_MSM_RPM_9615_H */