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Linus Torvalds1da177e2005-04-16 15:20:36 -07001<?xml version="1.0" encoding="UTF-8"?>
2<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
4
5<book id="MTD-NAND-Guide">
6 <bookinfo>
7 <title>MTD NAND Driver Programming Interface</title>
8
9 <authorgroup>
10 <author>
11 <firstname>Thomas</firstname>
12 <surname>Gleixner</surname>
13 <affiliation>
14 <address>
15 <email>tglx@linutronix.de</email>
16 </address>
17 </affiliation>
18 </author>
19 </authorgroup>
20
21 <copyright>
22 <year>2004</year>
23 <holder>Thomas Gleixner</holder>
24 </copyright>
25
26 <legalnotice>
27 <para>
28 This documentation is free software; you can redistribute
29 it and/or modify it under the terms of the GNU General Public
30 License version 2 as published by the Free Software Foundation.
31 </para>
32
33 <para>
34 This program is distributed in the hope that it will be
35 useful, but WITHOUT ANY WARRANTY; without even the implied
36 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
37 See the GNU General Public License for more details.
38 </para>
39
40 <para>
41 You should have received a copy of the GNU General Public
42 License along with this program; if not, write to the Free
43 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
44 MA 02111-1307 USA
45 </para>
46
47 <para>
48 For more details see the file COPYING in the source
49 distribution of Linux.
50 </para>
51 </legalnotice>
52 </bookinfo>
53
54<toc></toc>
55
56 <chapter id="intro">
57 <title>Introduction</title>
58 <para>
59 The generic NAND driver supports almost all NAND and AG-AND based
60 chips and connects them to the Memory Technology Devices (MTD)
61 subsystem of the Linux Kernel.
62 </para>
63 <para>
64 This documentation is provided for developers who want to implement
65 board drivers or filesystem drivers suitable for NAND devices.
66 </para>
67 </chapter>
68
69 <chapter id="bugs">
70 <title>Known Bugs And Assumptions</title>
71 <para>
72 None.
73 </para>
74 </chapter>
75
76 <chapter id="dochints">
77 <title>Documentation hints</title>
78 <para>
79 The function and structure docs are autogenerated. Each function and
80 struct member has a short description which is marked with an [XXX] identifier.
81 The following chapters explain the meaning of those identifiers.
82 </para>
83 <sect1>
84 <title>Function identifiers [XXX]</title>
85 <para>
86 The functions are marked with [XXX] identifiers in the short
87 comment. The identifiers explain the usage and scope of the
88 functions. Following identifiers are used:
89 </para>
90 <itemizedlist>
91 <listitem><para>
92 [MTD Interface]</para><para>
93 These functions provide the interface to the MTD kernel API.
94 They are not replacable and provide functionality
95 which is complete hardware independent.
96 </para></listitem>
97 <listitem><para>
98 [NAND Interface]</para><para>
99 These functions are exported and provide the interface to the NAND kernel API.
100 </para></listitem>
101 <listitem><para>
102 [GENERIC]</para><para>
103 Generic functions are not replacable and provide functionality
104 which is complete hardware independent.
105 </para></listitem>
106 <listitem><para>
107 [DEFAULT]</para><para>
108 Default functions provide hardware related functionality which is suitable
109 for most of the implementations. These functions can be replaced by the
110 board driver if neccecary. Those functions are called via pointers in the
111 NAND chip description structure. The board driver can set the functions which
Randy Dunlapea9b6dc2006-06-28 21:48:38 -0700112 should be replaced by board dependent functions before calling nand_scan().
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113 If the function pointer is NULL on entry to nand_scan() then the pointer
114 is set to the default function which is suitable for the detected chip type.
115 </para></listitem>
116 </itemizedlist>
117 </sect1>
118 <sect1>
119 <title>Struct member identifiers [XXX]</title>
120 <para>
121 The struct members are marked with [XXX] identifiers in the
122 comment. The identifiers explain the usage and scope of the
123 members. Following identifiers are used:
124 </para>
125 <itemizedlist>
126 <listitem><para>
127 [INTERN]</para><para>
128 These members are for NAND driver internal use only and must not be
129 modified. Most of these values are calculated from the chip geometry
130 information which is evaluated during nand_scan().
131 </para></listitem>
132 <listitem><para>
133 [REPLACEABLE]</para><para>
134 Replaceable members hold hardware related functions which can be
135 provided by the board driver. The board driver can set the functions which
Randy Dunlapea9b6dc2006-06-28 21:48:38 -0700136 should be replaced by board dependent functions before calling nand_scan().
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 If the function pointer is NULL on entry to nand_scan() then the pointer
138 is set to the default function which is suitable for the detected chip type.
139 </para></listitem>
140 <listitem><para>
141 [BOARDSPECIFIC]</para><para>
142 Board specific members hold hardware related information which must
143 be provided by the board driver. The board driver must set the function
144 pointers and datafields before calling nand_scan().
145 </para></listitem>
146 <listitem><para>
147 [OPTIONAL]</para><para>
148 Optional members can hold information relevant for the board driver. The
149 generic NAND driver code does not use this information.
150 </para></listitem>
151 </itemizedlist>
152 </sect1>
153 </chapter>
154
155 <chapter id="basicboarddriver">
156 <title>Basic board driver</title>
157 <para>
158 For most boards it will be sufficient to provide just the
Randy Dunlapea9b6dc2006-06-28 21:48:38 -0700159 basic functions and fill out some really board dependent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 members in the nand chip description structure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161 </para>
162 <sect1>
163 <title>Basic defines</title>
164 <para>
165 At least you have to provide a mtd structure and
166 a storage for the ioremap'ed chip address.
167 You can allocate the mtd structure using kmalloc
168 or you can allocate it statically.
169 In case of static allocation you have to allocate
170 a nand_chip structure too.
171 </para>
172 <para>
173 Kmalloc based example
174 </para>
175 <programlisting>
176static struct mtd_info *board_mtd;
177static unsigned long baseaddr;
178 </programlisting>
179 <para>
180 Static example
181 </para>
182 <programlisting>
183static struct mtd_info board_mtd;
184static struct nand_chip board_chip;
185static unsigned long baseaddr;
186 </programlisting>
187 </sect1>
188 <sect1>
189 <title>Partition defines</title>
190 <para>
191 If you want to divide your device into parititions, then
192 enable the configuration switch CONFIG_MTD_PARITIONS and define
193 a paritioning scheme suitable to your board.
194 </para>
195 <programlisting>
196#define NUM_PARTITIONS 2
197static struct mtd_partition partition_info[] = {
198 { .name = "Flash partition 1",
199 .offset = 0,
200 .size = 8 * 1024 * 1024 },
201 { .name = "Flash partition 2",
202 .offset = MTDPART_OFS_NEXT,
203 .size = MTDPART_SIZ_FULL },
204};
205 </programlisting>
206 </sect1>
207 <sect1>
208 <title>Hardware control function</title>
209 <para>
210 The hardware control function provides access to the
211 control pins of the NAND chip(s).
212 The access can be done by GPIO pins or by address lines.
213 If you use address lines, make sure that the timing
214 requirements are met.
215 </para>
216 <para>
217 <emphasis>GPIO based example</emphasis>
218 </para>
219 <programlisting>
220static void board_hwcontrol(struct mtd_info *mtd, int cmd)
221{
222 switch(cmd){
223 case NAND_CTL_SETCLE: /* Set CLE pin high */ break;
224 case NAND_CTL_CLRCLE: /* Set CLE pin low */ break;
225 case NAND_CTL_SETALE: /* Set ALE pin high */ break;
226 case NAND_CTL_CLRALE: /* Set ALE pin low */ break;
227 case NAND_CTL_SETNCE: /* Set nCE pin low */ break;
228 case NAND_CTL_CLRNCE: /* Set nCE pin high */ break;
229 }
230}
231 </programlisting>
232 <para>
233 <emphasis>Address lines based example.</emphasis> It's assumed that the
234 nCE pin is driven by a chip select decoder.
235 </para>
236 <programlisting>
237static void board_hwcontrol(struct mtd_info *mtd, int cmd)
238{
239 struct nand_chip *this = (struct nand_chip *) mtd->priv;
240 switch(cmd){
241 case NAND_CTL_SETCLE: this->IO_ADDR_W |= CLE_ADRR_BIT; break;
242 case NAND_CTL_CLRCLE: this->IO_ADDR_W &amp;= ~CLE_ADRR_BIT; break;
243 case NAND_CTL_SETALE: this->IO_ADDR_W |= ALE_ADRR_BIT; break;
244 case NAND_CTL_CLRALE: this->IO_ADDR_W &amp;= ~ALE_ADRR_BIT; break;
245 }
246}
247 </programlisting>
248 </sect1>
249 <sect1>
250 <title>Device ready function</title>
251 <para>
252 If the hardware interface has the ready busy pin of the NAND chip connected to a
253 GPIO or other accesible I/O pin, this function is used to read back the state of the
254 pin. The function has no arguments and should return 0, if the device is busy (R/B pin
255 is low) and 1, if the device is ready (R/B pin is high).
256 If the hardware interface does not give access to the ready busy pin, then
257 the function must not be defined and the function pointer this->dev_ready is set to NULL.
258 </para>
259 </sect1>
260 <sect1>
261 <title>Init function</title>
262 <para>
263 The init function allocates memory and sets up all the board
264 specific parameters and function pointers. When everything
265 is set up nand_scan() is called. This function tries to
266 detect and identify then chip. If a chip is found all the
267 internal data fields are initialized accordingly.
268 The structure(s) have to be zeroed out first and then filled with the neccecary
269 information about the device.
270 </para>
271 <programlisting>
272int __init board_init (void)
273{
274 struct nand_chip *this;
275 int err = 0;
276
277 /* Allocate memory for MTD device structure and private data */
278 board_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), GFP_KERNEL);
279 if (!board_mtd) {
280 printk ("Unable to allocate NAND MTD device structure.\n");
281 err = -ENOMEM;
282 goto out;
283 }
284
285 /* Initialize structures */
286 memset ((char *) board_mtd, 0, sizeof(struct mtd_info) + sizeof(struct nand_chip));
287
288 /* map physical adress */
289 baseaddr = (unsigned long)ioremap(CHIP_PHYSICAL_ADDRESS, 1024);
290 if(!baseaddr){
291 printk("Ioremap to access NAND chip failed\n");
292 err = -EIO;
293 goto out_mtd;
294 }
295
296 /* Get pointer to private data */
297 this = (struct nand_chip *) ();
298 /* Link the private data with the MTD structure */
299 board_mtd->priv = this;
300
301 /* Set address of NAND IO lines */
302 this->IO_ADDR_R = baseaddr;
303 this->IO_ADDR_W = baseaddr;
304 /* Reference hardware control function */
305 this->hwcontrol = board_hwcontrol;
306 /* Set command delay time, see datasheet for correct value */
307 this->chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
308 /* Assign the device ready function, if available */
309 this->dev_ready = board_dev_ready;
310 this->eccmode = NAND_ECC_SOFT;
311
312 /* Scan to find existance of the device */
313 if (nand_scan (board_mtd, 1)) {
314 err = -ENXIO;
315 goto out_ior;
316 }
317
318 add_mtd_partitions(board_mtd, partition_info, NUM_PARTITIONS);
319 goto out;
320
321out_ior:
322 iounmap((void *)baseaddr);
323out_mtd:
324 kfree (board_mtd);
325out:
326 return err;
327}
328module_init(board_init);
329 </programlisting>
330 </sect1>
331 <sect1>
332 <title>Exit function</title>
333 <para>
334 The exit function is only neccecary if the driver is
335 compiled as a module. It releases all resources which
336 are held by the chip driver and unregisters the partitions
337 in the MTD layer.
338 </para>
339 <programlisting>
340#ifdef MODULE
341static void __exit board_cleanup (void)
342{
343 /* Release resources, unregister device */
344 nand_release (board_mtd);
345
346 /* unmap physical adress */
347 iounmap((void *)baseaddr);
348
349 /* Free the MTD device structure */
350 kfree (board_mtd);
351}
352module_exit(board_cleanup);
353#endif
354 </programlisting>
355 </sect1>
356 </chapter>
357
358 <chapter id="boarddriversadvanced">
359 <title>Advanced board driver functions</title>
360 <para>
361 This chapter describes the advanced functionality of the NAND
362 driver. For a list of functions which can be overridden by the board
363 driver see the documentation of the nand_chip structure.
364 </para>
365 <sect1>
366 <title>Multiple chip control</title>
367 <para>
368 The nand driver can control chip arrays. Therefor the
369 board driver must provide an own select_chip function. This
370 function must (de)select the requested chip.
371 The function pointer in the nand_chip structure must
372 be set before calling nand_scan(). The maxchip parameter
373 of nand_scan() defines the maximum number of chips to
374 scan for. Make sure that the select_chip function can
375 handle the requested number of chips.
376 </para>
377 <para>
378 The nand driver concatenates the chips to one virtual
379 chip and provides this virtual chip to the MTD layer.
380 </para>
381 <para>
382 <emphasis>Note: The driver can only handle linear chip arrays
383 of equally sized chips. There is no support for
384 parallel arrays which extend the buswidth.</emphasis>
385 </para>
386 <para>
387 <emphasis>GPIO based example</emphasis>
388 </para>
389 <programlisting>
390static void board_select_chip (struct mtd_info *mtd, int chip)
391{
392 /* Deselect all chips, set all nCE pins high */
393 GPIO(BOARD_NAND_NCE) |= 0xff;
394 if (chip >= 0)
395 GPIO(BOARD_NAND_NCE) &amp;= ~ (1 &lt;&lt; chip);
396}
397 </programlisting>
398 <para>
399 <emphasis>Address lines based example.</emphasis>
400 Its assumed that the nCE pins are connected to an
401 address decoder.
402 </para>
403 <programlisting>
404static void board_select_chip (struct mtd_info *mtd, int chip)
405{
406 struct nand_chip *this = (struct nand_chip *) mtd->priv;
407
408 /* Deselect all chips */
409 this->IO_ADDR_R &amp;= ~BOARD_NAND_ADDR_MASK;
410 this->IO_ADDR_W &amp;= ~BOARD_NAND_ADDR_MASK;
411 switch (chip) {
412 case 0:
413 this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
414 this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
415 break;
416 ....
417 case n:
418 this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
419 this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
420 break;
421 }
422}
423 </programlisting>
424 </sect1>
425 <sect1>
426 <title>Hardware ECC support</title>
427 <sect2>
428 <title>Functions and constants</title>
429 <para>
430 The nand driver supports three different types of
431 hardware ECC.
432 <itemizedlist>
433 <listitem><para>NAND_ECC_HW3_256</para><para>
434 Hardware ECC generator providing 3 bytes ECC per
435 256 byte.
436 </para> </listitem>
437 <listitem><para>NAND_ECC_HW3_512</para><para>
438 Hardware ECC generator providing 3 bytes ECC per
439 512 byte.
440 </para> </listitem>
441 <listitem><para>NAND_ECC_HW6_512</para><para>
442 Hardware ECC generator providing 6 bytes ECC per
443 512 byte.
444 </para> </listitem>
445 <listitem><para>NAND_ECC_HW8_512</para><para>
446 Hardware ECC generator providing 6 bytes ECC per
447 512 byte.
448 </para> </listitem>
449 </itemizedlist>
450 If your hardware generator has a different functionality
451 add it at the appropriate place in nand_base.c
452 </para>
453 <para>
454 The board driver must provide following functions:
455 <itemizedlist>
456 <listitem><para>enable_hwecc</para><para>
457 This function is called before reading / writing to
458 the chip. Reset or initialize the hardware generator
459 in this function. The function is called with an
460 argument which let you distinguish between read
461 and write operations.
462 </para> </listitem>
463 <listitem><para>calculate_ecc</para><para>
464 This function is called after read / write from / to
465 the chip. Transfer the ECC from the hardware to
466 the buffer. If the option NAND_HWECC_SYNDROME is set
467 then the function is only called on write. See below.
468 </para> </listitem>
469 <listitem><para>correct_data</para><para>
470 In case of an ECC error this function is called for
471 error detection and correction. Return 1 respectively 2
472 in case the error can be corrected. If the error is
473 not correctable return -1. If your hardware generator
474 matches the default algorithm of the nand_ecc software
475 generator then use the correction function provided
476 by nand_ecc instead of implementing duplicated code.
477 </para> </listitem>
478 </itemizedlist>
479 </para>
480 </sect2>
481 <sect2>
482 <title>Hardware ECC with syndrome calculation</title>
483 <para>
484 Many hardware ECC implementations provide Reed-Solomon
485 codes and calculate an error syndrome on read. The syndrome
486 must be converted to a standard Reed-Solomon syndrome
487 before calling the error correction code in the generic
488 Reed-Solomon library.
489 </para>
490 <para>
491 The ECC bytes must be placed immidiately after the data
492 bytes in order to make the syndrome generator work. This
493 is contrary to the usual layout used by software ECC. The
494 seperation of data and out of band area is not longer
495 possible. The nand driver code handles this layout and
496 the remaining free bytes in the oob area are managed by
497 the autoplacement code. Provide a matching oob-layout
498 in this case. See rts_from4.c and diskonchip.c for
499 implementation reference. In those cases we must also
500 use bad block tables on FLASH, because the ECC layout is
501 interferring with the bad block marker positions.
502 See bad block table support for details.
503 </para>
504 </sect2>
505 </sect1>
506 <sect1>
507 <title>Bad block table support</title>
508 <para>
509 Most NAND chips mark the bad blocks at a defined
510 position in the spare area. Those blocks must
511 not be erased under any circumstances as the bad
512 block information would be lost.
513 It is possible to check the bad block mark each
514 time when the blocks are accessed by reading the
515 spare area of the first page in the block. This
516 is time consuming so a bad block table is used.
517 </para>
518 <para>
519 The nand driver supports various types of bad block
520 tables.
521 <itemizedlist>
522 <listitem><para>Per device</para><para>
523 The bad block table contains all bad block information
524 of the device which can consist of multiple chips.
525 </para> </listitem>
526 <listitem><para>Per chip</para><para>
527 A bad block table is used per chip and contains the
528 bad block information for this particular chip.
529 </para> </listitem>
530 <listitem><para>Fixed offset</para><para>
531 The bad block table is located at a fixed offset
532 in the chip (device). This applies to various
533 DiskOnChip devices.
534 </para> </listitem>
535 <listitem><para>Automatic placed</para><para>
536 The bad block table is automatically placed and
537 detected either at the end or at the beginning
538 of a chip (device)
539 </para> </listitem>
540 <listitem><para>Mirrored tables</para><para>
541 The bad block table is mirrored on the chip (device) to
542 allow updates of the bad block table without data loss.
543 </para> </listitem>
544 </itemizedlist>
545 </para>
546 <para>
547 nand_scan() calls the function nand_default_bbt().
548 nand_default_bbt() selects appropriate default
549 bad block table desriptors depending on the chip information
550 which was retrieved by nand_scan().
551 </para>
552 <para>
553 The standard policy is scanning the device for bad
554 blocks and build a ram based bad block table which
555 allows faster access than always checking the
556 bad block information on the flash chip itself.
557 </para>
558 <sect2>
559 <title>Flash based tables</title>
560 <para>
561 It may be desired or neccecary to keep a bad block table in FLASH.
562 For AG-AND chips this is mandatory, as they have no factory marked
563 bad blocks. They have factory marked good blocks. The marker pattern
564 is erased when the block is erased to be reused. So in case of
565 powerloss before writing the pattern back to the chip this block
566 would be lost and added to the bad blocks. Therefor we scan the
567 chip(s) when we detect them the first time for good blocks and
568 store this information in a bad block table before erasing any
569 of the blocks.
570 </para>
571 <para>
572 The blocks in which the tables are stored are procteted against
573 accidental access by marking them bad in the memory bad block
574 table. The bad block table managment functions are allowed
575 to circumvernt this protection.
576 </para>
577 <para>
578 The simplest way to activate the FLASH based bad block table support
579 is to set the option NAND_USE_FLASH_BBT in the option field of
580 the nand chip structure before calling nand_scan(). For AG-AND
581 chips is this done by default.
582 This activates the default FLASH based bad block table functionality
583 of the NAND driver. The default bad block table options are
584 <itemizedlist>
585 <listitem><para>Store bad block table per chip</para></listitem>
586 <listitem><para>Use 2 bits per block</para></listitem>
587 <listitem><para>Automatic placement at the end of the chip</para></listitem>
588 <listitem><para>Use mirrored tables with version numbers</para></listitem>
589 <listitem><para>Reserve 4 blocks at the end of the chip</para></listitem>
590 </itemizedlist>
591 </para>
592 </sect2>
593 <sect2>
594 <title>User defined tables</title>
595 <para>
596 User defined tables are created by filling out a
597 nand_bbt_descr structure and storing the pointer in the
598 nand_chip structure member bbt_td before calling nand_scan().
599 If a mirror table is neccecary a second structure must be
600 created and a pointer to this structure must be stored
601 in bbt_md inside the nand_chip structure. If the bbt_md
602 member is set to NULL then only the main table is used
603 and no scan for the mirrored table is performed.
604 </para>
605 <para>
606 The most important field in the nand_bbt_descr structure
607 is the options field. The options define most of the
608 table properties. Use the predefined constants from
609 nand.h to define the options.
610 <itemizedlist>
611 <listitem><para>Number of bits per block</para>
612 <para>The supported number of bits is 1, 2, 4, 8.</para></listitem>
613 <listitem><para>Table per chip</para>
614 <para>Setting the constant NAND_BBT_PERCHIP selects that
615 a bad block table is managed for each chip in a chip array.
616 If this option is not set then a per device bad block table
617 is used.</para></listitem>
618 <listitem><para>Table location is absolute</para>
619 <para>Use the option constant NAND_BBT_ABSPAGE and
620 define the absolute page number where the bad block
621 table starts in the field pages. If you have selected bad block
622 tables per chip and you have a multi chip array then the start page
623 must be given for each chip in the chip array. Note: there is no scan
624 for a table ident pattern performed, so the fields
625 pattern, veroffs, offs, len can be left uninitialized</para></listitem>
626 <listitem><para>Table location is automatically detected</para>
627 <para>The table can either be located in the first or the last good
628 blocks of the chip (device). Set NAND_BBT_LASTBLOCK to place
629 the bad block table at the end of the chip (device). The
630 bad block tables are marked and identified by a pattern which
631 is stored in the spare area of the first page in the block which
632 holds the bad block table. Store a pointer to the pattern
633 in the pattern field. Further the length of the pattern has to be
634 stored in len and the offset in the spare area must be given
635 in the offs member of the nand_bbt_descr stucture. For mirrored
636 bad block tables different patterns are mandatory.</para></listitem>
637 <listitem><para>Table creation</para>
638 <para>Set the option NAND_BBT_CREATE to enable the table creation
639 if no table can be found during the scan. Usually this is done only
640 once if a new chip is found. </para></listitem>
641 <listitem><para>Table write support</para>
642 <para>Set the option NAND_BBT_WRITE to enable the table write support.
643 This allows the update of the bad block table(s) in case a block has
644 to be marked bad due to wear. The MTD interface function block_markbad
645 is calling the update function of the bad block table. If the write
646 support is enabled then the table is updated on FLASH.</para>
647 <para>
648 Note: Write support should only be enabled for mirrored tables with
649 version control.
650 </para></listitem>
651 <listitem><para>Table version control</para>
652 <para>Set the option NAND_BBT_VERSION to enable the table version control.
653 It's highly recommended to enable this for mirrored tables with write
654 support. It makes sure that the risk of loosing the bad block
655 table information is reduced to the loss of the information about the
656 one worn out block which should be marked bad. The version is stored in
657 4 consecutive bytes in the spare area of the device. The position of
658 the version number is defined by the member veroffs in the bad block table
659 descriptor.</para></listitem>
660 <listitem><para>Save block contents on write</para>
661 <para>
662 In case that the block which holds the bad block table does contain
663 other useful information, set the option NAND_BBT_SAVECONTENT. When
664 the bad block table is written then the whole block is read the bad
665 block table is updated and the block is erased and everything is
666 written back. If this option is not set only the bad block table
667 is written and everything else in the block is ignored and erased.
668 </para></listitem>
669 <listitem><para>Number of reserved blocks</para>
670 <para>
671 For automatic placement some blocks must be reserved for
672 bad block table storage. The number of reserved blocks is defined
673 in the maxblocks member of the babd block table description structure.
674 Reserving 4 blocks for mirrored tables should be a reasonable number.
675 This also limits the number of blocks which are scanned for the bad
676 block table ident pattern.
677 </para></listitem>
678 </itemizedlist>
679 </para>
680 </sect2>
681 </sect1>
682 <sect1>
683 <title>Spare area (auto)placement</title>
684 <para>
685 The nand driver implements different possibilities for
686 placement of filesystem data in the spare area,
687 <itemizedlist>
688 <listitem><para>Placement defined by fs driver</para></listitem>
689 <listitem><para>Automatic placement</para></listitem>
690 </itemizedlist>
691 The default placement function is automatic placement. The
692 nand driver has built in default placement schemes for the
693 various chiptypes. If due to hardware ECC functionality the
694 default placement does not fit then the board driver can
695 provide a own placement scheme.
696 </para>
697 <para>
698 File system drivers can provide a own placement scheme which
699 is used instead of the default placement scheme.
700 </para>
701 <para>
702 Placement schemes are defined by a nand_oobinfo structure
703 <programlisting>
704struct nand_oobinfo {
705 int useecc;
706 int eccbytes;
707 int eccpos[24];
708 int oobfree[8][2];
709};
710 </programlisting>
711 <itemizedlist>
712 <listitem><para>useecc</para><para>
713 The useecc member controls the ecc and placement function. The header
714 file include/mtd/mtd-abi.h contains constants to select ecc and
715 placement. MTD_NANDECC_OFF switches off the ecc complete. This is
716 not recommended and available for testing and diagnosis only.
717 MTD_NANDECC_PLACE selects caller defined placement, MTD_NANDECC_AUTOPLACE
718 selects automatic placement.
719 </para></listitem>
720 <listitem><para>eccbytes</para><para>
721 The eccbytes member defines the number of ecc bytes per page.
722 </para></listitem>
723 <listitem><para>eccpos</para><para>
724 The eccpos array holds the byte offsets in the spare area where
725 the ecc codes are placed.
726 </para></listitem>
727 <listitem><para>oobfree</para><para>
728 The oobfree array defines the areas in the spare area which can be
729 used for automatic placement. The information is given in the format
730 {offset, size}. offset defines the start of the usable area, size the
731 length in bytes. More than one area can be defined. The list is terminated
732 by an {0, 0} entry.
733 </para></listitem>
734 </itemizedlist>
735 </para>
736 <sect2>
737 <title>Placement defined by fs driver</title>
738 <para>
739 The calling function provides a pointer to a nand_oobinfo
740 structure which defines the ecc placement. For writes the
741 caller must provide a spare area buffer along with the
742 data buffer. The spare area buffer size is (number of pages) *
743 (size of spare area). For reads the buffer size is
744 (number of pages) * ((size of spare area) + (number of ecc
745 steps per page) * sizeof (int)). The driver stores the
746 result of the ecc check for each tuple in the spare buffer.
747 The storage sequence is
748 </para>
749 <para>
750 &lt;spare data page 0&gt;&lt;ecc result 0&gt;...&lt;ecc result n&gt;
751 </para>
752 <para>
753 ...
754 </para>
755 <para>
756 &lt;spare data page n&gt;&lt;ecc result 0&gt;...&lt;ecc result n&gt;
757 </para>
758 <para>
759 This is a legacy mode used by YAFFS1.
760 </para>
761 <para>
762 If the spare area buffer is NULL then only the ECC placement is
763 done according to the given scheme in the nand_oobinfo structure.
764 </para>
765 </sect2>
766 <sect2>
767 <title>Automatic placement</title>
768 <para>
769 Automatic placement uses the built in defaults to place the
770 ecc bytes in the spare area. If filesystem data have to be stored /
771 read into the spare area then the calling function must provide a
772 buffer. The buffer size per page is determined by the oobfree array in
773 the nand_oobinfo structure.
774 </para>
775 <para>
776 If the spare area buffer is NULL then only the ECC placement is
777 done according to the default builtin scheme.
778 </para>
779 </sect2>
780 <sect2>
781 <title>User space placement selection</title>
782 <para>
783 All non ecc functions like mtd->read and mtd->write use an internal
784 structure, which can be set by an ioctl. This structure is preset
785 to the autoplacement default.
786 <programlisting>
787 ioctl (fd, MEMSETOOBSEL, oobsel);
788 </programlisting>
789 oobsel is a pointer to a user supplied structure of type
790 nand_oobconfig. The contents of this structure must match the
791 criteria of the filesystem, which will be used. See an example in utils/nandwrite.c.
792 </para>
793 </sect2>
794 </sect1>
795 <sect1>
796 <title>Spare area autoplacement default schemes</title>
797 <sect2>
798 <title>256 byte pagesize</title>
799<informaltable><tgroup cols="3"><tbody>
800<row>
801<entry>Offset</entry>
802<entry>Content</entry>
803<entry>Comment</entry>
804</row>
805<row>
806<entry>0x00</entry>
807<entry>ECC byte 0</entry>
808<entry>Error correction code byte 0</entry>
809</row>
810<row>
811<entry>0x01</entry>
812<entry>ECC byte 1</entry>
813<entry>Error correction code byte 1</entry>
814</row>
815<row>
816<entry>0x02</entry>
817<entry>ECC byte 2</entry>
818<entry>Error correction code byte 2</entry>
819</row>
820<row>
821<entry>0x03</entry>
822<entry>Autoplace 0</entry>
823<entry></entry>
824</row>
825<row>
826<entry>0x04</entry>
827<entry>Autoplace 1</entry>
828<entry></entry>
829</row>
830<row>
831<entry>0x05</entry>
832<entry>Bad block marker</entry>
833<entry>If any bit in this byte is zero, then this block is bad.
834This applies only to the first page in a block. In the remaining
835pages this byte is reserved</entry>
836</row>
837<row>
838<entry>0x06</entry>
839<entry>Autoplace 2</entry>
840<entry></entry>
841</row>
842<row>
843<entry>0x07</entry>
844<entry>Autoplace 3</entry>
845<entry></entry>
846</row>
847</tbody></tgroup></informaltable>
848 </sect2>
849 <sect2>
850 <title>512 byte pagesize</title>
851<informaltable><tgroup cols="3"><tbody>
852<row>
853<entry>Offset</entry>
854<entry>Content</entry>
855<entry>Comment</entry>
856</row>
857<row>
858<entry>0x00</entry>
859<entry>ECC byte 0</entry>
860<entry>Error correction code byte 0 of the lower 256 Byte data in
861this page</entry>
862</row>
863<row>
864<entry>0x01</entry>
865<entry>ECC byte 1</entry>
866<entry>Error correction code byte 1 of the lower 256 Bytes of data
867in this page</entry>
868</row>
869<row>
870<entry>0x02</entry>
871<entry>ECC byte 2</entry>
872<entry>Error correction code byte 2 of the lower 256 Bytes of data
873in this page</entry>
874</row>
875<row>
876<entry>0x03</entry>
877<entry>ECC byte 3</entry>
878<entry>Error correction code byte 0 of the upper 256 Bytes of data
879in this page</entry>
880</row>
881<row>
882<entry>0x04</entry>
883<entry>reserved</entry>
884<entry>reserved</entry>
885</row>
886<row>
887<entry>0x05</entry>
888<entry>Bad block marker</entry>
889<entry>If any bit in this byte is zero, then this block is bad.
890This applies only to the first page in a block. In the remaining
891pages this byte is reserved</entry>
892</row>
893<row>
894<entry>0x06</entry>
895<entry>ECC byte 4</entry>
896<entry>Error correction code byte 1 of the upper 256 Bytes of data
897in this page</entry>
898</row>
899<row>
900<entry>0x07</entry>
901<entry>ECC byte 5</entry>
902<entry>Error correction code byte 2 of the upper 256 Bytes of data
903in this page</entry>
904</row>
905<row>
906<entry>0x08 - 0x0F</entry>
907<entry>Autoplace 0 - 7</entry>
908<entry></entry>
909</row>
910</tbody></tgroup></informaltable>
911 </sect2>
912 <sect2>
913 <title>2048 byte pagesize</title>
914<informaltable><tgroup cols="3"><tbody>
915<row>
916<entry>Offset</entry>
917<entry>Content</entry>
918<entry>Comment</entry>
919</row>
920<row>
921<entry>0x00</entry>
922<entry>Bad block marker</entry>
923<entry>If any bit in this byte is zero, then this block is bad.
924This applies only to the first page in a block. In the remaining
925pages this byte is reserved</entry>
926</row>
927<row>
928<entry>0x01</entry>
929<entry>Reserved</entry>
930<entry>Reserved</entry>
931</row>
932<row>
933<entry>0x02-0x27</entry>
934<entry>Autoplace 0 - 37</entry>
935<entry></entry>
936</row>
937<row>
938<entry>0x28</entry>
939<entry>ECC byte 0</entry>
940<entry>Error correction code byte 0 of the first 256 Byte data in
941this page</entry>
942</row>
943<row>
944<entry>0x29</entry>
945<entry>ECC byte 1</entry>
946<entry>Error correction code byte 1 of the first 256 Bytes of data
947in this page</entry>
948</row>
949<row>
950<entry>0x2A</entry>
951<entry>ECC byte 2</entry>
952<entry>Error correction code byte 2 of the first 256 Bytes data in
953this page</entry>
954</row>
955<row>
956<entry>0x2B</entry>
957<entry>ECC byte 3</entry>
958<entry>Error correction code byte 0 of the second 256 Bytes of data
959in this page</entry>
960</row>
961<row>
962<entry>0x2C</entry>
963<entry>ECC byte 4</entry>
964<entry>Error correction code byte 1 of the second 256 Bytes of data
965in this page</entry>
966</row>
967<row>
968<entry>0x2D</entry>
969<entry>ECC byte 5</entry>
970<entry>Error correction code byte 2 of the second 256 Bytes of data
971in this page</entry>
972</row>
973<row>
974<entry>0x2E</entry>
975<entry>ECC byte 6</entry>
976<entry>Error correction code byte 0 of the third 256 Bytes of data
977in this page</entry>
978</row>
979<row>
980<entry>0x2F</entry>
981<entry>ECC byte 7</entry>
982<entry>Error correction code byte 1 of the third 256 Bytes of data
983in this page</entry>
984</row>
985<row>
986<entry>0x30</entry>
987<entry>ECC byte 8</entry>
988<entry>Error correction code byte 2 of the third 256 Bytes of data
989in this page</entry>
990</row>
991<row>
992<entry>0x31</entry>
993<entry>ECC byte 9</entry>
994<entry>Error correction code byte 0 of the fourth 256 Bytes of data
995in this page</entry>
996</row>
997<row>
998<entry>0x32</entry>
999<entry>ECC byte 10</entry>
1000<entry>Error correction code byte 1 of the fourth 256 Bytes of data
1001in this page</entry>
1002</row>
1003<row>
1004<entry>0x33</entry>
1005<entry>ECC byte 11</entry>
1006<entry>Error correction code byte 2 of the fourth 256 Bytes of data
1007in this page</entry>
1008</row>
1009<row>
1010<entry>0x34</entry>
1011<entry>ECC byte 12</entry>
1012<entry>Error correction code byte 0 of the fifth 256 Bytes of data
1013in this page</entry>
1014</row>
1015<row>
1016<entry>0x35</entry>
1017<entry>ECC byte 13</entry>
1018<entry>Error correction code byte 1 of the fifth 256 Bytes of data
1019in this page</entry>
1020</row>
1021<row>
1022<entry>0x36</entry>
1023<entry>ECC byte 14</entry>
1024<entry>Error correction code byte 2 of the fifth 256 Bytes of data
1025in this page</entry>
1026</row>
1027<row>
1028<entry>0x37</entry>
1029<entry>ECC byte 15</entry>
1030<entry>Error correction code byte 0 of the sixt 256 Bytes of data
1031in this page</entry>
1032</row>
1033<row>
1034<entry>0x38</entry>
1035<entry>ECC byte 16</entry>
1036<entry>Error correction code byte 1 of the sixt 256 Bytes of data
1037in this page</entry>
1038</row>
1039<row>
1040<entry>0x39</entry>
1041<entry>ECC byte 17</entry>
1042<entry>Error correction code byte 2 of the sixt 256 Bytes of data
1043in this page</entry>
1044</row>
1045<row>
1046<entry>0x3A</entry>
1047<entry>ECC byte 18</entry>
1048<entry>Error correction code byte 0 of the seventh 256 Bytes of
1049data in this page</entry>
1050</row>
1051<row>
1052<entry>0x3B</entry>
1053<entry>ECC byte 19</entry>
1054<entry>Error correction code byte 1 of the seventh 256 Bytes of
1055data in this page</entry>
1056</row>
1057<row>
1058<entry>0x3C</entry>
1059<entry>ECC byte 20</entry>
1060<entry>Error correction code byte 2 of the seventh 256 Bytes of
1061data in this page</entry>
1062</row>
1063<row>
1064<entry>0x3D</entry>
1065<entry>ECC byte 21</entry>
1066<entry>Error correction code byte 0 of the eigth 256 Bytes of data
1067in this page</entry>
1068</row>
1069<row>
1070<entry>0x3E</entry>
1071<entry>ECC byte 22</entry>
1072<entry>Error correction code byte 1 of the eigth 256 Bytes of data
1073in this page</entry>
1074</row>
1075<row>
1076<entry>0x3F</entry>
1077<entry>ECC byte 23</entry>
1078<entry>Error correction code byte 2 of the eigth 256 Bytes of data
1079in this page</entry>
1080</row>
1081</tbody></tgroup></informaltable>
1082 </sect2>
1083 </sect1>
1084 </chapter>
1085
1086 <chapter id="filesystems">
1087 <title>Filesystem support</title>
1088 <para>
1089 The NAND driver provides all neccecary functions for a
1090 filesystem via the MTD interface.
1091 </para>
1092 <para>
1093 Filesystems must be aware of the NAND pecularities and
1094 restrictions. One major restrictions of NAND Flash is, that you cannot
1095 write as often as you want to a page. The consecutive writes to a page,
1096 before erasing it again, are restricted to 1-3 writes, depending on the
1097 manufacturers specifications. This applies similar to the spare area.
1098 </para>
1099 <para>
1100 Therefor NAND aware filesystems must either write in page size chunks
1101 or hold a writebuffer to collect smaller writes until they sum up to
1102 pagesize. Available NAND aware filesystems: JFFS2, YAFFS.
1103 </para>
1104 <para>
1105 The spare area usage to store filesystem data is controlled by
1106 the spare area placement functionality which is described in one
1107 of the earlier chapters.
1108 </para>
1109 </chapter>
1110 <chapter id="tools">
1111 <title>Tools</title>
1112 <para>
1113 The MTD project provides a couple of helpful tools to handle NAND Flash.
1114 <itemizedlist>
1115 <listitem><para>flasherase, flasheraseall: Erase and format FLASH partitions</para></listitem>
1116 <listitem><para>nandwrite: write filesystem images to NAND FLASH</para></listitem>
1117 <listitem><para>nanddump: dump the contents of a NAND FLASH partitions</para></listitem>
1118 </itemizedlist>
1119 </para>
1120 <para>
1121 These tools are aware of the NAND restrictions. Please use those tools
1122 instead of complaining about errors which are caused by non NAND aware
1123 access methods.
1124 </para>
1125 </chapter>
1126
1127 <chapter id="defines">
1128 <title>Constants</title>
1129 <para>
1130 This chapter describes the constants which might be relevant for a driver developer.
1131 </para>
1132 <sect1>
1133 <title>Chip option constants</title>
1134 <sect2>
1135 <title>Constants for chip id table</title>
1136 <para>
1137 These constants are defined in nand.h. They are ored together to describe
1138 the chip functionality.
1139 <programlisting>
1140/* Chip can not auto increment pages */
1141#define NAND_NO_AUTOINCR 0x00000001
1142/* Buswitdh is 16 bit */
1143#define NAND_BUSWIDTH_16 0x00000002
1144/* Device supports partial programming without padding */
1145#define NAND_NO_PADDING 0x00000004
1146/* Chip has cache program function */
1147#define NAND_CACHEPRG 0x00000008
1148/* Chip has copy back function */
1149#define NAND_COPYBACK 0x00000010
1150/* AND Chip which has 4 banks and a confusing page / block
1151 * assignment. See Renesas datasheet for further information */
1152#define NAND_IS_AND 0x00000020
1153/* Chip has a array of 4 pages which can be read without
1154 * additional ready /busy waits */
1155#define NAND_4PAGE_ARRAY 0x00000040
1156 </programlisting>
1157 </para>
1158 </sect2>
1159 <sect2>
1160 <title>Constants for runtime options</title>
1161 <para>
1162 These constants are defined in nand.h. They are ored together to describe
1163 the functionality.
1164 <programlisting>
1165/* Use a flash based bad block table. This option is parsed by the
1166 * default bad block table function (nand_default_bbt). */
1167#define NAND_USE_FLASH_BBT 0x00010000
1168/* The hw ecc generator provides a syndrome instead a ecc value on read
1169 * This can only work if we have the ecc bytes directly behind the
1170 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
1171#define NAND_HWECC_SYNDROME 0x00020000
1172 </programlisting>
1173 </para>
1174 </sect2>
1175 </sect1>
1176
1177 <sect1>
1178 <title>ECC selection constants</title>
1179 <para>
1180 Use these constants to select the ECC algorithm.
1181 <programlisting>
1182/* No ECC. Usage is not recommended ! */
1183#define NAND_ECC_NONE 0
1184/* Software ECC 3 byte ECC per 256 Byte data */
1185#define NAND_ECC_SOFT 1
1186/* Hardware ECC 3 byte ECC per 256 Byte data */
1187#define NAND_ECC_HW3_256 2
1188/* Hardware ECC 3 byte ECC per 512 Byte data */
1189#define NAND_ECC_HW3_512 3
1190/* Hardware ECC 6 byte ECC per 512 Byte data */
1191#define NAND_ECC_HW6_512 4
1192/* Hardware ECC 6 byte ECC per 512 Byte data */
1193#define NAND_ECC_HW8_512 6
1194 </programlisting>
1195 </para>
1196 </sect1>
1197
1198 <sect1>
1199 <title>Hardware control related constants</title>
1200 <para>
1201 These constants describe the requested hardware access function when
1202 the boardspecific hardware control function is called
1203 <programlisting>
1204/* Select the chip by setting nCE to low */
1205#define NAND_CTL_SETNCE 1
1206/* Deselect the chip by setting nCE to high */
1207#define NAND_CTL_CLRNCE 2
1208/* Select the command latch by setting CLE to high */
1209#define NAND_CTL_SETCLE 3
1210/* Deselect the command latch by setting CLE to low */
1211#define NAND_CTL_CLRCLE 4
1212/* Select the address latch by setting ALE to high */
1213#define NAND_CTL_SETALE 5
1214/* Deselect the address latch by setting ALE to low */
1215#define NAND_CTL_CLRALE 6
1216/* Set write protection by setting WP to high. Not used! */
1217#define NAND_CTL_SETWP 7
1218/* Clear write protection by setting WP to low. Not used! */
1219#define NAND_CTL_CLRWP 8
1220 </programlisting>
1221 </para>
1222 </sect1>
1223
1224 <sect1>
1225 <title>Bad block table related constants</title>
1226 <para>
1227 These constants describe the options used for bad block
1228 table descriptors.
1229 <programlisting>
1230/* Options for the bad block table descriptors */
1231
1232/* The number of bits used per block in the bbt on the device */
1233#define NAND_BBT_NRBITS_MSK 0x0000000F
1234#define NAND_BBT_1BIT 0x00000001
1235#define NAND_BBT_2BIT 0x00000002
1236#define NAND_BBT_4BIT 0x00000004
1237#define NAND_BBT_8BIT 0x00000008
1238/* The bad block table is in the last good block of the device */
1239#define NAND_BBT_LASTBLOCK 0x00000010
1240/* The bbt is at the given page, else we must scan for the bbt */
1241#define NAND_BBT_ABSPAGE 0x00000020
1242/* The bbt is at the given page, else we must scan for the bbt */
1243#define NAND_BBT_SEARCH 0x00000040
1244/* bbt is stored per chip on multichip devices */
1245#define NAND_BBT_PERCHIP 0x00000080
1246/* bbt has a version counter at offset veroffs */
1247#define NAND_BBT_VERSION 0x00000100
1248/* Create a bbt if none axists */
1249#define NAND_BBT_CREATE 0x00000200
1250/* Search good / bad pattern through all pages of a block */
1251#define NAND_BBT_SCANALLPAGES 0x00000400
1252/* Scan block empty during good / bad block scan */
1253#define NAND_BBT_SCANEMPTY 0x00000800
1254/* Write bbt if neccecary */
1255#define NAND_BBT_WRITE 0x00001000
1256/* Read and write back block contents when writing bbt */
1257#define NAND_BBT_SAVECONTENT 0x00002000
1258 </programlisting>
1259 </para>
1260 </sect1>
1261
1262 </chapter>
1263
1264 <chapter id="structs">
1265 <title>Structures</title>
1266 <para>
1267 This chapter contains the autogenerated documentation of the structures which are
1268 used in the NAND driver and might be relevant for a driver developer. Each
1269 struct member has a short description which is marked with an [XXX] identifier.
1270 See the chapter "Documentation hints" for an explanation.
1271 </para>
1272!Iinclude/linux/mtd/nand.h
1273 </chapter>
1274
1275 <chapter id="pubfunctions">
1276 <title>Public Functions Provided</title>
1277 <para>
1278 This chapter contains the autogenerated documentation of the NAND kernel API functions
1279 which are exported. Each function has a short description which is marked with an [XXX] identifier.
1280 See the chapter "Documentation hints" for an explanation.
1281 </para>
1282!Edrivers/mtd/nand/nand_base.c
1283!Edrivers/mtd/nand/nand_bbt.c
1284!Edrivers/mtd/nand/nand_ecc.c
1285 </chapter>
1286
1287 <chapter id="intfunctions">
1288 <title>Internal Functions Provided</title>
1289 <para>
1290 This chapter contains the autogenerated documentation of the NAND driver internal functions.
1291 Each function has a short description which is marked with an [XXX] identifier.
1292 See the chapter "Documentation hints" for an explanation.
1293 The functions marked with [DEFAULT] might be relevant for a board driver developer.
1294 </para>
1295!Idrivers/mtd/nand/nand_base.c
1296!Idrivers/mtd/nand/nand_bbt.c
Randy Dunlap844d3b42006-06-28 21:48:27 -07001297<!-- No internal functions for kernel-doc:
1298X!Idrivers/mtd/nand/nand_ecc.c
1299-->
Linus Torvalds1da177e2005-04-16 15:20:36 -07001300 </chapter>
1301
1302 <chapter id="credits">
1303 <title>Credits</title>
1304 <para>
1305 The following people have contributed to the NAND driver:
1306 <orderedlist>
1307 <listitem><para>Steven J. Hill<email>sjhill@realitydiluted.com</email></para></listitem>
1308 <listitem><para>David Woodhouse<email>dwmw2@infradead.org</email></para></listitem>
1309 <listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem>
1310 </orderedlist>
1311 A lot of users have provided bugfixes, improvements and helping hands for testing.
1312 Thanks a lot.
1313 </para>
1314 <para>
1315 The following people have contributed to this document:
1316 <orderedlist>
1317 <listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem>
1318 </orderedlist>
1319 </para>
1320 </chapter>
1321</book>