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David Howells803f6912012-03-28 18:30:02 +01001#ifndef _M68K_BARRIER_H
2#define _M68K_BARRIER_H
3
4/*
5 * Force strict CPU ordering.
6 * Not really required on m68k...
7 */
8#define nop() do { asm volatile ("nop"); barrier(); } while (0)
9#define mb() barrier()
10#define rmb() barrier()
11#define wmb() barrier()
12#define read_barrier_depends() ((void)0)
13#define set_mb(var, value) ({ (var) = (value); wmb(); })
14
15#define smp_mb() barrier()
16#define smp_rmb() barrier()
17#define smp_wmb() barrier()
18#define smp_read_barrier_depends() ((void)0)
19
20#endif /* _M68K_BARRIER_H */