| Jon Loeliger | ef82a30 | 2006-06-17 17:52:55 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * Driver for Vitesse PHYs |
| 3 | * |
| 4 | * Author: Kriston Carson |
| 5 | * |
| 6 | * Copyright (c) 2005 Freescale Semiconductor, Inc. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <linux/config.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/mii.h> |
| 19 | #include <linux/ethtool.h> |
| 20 | #include <linux/phy.h> |
| 21 | |
| 22 | /* Vitesse Extended Control Register 1 */ |
| 23 | #define MII_VSC8244_EXT_CON1 0x17 |
| 24 | #define MII_VSC8244_EXTCON1_INIT 0x0000 |
| 25 | |
| 26 | /* Vitesse Interrupt Mask Register */ |
| 27 | #define MII_VSC8244_IMASK 0x19 |
| 28 | #define MII_VSC8244_IMASK_IEN 0x8000 |
| 29 | #define MII_VSC8244_IMASK_SPEED 0x4000 |
| 30 | #define MII_VSC8244_IMASK_LINK 0x2000 |
| 31 | #define MII_VSC8244_IMASK_DUPLEX 0x1000 |
| 32 | #define MII_VSC8244_IMASK_MASK 0xf000 |
| 33 | |
| 34 | /* Vitesse Interrupt Status Register */ |
| 35 | #define MII_VSC8244_ISTAT 0x1a |
| 36 | #define MII_VSC8244_ISTAT_STATUS 0x8000 |
| 37 | #define MII_VSC8244_ISTAT_SPEED 0x4000 |
| 38 | #define MII_VSC8244_ISTAT_LINK 0x2000 |
| 39 | #define MII_VSC8244_ISTAT_DUPLEX 0x1000 |
| 40 | |
| 41 | /* Vitesse Auxiliary Control/Status Register */ |
| 42 | #define MII_VSC8244_AUX_CONSTAT 0x1c |
| 43 | #define MII_VSC8244_AUXCONSTAT_INIT 0x0004 |
| 44 | #define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020 |
| 45 | #define MII_VSC8244_AUXCONSTAT_SPEED 0x0018 |
| 46 | #define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 |
| 47 | #define MII_VSC8244_AUXCONSTAT_100 0x0008 |
| 48 | |
| 49 | MODULE_DESCRIPTION("Vitesse PHY driver"); |
| 50 | MODULE_AUTHOR("Kriston Carson"); |
| 51 | MODULE_LICENSE("GPL"); |
| 52 | |
| 53 | static int vsc824x_config_init(struct phy_device *phydev) |
| 54 | { |
| 55 | int err; |
| 56 | |
| 57 | err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, |
| 58 | MII_VSC8244_AUXCONSTAT_INIT); |
| 59 | if (err < 0) |
| 60 | return err; |
| 61 | |
| 62 | err = phy_write(phydev, MII_VSC8244_EXT_CON1, |
| 63 | MII_VSC8244_EXTCON1_INIT); |
| 64 | return err; |
| 65 | } |
| 66 | |
| 67 | static int vsc824x_ack_interrupt(struct phy_device *phydev) |
| 68 | { |
| 69 | int err = phy_read(phydev, MII_VSC8244_ISTAT); |
| 70 | |
| 71 | return (err < 0) ? err : 0; |
| 72 | } |
| 73 | |
| 74 | static int vsc824x_config_intr(struct phy_device *phydev) |
| 75 | { |
| 76 | int err; |
| 77 | |
| 78 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) |
| 79 | err = phy_write(phydev, MII_VSC8244_IMASK, |
| 80 | MII_VSC8244_IMASK_MASK); |
| 81 | else |
| 82 | err = phy_write(phydev, MII_VSC8244_IMASK, 0); |
| 83 | return err; |
| 84 | } |
| 85 | |
| 86 | /* Vitesse 824x */ |
| 87 | static struct phy_driver vsc8244_driver = { |
| 88 | .phy_id = 0x000fc6c2, |
| 89 | .name = "Vitesse VSC8244", |
| 90 | .phy_id_mask = 0x000fffc0, |
| 91 | .features = PHY_GBIT_FEATURES, |
| 92 | .flags = PHY_HAS_INTERRUPT, |
| 93 | .config_init = &vsc824x_config_init, |
| 94 | .config_aneg = &genphy_config_aneg, |
| 95 | .read_status = &genphy_read_status, |
| 96 | .ack_interrupt = &vsc824x_ack_interrupt, |
| 97 | .config_intr = &vsc824x_config_intr, |
| 98 | .driver = { .owner = THIS_MODULE,}, |
| 99 | }; |
| 100 | |
| 101 | static int __init vsc8244_init(void) |
| 102 | { |
| 103 | return phy_driver_register(&vsc8244_driver); |
| 104 | } |
| 105 | |
| 106 | static void __exit vsc8244_exit(void) |
| 107 | { |
| 108 | phy_driver_unregister(&vsc8244_driver); |
| 109 | } |
| 110 | |
| 111 | module_init(vsc8244_init); |
| 112 | module_exit(vsc8244_exit); |