blob: b3518131ea0d502c1677e392ac3242771330e418 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*======================================================================
2
3 Device driver for the PCMCIA control functionality of PXA2xx
4 microprocessors.
5
6 The contents of this file may be used under the
7 terms of the GNU Public License version 2 (the "GPL")
8
9 (c) Ian Molton (spyro@f2s.com) 2003
10 (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
11
12 derived from sa11xx_base.c
13
14 Portions created by John G. Dorsey are
15 Copyright (C) 1999 John G. Dorsey.
16
17 ======================================================================*/
18
19#include <linux/module.h>
20#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/cpufreq.h>
22#include <linux/ioport.h>
23#include <linux/kernel.h>
24#include <linux/spinlock.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010025#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/system.h>
31#include <asm/arch/pxa-regs.h>
32
33#include <pcmcia/cs_types.h>
34#include <pcmcia/ss.h>
35#include <pcmcia/bulkmem.h>
36#include <pcmcia/cistpl.h>
37
38#include "cs_internal.h"
39#include "soc_common.h"
40#include "pxa2xx_base.h"
41
42
43#define MCXX_SETUP_MASK (0x7f)
44#define MCXX_ASST_MASK (0x1f)
45#define MCXX_HOLD_MASK (0x3f)
46#define MCXX_SETUP_SHIFT (0)
47#define MCXX_ASST_SHIFT (7)
48#define MCXX_HOLD_SHIFT (14)
49
50static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
51 u_int mem_clk_10khz)
52{
53 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
54 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
55}
56
57static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
58 u_int mem_clk_10khz)
59{
60 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
61 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
62}
63
64static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
65 u_int mem_clk_10khz)
66{
67 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
68 return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
69}
70
71/* This function returns the (approximate) command assertion period, in
72 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
73 */
74static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
75 u_int pcmcia_mcxx_asst)
76{
77 return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
78}
79
80static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
81{
82 MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
83 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
84 | ((pxa2xx_mcxx_asst(speed, clock)
85 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
86 | ((pxa2xx_mcxx_hold(speed, clock)
87 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
88
89 return 0;
90}
91
92static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
93{
94 MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
95 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
96 | ((pxa2xx_mcxx_asst(speed, clock)
97 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
98 | ((pxa2xx_mcxx_hold(speed, clock)
99 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
100
101 return 0;
102}
103
104static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
105{
106 MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
107 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
108 | ((pxa2xx_mcxx_asst(speed, clock)
109 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
110 | ((pxa2xx_mcxx_hold(speed, clock)
111 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
112
113 return 0;
114}
115
116static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
117{
118 struct soc_pcmcia_timing timing;
119 int sock = skt->nr;
120
121 soc_common_pcmcia_get_timing(skt, &timing);
122
123 pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
124 pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
125 pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
126
127 return 0;
128}
129
130static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
131{
132 unsigned int clk = get_memclk_frequency_10khz();
133 return pxa2xx_pcmcia_set_mcxx(skt, clk);
134}
135
136#ifdef CONFIG_CPU_FREQ
137
138static int
139pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
140 unsigned long val,
141 struct cpufreq_freqs *freqs)
142{
143#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
144 switch (val) {
145 case CPUFREQ_PRECHANGE:
146 if (freqs->new > freqs->old) {
147 debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
148 "pre-updating\n",
149 freqs->new / 1000, (freqs->new / 100) % 10,
150 freqs->old / 1000, (freqs->old / 100) % 10);
151 pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
152 }
153 break;
154
155 case CPUFREQ_POSTCHANGE:
156 if (freqs->new < freqs->old) {
157 debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
158 "post-updating\n",
159 freqs->new / 1000, (freqs->new / 100) % 10,
160 freqs->old / 1000, (freqs->old / 100) % 10);
161 pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
162 }
163 break;
164 }
165 return 0;
166}
167#endif
168
169int pxa2xx_drv_pcmcia_probe(struct device *dev)
170{
171 int ret;
172 struct pcmcia_low_level *ops;
173 int first, nr;
174
175 if (!dev || !dev->platform_data)
176 return -ENODEV;
177
178 ops = (struct pcmcia_low_level *)dev->platform_data;
179 first = ops->first;
180 nr = ops->nr;
181
182 /* Provide our PXA2xx specific timing routines. */
183 ops->set_timing = pxa2xx_pcmcia_set_timing;
184#ifdef CONFIG_CPU_FREQ
185 ops->frequency_change = pxa2xx_pcmcia_frequency_change;
186#endif
187
188 ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);
189
190 if (ret == 0) {
191 /*
192 * We have at least one socket, so set MECR:CIT
193 * (Card Is There)
194 */
195 MECR |= MECR_CIT;
196
197 /* Set MECR:NOS (Number Of Sockets) */
198 if (nr > 1)
199 MECR |= MECR_NOS;
200 else
201 MECR &= ~MECR_NOS;
202 }
203
204 return ret;
205}
206EXPORT_SYMBOL(pxa2xx_drv_pcmcia_probe);
207
Russell King9480e302005-10-28 09:52:56 -0700208static int pxa2xx_drv_pcmcia_resume(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209{
Russell King9480e302005-10-28 09:52:56 -0700210 struct pcmcia_low_level *ops = dev->platform_data;
211 int nr = ops ? ops->nr : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
Russell King9480e302005-10-28 09:52:56 -0700213 MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214
Russell King9480e302005-10-28 09:52:56 -0700215 return pcmcia_socket_dev_resume(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216}
217
218static struct device_driver pxa2xx_pcmcia_driver = {
219 .probe = pxa2xx_drv_pcmcia_probe,
220 .remove = soc_common_drv_pcmcia_remove,
Russell King9480e302005-10-28 09:52:56 -0700221 .suspend = pcmcia_socket_dev_suspend,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222 .resume = pxa2xx_drv_pcmcia_resume,
223 .name = "pxa2xx-pcmcia",
224 .bus = &platform_bus_type,
225};
226
227static int __init pxa2xx_pcmcia_init(void)
228{
229 return driver_register(&pxa2xx_pcmcia_driver);
230}
231
232static void __exit pxa2xx_pcmcia_exit(void)
233{
234 driver_unregister(&pxa2xx_pcmcia_driver);
235}
236
Richard Purdief36598a2005-09-03 19:39:25 +0100237fs_initcall(pxa2xx_pcmcia_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238module_exit(pxa2xx_pcmcia_exit);
239
240MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
241MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
242MODULE_LICENSE("GPL");