Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/ucc_geth_mii.c |
| 3 | * |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 4 | * QE UCC Gigabit Ethernet Driver -- MII Management Bus Implementation |
| 5 | * Provides Bus interface for MII Management regs in the UCC register space |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 6 | * |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 7 | * Copyright (C) 2007 Freescale Semiconductor, Inc. |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 8 | * |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 9 | * Authors: Li Yang <leoli@freescale.com> |
| 10 | * Kim Phillips <kim.phillips@freescale.com> |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify it |
| 13 | * under the terms of the GNU General Public License as published by the |
| 14 | * Free Software Foundation; either version 2 of the License, or (at your |
| 15 | * option) any later version. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/sched.h> |
| 21 | #include <linux/string.h> |
| 22 | #include <linux/errno.h> |
| 23 | #include <linux/unistd.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/delay.h> |
| 28 | #include <linux/netdevice.h> |
| 29 | #include <linux/etherdevice.h> |
| 30 | #include <linux/skbuff.h> |
| 31 | #include <linux/spinlock.h> |
| 32 | #include <linux/mm.h> |
| 33 | #include <linux/module.h> |
| 34 | #include <linux/platform_device.h> |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 35 | #include <linux/crc32.h> |
| 36 | #include <linux/mii.h> |
| 37 | #include <linux/phy.h> |
| 38 | #include <linux/fsl_devices.h> |
| 39 | |
| 40 | #include <asm/of_platform.h> |
| 41 | #include <asm/io.h> |
| 42 | #include <asm/irq.h> |
| 43 | #include <asm/uaccess.h> |
| 44 | #include <asm/ucc.h> |
| 45 | |
| 46 | #include "ucc_geth_mii.h" |
| 47 | #include "ucc_geth.h" |
| 48 | |
| 49 | #define DEBUG |
| 50 | #ifdef DEBUG |
| 51 | #define vdbg(format, arg...) printk(KERN_DEBUG , format "\n" , ## arg) |
| 52 | #else |
| 53 | #define vdbg(format, arg...) do {} while(0) |
| 54 | #endif |
| 55 | |
Li Yang | ac42185 | 2007-07-19 11:47:47 +0800 | [diff] [blame] | 56 | #define MII_DRV_DESC "QE UCC Ethernet Controller MII Bus" |
| 57 | #define MII_DRV_NAME "fsl-uec_mdio" |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 58 | |
| 59 | /* Write value to the PHY for this device to the register at regnum, */ |
| 60 | /* waiting until the write is done before it returns. All PHY */ |
| 61 | /* configuration has to be done through the master UEC MIIM regs */ |
| 62 | int uec_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value) |
| 63 | { |
| 64 | struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv; |
| 65 | |
| 66 | /* Setting up the MII Mangement Address Register */ |
| 67 | out_be32(®s->miimadd, |
| 68 | (mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | regnum); |
| 69 | |
| 70 | /* Setting up the MII Mangement Control Register with the value */ |
| 71 | out_be32(®s->miimcon, value); |
| 72 | |
| 73 | /* Wait till MII management write is complete */ |
| 74 | while ((in_be32(®s->miimind)) & MIIMIND_BUSY) |
| 75 | cpu_relax(); |
| 76 | |
| 77 | return 0; |
| 78 | } |
| 79 | |
| 80 | /* Reads from register regnum in the PHY for device dev, */ |
| 81 | /* returning the value. Clears miimcom first. All PHY */ |
| 82 | /* configuration has to be done through the TSEC1 MIIM regs */ |
| 83 | int uec_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
| 84 | { |
| 85 | struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv; |
| 86 | u16 value; |
| 87 | |
| 88 | /* Setting up the MII Mangement Address Register */ |
| 89 | out_be32(®s->miimadd, |
| 90 | (mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | regnum); |
| 91 | |
| 92 | /* Clear miimcom, perform an MII management read cycle */ |
| 93 | out_be32(®s->miimcom, 0); |
| 94 | out_be32(®s->miimcom, MIIMCOM_READ_CYCLE); |
| 95 | |
| 96 | /* Wait till MII management write is complete */ |
| 97 | while ((in_be32(®s->miimind)) & (MIIMIND_BUSY | MIIMIND_NOT_VALID)) |
| 98 | cpu_relax(); |
| 99 | |
| 100 | /* Read MII management status */ |
| 101 | value = in_be32(®s->miimstat); |
| 102 | |
| 103 | return value; |
| 104 | } |
| 105 | |
| 106 | /* Reset the MIIM registers, and wait for the bus to free */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 107 | static int uec_mdio_reset(struct mii_bus *bus) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 108 | { |
| 109 | struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv; |
| 110 | unsigned int timeout = PHY_INIT_TIMEOUT; |
| 111 | |
Andy Fleming | 15cf6dd | 2008-02-05 16:35:30 -0600 | [diff] [blame] | 112 | mutex_lock(&bus->mdio_lock); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 113 | |
| 114 | /* Reset the management interface */ |
| 115 | out_be32(®s->miimcfg, MIIMCFG_RESET_MANAGEMENT); |
| 116 | |
| 117 | /* Setup the MII Mgmt clock speed */ |
| 118 | out_be32(®s->miimcfg, MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_112); |
| 119 | |
| 120 | /* Wait until the bus is free */ |
| 121 | while ((in_be32(®s->miimind) & MIIMIND_BUSY) && timeout--) |
| 122 | cpu_relax(); |
| 123 | |
Andy Fleming | 15cf6dd | 2008-02-05 16:35:30 -0600 | [diff] [blame] | 124 | mutex_unlock(&bus->mdio_lock); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 125 | |
| 126 | if (timeout <= 0) { |
| 127 | printk(KERN_ERR "%s: The MII Bus is stuck!\n", bus->name); |
| 128 | return -EBUSY; |
| 129 | } |
| 130 | |
| 131 | return 0; |
| 132 | } |
| 133 | |
| 134 | static int uec_mdio_probe(struct of_device *ofdev, const struct of_device_id *match) |
| 135 | { |
| 136 | struct device *device = &ofdev->dev; |
| 137 | struct device_node *np = ofdev->node, *tempnp = NULL; |
| 138 | struct device_node *child = NULL; |
| 139 | struct ucc_mii_mng __iomem *regs; |
| 140 | struct mii_bus *new_bus; |
| 141 | struct resource res; |
| 142 | int k, err = 0; |
| 143 | |
| 144 | new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL); |
| 145 | |
| 146 | if (NULL == new_bus) |
| 147 | return -ENOMEM; |
| 148 | |
| 149 | new_bus->name = "UCC Ethernet Controller MII Bus"; |
| 150 | new_bus->read = &uec_mdio_read; |
| 151 | new_bus->write = &uec_mdio_write; |
| 152 | new_bus->reset = &uec_mdio_reset; |
| 153 | |
| 154 | memset(&res, 0, sizeof(res)); |
| 155 | |
| 156 | err = of_address_to_resource(np, 0, &res); |
| 157 | if (err) |
| 158 | goto reg_map_fail; |
| 159 | |
Andy Fleming | 9d9326d | 2008-04-09 19:38:13 -0500 | [diff] [blame] | 160 | snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 161 | |
| 162 | new_bus->irq = kmalloc(32 * sizeof(int), GFP_KERNEL); |
| 163 | |
| 164 | if (NULL == new_bus->irq) { |
| 165 | err = -ENOMEM; |
| 166 | goto reg_map_fail; |
| 167 | } |
| 168 | |
| 169 | for (k = 0; k < 32; k++) |
| 170 | new_bus->irq[k] = PHY_POLL; |
| 171 | |
| 172 | while ((child = of_get_next_child(np, child)) != NULL) { |
| 173 | int irq = irq_of_parse_and_map(child, 0); |
| 174 | if (irq != NO_IRQ) { |
Stephen Rothwell | 40cd3a4 | 2007-05-01 13:54:02 +1000 | [diff] [blame] | 175 | const u32 *id = of_get_property(child, "reg", NULL); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 176 | new_bus->irq[*id] = irq; |
| 177 | } |
| 178 | } |
| 179 | |
| 180 | /* Set the base address */ |
| 181 | regs = ioremap(res.start, sizeof(struct ucc_mii_mng)); |
| 182 | |
| 183 | if (NULL == regs) { |
| 184 | err = -ENOMEM; |
| 185 | goto ioremap_fail; |
| 186 | } |
| 187 | |
| 188 | new_bus->priv = (void __force *)regs; |
| 189 | |
| 190 | new_bus->dev = device; |
| 191 | dev_set_drvdata(device, new_bus); |
| 192 | |
| 193 | /* Read MII management master from device tree */ |
| 194 | while ((tempnp = of_find_compatible_node(tempnp, "network", "ucc_geth")) |
| 195 | != NULL) { |
| 196 | struct resource tempres; |
| 197 | |
| 198 | err = of_address_to_resource(tempnp, 0, &tempres); |
| 199 | if (err) |
| 200 | goto bus_register_fail; |
| 201 | |
| 202 | /* if our mdio regs fall within this UCC regs range */ |
| 203 | if ((res.start >= tempres.start) && |
| 204 | (res.end <= tempres.end)) { |
| 205 | /* set this UCC to be the MII master */ |
Anton Vorontsov | 56626f3 | 2008-04-11 20:06:54 +0400 | [diff] [blame] | 206 | const u32 *id; |
| 207 | |
| 208 | id = of_get_property(tempnp, "cell-index", NULL); |
| 209 | if (!id) { |
| 210 | id = of_get_property(tempnp, "device-id", NULL); |
| 211 | if (!id) |
| 212 | goto bus_register_fail; |
| 213 | } |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 214 | |
| 215 | ucc_set_qe_mux_mii_mng(*id - 1); |
| 216 | |
| 217 | /* assign the TBI an address which won't |
| 218 | * conflict with the PHYs */ |
| 219 | out_be32(®s->utbipar, UTBIPAR_INIT_TBIPA); |
| 220 | break; |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | err = mdiobus_register(new_bus); |
| 225 | if (0 != err) { |
| 226 | printk(KERN_ERR "%s: Cannot register as MDIO bus\n", |
| 227 | new_bus->name); |
| 228 | goto bus_register_fail; |
| 229 | } |
| 230 | |
| 231 | return 0; |
| 232 | |
| 233 | bus_register_fail: |
| 234 | iounmap(regs); |
| 235 | ioremap_fail: |
| 236 | kfree(new_bus->irq); |
| 237 | reg_map_fail: |
| 238 | kfree(new_bus); |
| 239 | |
| 240 | return err; |
| 241 | } |
| 242 | |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 243 | static int uec_mdio_remove(struct of_device *ofdev) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 244 | { |
| 245 | struct device *device = &ofdev->dev; |
| 246 | struct mii_bus *bus = dev_get_drvdata(device); |
| 247 | |
| 248 | mdiobus_unregister(bus); |
| 249 | |
| 250 | dev_set_drvdata(device, NULL); |
| 251 | |
| 252 | iounmap((void __iomem *)bus->priv); |
| 253 | bus->priv = NULL; |
| 254 | kfree(bus); |
| 255 | |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | static struct of_device_id uec_mdio_match[] = { |
| 260 | { |
| 261 | .type = "mdio", |
| 262 | .compatible = "ucc_geth_phy", |
| 263 | }, |
Anton Vorontsov | d0a2f82 | 2008-01-24 18:40:01 +0300 | [diff] [blame] | 264 | { |
| 265 | .compatible = "fsl,ucc-mdio", |
| 266 | }, |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 267 | {}, |
| 268 | }; |
| 269 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 270 | static struct of_platform_driver uec_mdio_driver = { |
Li Yang | ac42185 | 2007-07-19 11:47:47 +0800 | [diff] [blame] | 271 | .name = MII_DRV_NAME, |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 272 | .probe = uec_mdio_probe, |
| 273 | .remove = uec_mdio_remove, |
| 274 | .match_table = uec_mdio_match, |
| 275 | }; |
| 276 | |
| 277 | int __init uec_mdio_init(void) |
| 278 | { |
| 279 | return of_register_platform_driver(&uec_mdio_driver); |
| 280 | } |
| 281 | |
Domen Puncer | ed7e63a | 2007-08-03 16:07:58 +0800 | [diff] [blame] | 282 | /* called from __init ucc_geth_init, therefore can not be __exit */ |
| 283 | void uec_mdio_exit(void) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 284 | { |
| 285 | of_unregister_platform_driver(&uec_mdio_driver); |
| 286 | } |