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gerrit-public.fairphone.software / kernel / msm / f2945efa987254f7f3db4aa99c6759a74521c5f4 / . / arch / arm / boot / dts / msm8226.dtsi
blob: 8f9804d5d381332664af8f6be4fe49047b0380b5 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]24 };
25
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]26 memory {
27 secure_mem: secure_region {
28 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]29 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]30 label = "secure_mem";
31 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]32
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]33 adsp_mem: adsp_region {
34 linux,contiguous-region;
35 reg = <0 0x2000000>;
36 label = "adsp_mem";
37 };
38
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]39 qsecom_mem: qsecom_region {
40 linux,contiguous-region;
41 reg = <0 0x780000>;
42 label = "qsecom_mem";
43 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]44 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]45
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]46 soc: soc { };
47};
48
49/include/ "msm8226-ion.dtsi"
50/include/ "msm8226-camera.dtsi"
51/include/ "msm-gdsc.dtsi"
52/include/ "msm8226-iommu.dtsi"
53/include/ "msm8226-pm.dtsi"
54/include/ "msm8226-smp2p.dtsi"
55/include/ "msm8226-gpu.dtsi"
56/include/ "msm8226-bus.dtsi"
57/include/ "msm8226-mdss.dtsi"
58/include/ "msm8226-coresight.dtsi"
59/include/ "msm8226-iommu-domains.dtsi"
60
61&soc {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65
66 intc: interrupt-controller@f9000000 {
67 compatible = "qcom,msm-qgic2";
68 interrupt-controller;
69 #interrupt-cells = <3>;
70 reg = <0xF9000000 0x1000>,
71 <0xF9002000 0x1000>;
72 };
73
74 msmgpio: gpio@fd510000 {
75 compatible = "qcom,msm-gpio";
76 interrupt-controller;
77 #interrupt-cells = <2>;
78 reg = <0xfd510000 0x4000>;
79 gpio-controller;
80 #gpio-cells = <2>;
81 ngpio = <117>;
82 interrupts = <0 208 0>;
83 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]84 };
85
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]86 qcom,mpm2-sleep-counter@fc4a3000 {
87 compatible = "qcom,mpm2-sleep-counter";
88 reg = <0xfc4a3000 0x1000>;
89 clock-frequency = <32768>;
90 };
91
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]92 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]93 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]94 interrupts = <1 2 0 1 3 0>;
95 clock-frequency = <19200000>;
96 };
97
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]98 timer@f9020000 {
99 #address-cells = <1>;
100 #size-cells = <1>;
101 ranges;
102 compatible = "arm,armv7-timer-mem";
103 reg = <0xf9020000 0x1000>;
104 clock-frequency = <19200000>;
105
106 frame@f9021000 {
107 frame-number = <0>;
108 interrupts = <0 8 0x4>,
109 <0 7 0x4>;
110 reg = <0xf9021000 0x1000>,
111 <0xf9022000 0x1000>;
112 };
113
114 frame@f9023000 {
115 frame-number = <1>;
116 interrupts = <0 9 0x4>;
117 reg = <0xf9023000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9024000 {
122 frame-number = <2>;
123 interrupts = <0 10 0x4>;
124 reg = <0xf9024000 0x1000>;
125 status = "disabled";
126 };
127
128 frame@f9025000 {
129 frame-number = <3>;
130 interrupts = <0 11 0x4>;
131 reg = <0xf9025000 0x1000>;
132 status = "disabled";
133 };
134
135 frame@f9026000 {
136 frame-number = <4>;
137 interrupts = <0 12 0x4>;
138 reg = <0xf9026000 0x1000>;
139 status = "disabled";
140 };
141
142 frame@f9027000 {
143 frame-number = <5>;
144 interrupts = <0 13 0x4>;
145 reg = <0xf9027000 0x1000>;
146 status = "disabled";
147 };
148
149 frame@f9028000 {
150 frame-number = <6>;
151 interrupts = <0 14 0x4>;
152 reg = <0xf9028000 0x1000>;
153 status = "disabled";
154 };
155 };
156
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]157 qcom,vidc@fdc00000 {
158 compatible = "qcom,msm-vidc";
159 reg = <0xfdc00000 0xff000>;
160 interrupts = <0 44 0>;
161 qcom,load-freq-tbl = <352800 160000000>,
162 <244800 133330000>,
163 <108000 66700000>;
164 qcom,hfi = "venus";
165 qcom,bus-ports = <1>;
166 qcom,reg-presets = <0xE0024 0x0>,
167 <0x80124 0x3>,
168 <0xE0020 0x5555556>,
169 <0x800B0 0x10101001>,
170 <0x800B4 0x00101010>,
171 <0x800C0 0x1010100f>,
172 <0x800C4 0x00101010>,
173 <0x800D0 0x00000010>,
174 <0x800D4 0x00000010>,
175 <0x800D8 0x00000707>;
176 qcom,enc-ddr-ab-ib = <0 0>,
177 <129000 142000>,
178 <384000 422000>,
179 <866000 953000>;
180 qcom,dec-ddr-ab-ib = <0 0>,
181 <103000 134000>,
182 <268000 348000>,
183 <505000 657000>;
184 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
185 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
186 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
187 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]188 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]189 };
190
191 qcom,wfd {
192 compatible = "qcom,msm-wfd";
193 };
194
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]195 serial@f991f000 {
196 compatible = "qcom,msm-lsuart-v14";
197 reg = <0xf991f000 0x1000>;
198 interrupts = <0 109 0>;
199 status = "disabled";
200 };
201
202 serial@f995e000 {
203 compatible = "qcom,msm-lsuart-v14";
204 reg = <0xf995e000 0x1000>;
205 interrupts = <0 114 0>;
206 status = "disabled";
207 };
208
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]209 qcom,msm-imem@fe805000 {
210 compatible = "qcom,msm-imem";
211 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
212 };
213
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]214 qcom,sps@f9984000 {
215 compatible = "qcom,msm_sps";
216 reg = <0xf9984000 0x15000>,
217 <0xf9999000 0xb000>;
218 interrupts = <0 94 0>;
219 };
220
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]221 qcom,usbbam@f9a44000 {
222 compatible = "qcom,usb-bam-msm";
223 reg = <0xf9a44000 0x11000>;
224 reg-names = "hsusb";
225 interrupts = <0 135 0>;
226 interrupt-names = "hsusb";
227 qcom,usb-bam-num-pipes = <16>;
228 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
229 qcom,ignore-core-reset-ack;
230 qcom,disable-clk-gating;
231
232 qcom,pipe0 {
233 label = "hsusb-qdss-in-0";
234 qcom,usb-bam-mem-type = <3>;
235 qcom,bam-type = <1>;
236 qcom,dir = <1>;
237 qcom,pipe-num = <0>;
238 qcom,peer-bam = <1>;
239 qcom,src-bam-physical-address = <0xfc37c000>;
240 qcom,src-bam-pipe-index = <0>;
241 qcom,dst-bam-physical-address = <0xf9a44000>;
242 qcom,dst-bam-pipe-index = <2>;
243 qcom,data-fifo-offset = <0x0>;
244 qcom,data-fifo-size = <0x600>;
245 qcom,descriptor-fifo-offset = <0x600>;
246 qcom,descriptor-fifo-size = <0x200>;
247 };
248 };
249
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]250 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]251 compatible = "qcom,hsusb-otg";
252 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]253 interrupts = <0 134 0>, <0 140 0>;
254 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]255 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]256 HSUSB_1p8-supply = <&pm8226_l10>;
257 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]258 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]259
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]260 qcom,hsusb-otg-phy-init-seq =
261 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]262 qcom,hsusb-otg-phy-type = <2>;
263 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]264 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]265 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]266 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]267
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]268 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]269 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]270 qcom,msm-bus,num-paths = <1>;
271 qcom,msm-bus,vectors-KBps =
272 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]273 <87 512 60000 960000>,
274 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]275 };
276
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]277 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]278 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]279 reg = <0xfe8050c8 0xc8>;
Chiranjeevi Velempati9d797662013-04-22 15:45:38 +0530[diff] [blame]280 qcom,android-usb-cdrom;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]281 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]282 };
283
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]284 wcd9xxx_intc: wcd9xxx-irq {
285 compatible = "qcom,wcd9xxx-irq";
286 interrupt-controller;
287 #interrupt-cells = <1>;
288 interrupt-parent = <&msmgpio>;
289 interrupts = <68 0>;
290 interrupt-names = "cdc-int";
291 };
292
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]293 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]294 cell-index = <1>;
295 compatible = "qcom,slim-ngd";
296 reg = <0xfe12f000 0x35000>,
297 <0xfe104000 0x20000>;
298 reg-names = "slimbus_physical", "slimbus_bam_physical";
299 interrupts = <0 163 0>, <0 164 0>;
300 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]301
302 tapan_codec {
303 compatible = "qcom,tapan-slim-pgd";
304 elemental-addr = [00 01 E0 00 17 02];
305
306 interrupt-parent = <&wcd9xxx_intc>;
307 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
308 17 18 19 20 21 22 23 24 25 26 27 28>;
309 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
310
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]311 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare482ef672013-06-20 15:28:59 -0700[diff] [blame]312 qcom,cdc-vdd-buck-voltage = <1800000 2150000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]313 qcom,cdc-vdd-buck-current = <650000>;
314
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]315 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]316 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
317 qcom,cdc-vdd-h-current = <25000>;
318
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]319 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]320 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
321 qcom,cdc-vdd-px-current = <25000>;
322
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]323 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]324 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
325 qcom,cdc-vdd-a-1p2v-current = <10000>;
326
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]327 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]328 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
329 qcom,cdc-vdd-cx-current = <10000>;
330
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]331 qcom,cdc-static-supplies = "cdc-vdd-buck",
332 "cdc-vdd-h",
333 "cdc-vdd-px",
334 "cdc-vdd-a-1p2v",
335 "cdc-vdd-cx";
336
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]337 qcom,cdc-micbias-ldoh-v = <0x3>;
338 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]339 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]340 qcom,cdc-micbias-cfilt3-mv = <1800>;
341
342 qcom,cdc-micbias1-cfilt-sel = <0x0>;
343 qcom,cdc-micbias2-cfilt-sel = <0x1>;
344 qcom,cdc-micbias3-cfilt-sel = <0x2>;
345
346 qcom,cdc-mclk-clk-rate = <9600000>;
347 qcom,cdc-slim-ifd = "tapan-slim-ifd";
348 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
349 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]350 };
351
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]352 qcom,msm-adsp-loader {
353 compatible = "qcom,adsp-loader";
354 qcom,adsp-state = <0>;
355 };
356
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]357 sound {
358 compatible = "qcom,msm8226-audio-tapan";
359 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]360 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]361 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
362 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
363 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
364 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
365 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]366 };
367
368 qcom,msm-pcm {
369 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]370 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]371 };
372
373 qcom,msm-pcm-routing {
374 compatible = "qcom,msm-pcm-routing";
375 };
376
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]377 qcom,msm-pcm-low-latency {
378 compatible = "qcom,msm-pcm-dsp";
379 qcom,msm-pcm-dsp-id = <1>;
380 qcom,msm-pcm-low-latency;
381 };
382
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]383 qcom,msm-pcm-lpa {
384 compatible = "qcom,msm-pcm-lpa";
385 };
386
387 qcom,msm-compr-dsp {
388 compatible = "qcom,msm-compr-dsp";
389 };
390
391 qcom,msm-voip-dsp {
392 compatible = "qcom,msm-voip-dsp";
393 };
394
395 qcom,msm-pcm-voice {
396 compatible = "qcom,msm-pcm-voice";
397 };
398
399 qcom,msm-stub-codec {
400 compatible = "qcom,msm-stub-codec";
401 };
402
403 qcom,msm-dai-fe {
404 compatible = "qcom,msm-dai-fe";
405 };
406
407 qcom,msm-pcm-afe {
408 compatible = "qcom,msm-pcm-afe";
409 };
410
411 qcom,msm-dai-q6-hdmi {
412 compatible = "qcom,msm-dai-q6-hdmi";
413 qcom,msm-dai-q6-dev-id = <8>;
414 };
415
416 qcom,msm-dai-q6 {
417 compatible = "qcom,msm-dai-q6";
418 qcom,msm-dai-q6-sb-0-rx {
419 compatible = "qcom,msm-dai-q6-dev";
420 qcom,msm-dai-q6-dev-id = <16384>;
421 };
422
423 qcom,msm-dai-q6-sb-0-tx {
424 compatible = "qcom,msm-dai-q6-dev";
425 qcom,msm-dai-q6-dev-id = <16385>;
426 };
427
428 qcom,msm-dai-q6-sb-1-rx {
429 compatible = "qcom,msm-dai-q6-dev";
430 qcom,msm-dai-q6-dev-id = <16386>;
431 };
432
433 qcom,msm-dai-q6-sb-1-tx {
434 compatible = "qcom,msm-dai-q6-dev";
435 qcom,msm-dai-q6-dev-id = <16387>;
436 };
437
438 qcom,msm-dai-q6-sb-3-rx {
439 compatible = "qcom,msm-dai-q6-dev";
440 qcom,msm-dai-q6-dev-id = <16390>;
441 };
442
443 qcom,msm-dai-q6-sb-3-tx {
444 compatible = "qcom,msm-dai-q6-dev";
445 qcom,msm-dai-q6-dev-id = <16391>;
446 };
447
448 qcom,msm-dai-q6-sb-4-rx {
449 compatible = "qcom,msm-dai-q6-dev";
450 qcom,msm-dai-q6-dev-id = <16392>;
451 };
452
453 qcom,msm-dai-q6-sb-4-tx {
454 compatible = "qcom,msm-dai-q6-dev";
455 qcom,msm-dai-q6-dev-id = <16393>;
456 };
457
458 qcom,msm-dai-q6-bt-sco-rx {
459 compatible = "qcom,msm-dai-q6-dev";
460 qcom,msm-dai-q6-dev-id = <12288>;
461 };
462
463 qcom,msm-dai-q6-bt-sco-tx {
464 compatible = "qcom,msm-dai-q6-dev";
465 qcom,msm-dai-q6-dev-id = <12289>;
466 };
467
468 qcom,msm-dai-q6-int-fm-rx {
469 compatible = "qcom,msm-dai-q6-dev";
470 qcom,msm-dai-q6-dev-id = <12292>;
471 };
472
473 qcom,msm-dai-q6-int-fm-tx {
474 compatible = "qcom,msm-dai-q6-dev";
475 qcom,msm-dai-q6-dev-id = <12293>;
476 };
477
478 qcom,msm-dai-q6-be-afe-pcm-rx {
479 compatible = "qcom,msm-dai-q6-dev";
480 qcom,msm-dai-q6-dev-id = <224>;
481 };
482
483 qcom,msm-dai-q6-be-afe-pcm-tx {
484 compatible = "qcom,msm-dai-q6-dev";
485 qcom,msm-dai-q6-dev-id = <225>;
486 };
487
488 qcom,msm-dai-q6-afe-proxy-rx {
489 compatible = "qcom,msm-dai-q6-dev";
490 qcom,msm-dai-q6-dev-id = <241>;
491 };
492
493 qcom,msm-dai-q6-afe-proxy-tx {
494 compatible = "qcom,msm-dai-q6-dev";
495 qcom,msm-dai-q6-dev-id = <240>;
496 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]497
498 qcom,msm-dai-q6-incall-record-rx {
499 compatible = "qcom,msm-dai-q6-dev";
500 qcom,msm-dai-q6-dev-id = <32771>;
501 };
502
503 qcom,msm-dai-q6-incall-record-tx {
504 compatible = "qcom,msm-dai-q6-dev";
505 qcom,msm-dai-q6-dev-id = <32772>;
506 };
507
508 qcom,msm-dai-q6-incall-music-rx {
509 compatible = "qcom,msm-dai-q6-dev";
510 qcom,msm-dai-q6-dev-id = <32773>;
511 };
Vicky Sehrawat5ac670f2013-05-17 16:32:13 -0700[diff] [blame]512
513 qcom,msm-dai-q6-incall-music-2-rx {
514 compatible = "qcom,msm-dai-q6-dev";
515 qcom,msm-dai-q6-dev-id = <32770>;
516 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]517 };
518
519 qcom,msm-pcm-hostless {
520 compatible = "qcom,msm-pcm-hostless";
521 };
522
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]523 qcom,msm-pri-auxpcm {
524 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]525 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
526 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
527 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
528 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
529 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
530 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
531 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]532 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]533 };
534
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]535 qcom,wcnss-wlan@fb000000 {
536 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]537 reg = <0xfb000000 0x280000>,
538 <0xf9011008 0x04>;
539 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]540 interrupts = <0 145 0 0 146 0>;
541 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
542
543 qcom,pronto-vddmx-supply = <&pm8226_l3>;
544 qcom,pronto-vddcx-supply = <&pm8226_s1>;
545 qcom,pronto-vddpx-supply = <&pm8226_l6>;
546 qcom,iris-vddxo-supply = <&pm8226_l10>;
547 qcom,iris-vddrfa-supply = <&pm8226_l24>;
548 qcom,iris-vddpa-supply = <&pm8226_l16>;
549 qcom,iris-vdddig-supply = <&pm8226_l24>;
550
551 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]552 qcom,has-pronto-hw;
553 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]554 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]555
556 qcom,msm-adsp-sensors {
557 compatible = "qcom,msm-adsp-sensors";
558 qcom,src-id = <11>;
559 qcom,dst-id = <604>;
560 qcom,ab = <32505856>;
561 qcom,ib = <32505856>;
562 };
563
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]564 qcom,wdt@f9017000 {
565 compatible = "qcom,msm-watchdog";
566 reg = <0xf9017000 0x1000>;
567 interrupts = <0 3 0>, <0 4 0>;
568 qcom,bark-time = <11000>;
569 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]570 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]571 };
572
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]573 qcom,smem@fa00000 {
574 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]575 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]576 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]577 <0xfc428000 0x4000>;
578 reg-names = "smem", "irq-reg-base", "aux-mem1";
579
580 qcom,smd-modem {
581 compatible = "qcom,smd";
582 qcom,smd-edge = <0>;
583 qcom,smd-irq-offset = <0x8>;
584 qcom,smd-irq-bitmask = <0x1000>;
585 qcom,pil-string = "modem";
586 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]587 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]588
589 qcom,smsm-modem {
590 compatible = "qcom,smsm";
591 qcom,smsm-edge = <0>;
592 qcom,smsm-irq-offset = <0x8>;
593 qcom,smsm-irq-bitmask = <0x2000>;
594 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]595 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]596
597 qcom,smd-adsp {
598 compatible = "qcom,smd";
599 qcom,smd-edge = <1>;
600 qcom,smd-irq-offset = <0x8>;
601 qcom,smd-irq-bitmask = <0x100>;
602 qcom,pil-string = "adsp";
603 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]604 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]605
606 qcom,smsm-adsp {
607 compatible = "qcom,smsm";
608 qcom,smsm-edge = <1>;
609 qcom,smsm-irq-offset = <0x8>;
610 qcom,smsm-irq-bitmask = <0x200>;
611 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]612 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]613
614 qcom,smd-wcnss {
615 compatible = "qcom,smd";
616 qcom,smd-edge = <6>;
617 qcom,smd-irq-offset = <0x8>;
618 qcom,smd-irq-bitmask = <0x20000>;
619 qcom,pil-string = "wcnss";
620 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]621 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]622
623 qcom,smsm-wcnss {
624 compatible = "qcom,smsm";
625 qcom,smsm-edge = <6>;
626 qcom,smsm-irq-offset = <0x8>;
627 qcom,smsm-irq-bitmask = <0x80000>;
628 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]629 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]630
631 qcom,smd-rpm {
632 compatible = "qcom,smd";
633 qcom,smd-edge = <15>;
634 qcom,smd-irq-offset = <0x8>;
635 qcom,smd-irq-bitmask = <0x1>;
636 interrupts = <0 168 1>;
637 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]638 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]639 };
640
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]641 rpm_bus: qcom,rpm-smd {
642 compatible = "qcom,rpm-smd";
643 rpm-channel-name = "rpm_requests";
644 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]645 };
646
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]647 qcom,bcl {
648 compatible = "qcom,bcl";
649 };
650
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]651 sdcc1: qcom,sdcc@f9824000 {
652 cell-index = <1>; /* SDC1 eMMC slot */
653 compatible = "qcom,msm-sdcc";
654
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]655 reg = <0xf9824000 0x800>,
656 <0xf9824800 0x100>,
657 <0xf9804000 0x7000>;
658 reg-names = "core_mem", "dml_mem", "bam_mem";
659 interrupts = <0 123 0>, <0 137 0>;
660 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]661
662 qcom,bus-width = <8>;
663 status = "disabled";
664 };
665
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]666 sdhc_1: sdhci@f9824900 {
667 compatible = "qcom,sdhci-msm";
668 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
669 reg-names = "hc_mem", "core_mem";
670
671 interrupts = <0 123 0>, <0 138 0>;
672 interrupt-names = "hc_irq", "pwr_irq";
673
674 qcom,bus-width = <8>;
675 status = "disabled";
676 };
677
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]678 sdcc2: qcom,sdcc@f98a4000 {
679 cell-index = <2>; /* SDC2 SD card slot */
680 compatible = "qcom,msm-sdcc";
681
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]682 reg = <0xf98a4000 0x800>,
683 <0xf98a4800 0x100>,
684 <0xf9884000 0x7000>;
685 reg-names = "core_mem", "dml_mem", "bam_mem";
686 interrupts = <0 125 0>, <0 220 0>;
687 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]688
689 qcom,bus-width = <4>;
690 status = "disabled";
691 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]692
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]693 sdhc_2: sdhci@f98a4900 {
694 compatible = "qcom,sdhci-msm";
695 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
696 reg-names = "hc_mem", "core_mem";
697
698 interrupts = <0 125 0>, <0 221 0>;
699 interrupt-names = "hc_irq", "pwr_irq";
700
701 qcom,bus-width = <4>;
702 status = "disabled";
703 };
704
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]705 spmi_bus: qcom,spmi@fc4c0000 {
706 cell-index = <0>;
707 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]708 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]709 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]710 <0Xfc4cb000 0x1000>,
711 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]712 /* 190,ee0_krait_hlos_spmi_periph_irq */
713 /* 187,channel_0_krait_hlos_trans_done_irq */
714 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]715 qcom,pmic-arb-ee = <0>;
716 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]717 };
718
Madan Mohan Koyyalamudi2d7c6f52013-06-19 17:49:45 -0700[diff] [blame]719 i2c@f9925000 { /* BLSP-1 QUP-3 */
720 cell-index = <2>;
721 compatible = "qcom,i2c-qup";
722 reg = <0xf9925000 0x1000>;
723 #address-cells = <1>;
724 #size-cells = <0>;
725 reg-names = "qup_phys_addr";
726 interrupts = <0 97 0>;
727 interrupt-names = "qup_err_intr";
728 qcom,i2c-bus-freq = <400000>;
729 qcom,i2c-src-freq = <19200000>;
730 };
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]731 i2c@f9926000 { /* BLSP-1 QUP-4 */
732 cell-index = <0>;
733 compatible = "qcom,i2c-qup";
734 reg = <0xf9926000 0x1000>;
735 #address-cells = <1>;
736 #size-cells = <0>;
737 reg-names = "qup_phys_addr";
738 interrupts = <0 98 0>;
739 interrupt-names = "qup_err_intr";
740 qcom,i2c-bus-freq = <100000>;
741 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]742
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]743 i2c@f9927000 { /* BLSP1 QUP5 */
744 cell-index = <5>;
745 compatible = "qcom,i2c-qup";
746 #address-cells = <1>;
747 #size-cells = <0>;
748 reg-names = "qup_phys_addr";
749 reg = <0xf9927000 0x1000>;
750 interrupt-names = "qup_err_intr";
751 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]752 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]753 qcom,i2c-src-freq = <19200000>;
754 };
755
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]756 qcom,acpuclk@f9011050 {
757 compatible = "qcom,acpuclk-a7";
Patrick Daly4fd80f42013-06-18 11:09:15 -0700[diff] [blame]758 reg = <0xf9011050 0x8>;
759 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]760 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]761 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]762
763 qcom,ocmem@fdd00000 {
764 compatible = "qcom,msm-ocmem";
765 reg = <0xfdd00000 0x2000>,
766 <0xfdd02000 0x2000>,
767 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]768 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]769 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
770 interrupts = <0 76 0 0 77 0>;
771 interrupt-names = "ocmem_irq", "dm_irq";
772 qcom,ocmem-num-regions = <0x1>;
773 qcom,ocmem-num-macros = <0x2>;
774 qcom,resource-type = <0x706d636f>;
775 #address-cells = <1>;
776 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]777 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]778
779 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]780 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]781 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]782 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]783 };
784 };
785
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]786 qcom,venus@fdce0000 {
787 compatible = "qcom,pil-venus";
788 reg = <0xfdce0000 0x4000>,
789 <0xfdc80000 0x400>;
790 reg-names = "wrapper_base", "vbif_base";
791 vdd-supply = <&gdsc_venus>;
792
793 qcom,firmware-name = "venus";
794 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]795
796 qcom,pronto@fb21b000 {
797 compatible = "qcom,pil-pronto";
798 reg = <0xfb21b000 0x3000>,
799 <0xfc401700 0x4>,
800 <0xfd485300 0xc>;
801 reg-names = "pmu_base", "clk_base", "halt_base";
802 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]803 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]804
805 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]806
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]807 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]808 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]809 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]810 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]811
812 /* GPIO output to wcnss */
813 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]814 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]815
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]816 qcom,iris-fm {
817 compatible = "qcom,iris_fm";
818 };
819
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]820 qcom,lpass@fe200000 {
821 compatible = "qcom,pil-q6v5-lpass";
822 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]823 <0xfd485100 0x00010>,
824 <0xfc4016c0 0x00004>;
825 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]826 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]827 interrupts = <0 162 1>;
828
829 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]830
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]831 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]832 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]833 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]834 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]835
836 /* GPIO output to lpass */
837 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]838 };
839
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]840 qcom,mss@fc880000 {
841 compatible = "qcom,pil-q6v5-mss";
842 reg = <0xfc880000 0x100>,
843 <0xfd485000 0x400>,
844 <0xfc820000 0x020>,
845 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]846 <0xfd485194 0x4>;
847 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]848 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]849
850 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]851 vdd_cx-supply = <&pm8226_s1_corner>;
852 vdd_mx-supply = <&pm8226_l3>;
853 vdd_pll-supply = <&pm8226_l8>;
854 qcom,vdd_pll = <1800000>;
855
856 qcom,is-loadable;
857 qcom,firmware-name = "mba";
858 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]859
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]860 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]861 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]862 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]863 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]864 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]865
866 /* GPIO output to mss */
867 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]868 };
869
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]870 qcom,msm-mem-hole {
871 compatible = "qcom,msm-mem-hole";
Neeti Desai3d0a98b2013-04-10 10:41:03 -0700[diff] [blame]872 qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]873 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]874
875 tsens: tsens@fc4a8000 {
876 compatible = "qcom,msm-tsens";
877 reg = <0xfc4a8000 0x2000>,
878 <0xfc4b8000 0x1000>;
879 reg-names = "tsens_physical", "tsens_eeprom_physical";
880 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]881 qcom,sensors = <4>;
882 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]883 qcom,calib-mode = "fuse_map2";
884 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]885
886 qcom,msm-thermal {
887 compatible = "qcom,msm-thermal";
888 qcom,sensor-id = <0>;
889 qcom,poll-ms = <250>;
890 qcom,limit-temp = <60>;
891 qcom,temp-hysteresis = <10>;
892 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]893 qcom,freq-control-mask = <0xf>;
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]894 };
895
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]896 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
897 compatible = "qcom,spi-qup-v2";
898 #address-cells = <1>;
899 #size-cells = <0>;
900 reg-names = "spi_physical", "spi_bam_physical";
901 reg = <0xf9923000 0x1000>,
902 <0xf9904000 0xF000>;
903 interrupt-names = "spi_irq", "spi_bam_irq";
904 interrupts = <0 95 0>, <0 238 0>;
905 spi-max-frequency = <19200000>;
906
907 gpios = <&msmgpio 3 0>, /* CLK */
908 <&msmgpio 1 0>, /* MISO */
909 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]910 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]911
912 qcom,infinite-mode = <0>;
913 qcom,use-bam;
914 qcom,ver-reg-exists;
915 qcom,bam-consumer-pipe-index = <12>;
916 qcom,bam-producer-pipe-index = <13>;
917 };
918
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]919 qcom,bam_dmux@fc834000 {
920 compatible = "qcom,bam_dmux";
921 reg = <0xfc834000 0x7000>;
922 interrupts = <0 29 1>;
923 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]924
925 qcom,msm-rtb {
926 compatible = "qcom,msm-rtb";
927 qcom,memory-reservation-type = "EBI1";
928 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
929 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]930
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]931 qcom,msm-rng@f9bff000 {
932 compatible = "qcom,msm-rng";
933 reg = <0xf9bff000 0x200>;
934 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]935 qcom,msm-bus,name = "msm-rng-noc";
936 qcom,msm-bus,num-cases = <2>;
937 qcom,msm-bus,num-paths = <1>;
938 qcom,msm-bus,vectors-KBps =
939 <1 618 0 0>,
940 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]941 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]942
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]943 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]944 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]945 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]946 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]947
Pratik Patelf2945ef2013-06-13 23:52:05 -0700[diff] [blame^]948 jtag_fuse: jtagfuse@fc4be024 {
949 compatible = "qcom,jtag-fuse";
950 reg = <0xfc4be024 0x8>;
951 reg-names = "fuse-base";
952 };
953
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]954 jtag_mm0: jtagmm@fc33c000 {
955 compatible = "qcom,jtag-mm";
956 reg = <0xfc33c000 0x1000>,
957 <0xfc330000 0x1000>;
958 reg-names = "etm-base","debug-base";
959 };
960
961 jtag_mm1: jtagmm@fc33d000 {
962 compatible = "qcom,jtag-mm";
963 reg = <0xfc33d000 0x1000>,
964 <0xfc332000 0x1000>;
965 reg-names = "etm-base","debug-base";
966 };
967
968 jtag_mm2: jtagmm@fc33e000 {
969 compatible = "qcom,jtag-mm";
970 reg = <0xfc33e000 0x1000>,
971 <0xfc334000 0x1000>;
972 reg-names = "etm-base","debug-base";
973 };
974
975 jtag_mm3: jtagmm@fc33f000 {
976 compatible = "qcom,jtag-mm";
977 reg = <0xfc33f000 0x1000>,
978 <0xfc336000 0x1000>;
979 reg-names = "etm-base","debug-base";
980 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]981
982 qcom,ipc-spinlock@fd484000 {
983 compatible = "qcom,ipc-spinlock-sfpb";
984 reg = <0xfd484000 0x400>;
985 qcom,num-locks = <8>;
986 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]987
988 qcom,qseecom@d980000 {
989 compatible = "qcom,qseecom";
990 reg = <0xd980000 0x256000>;
991 reg-names = "secapp-region";
992 qcom,disk-encrypt-pipe-pair = <2>;
993 qcom,hlos-ce-hw-instance = <0>;
994 qcom,qsee-ce-hw-instance = <0>;
995 qcom,msm-bus,name = "qseecom-noc";
996 qcom,msm-bus,num-cases = <4>;
997 qcom,msm-bus,active-only = <0>;
998 qcom,msm-bus,num-paths = <1>;
999 qcom,msm-bus,vectors-KBps =
1000 <55 512 0 0>,
1001 <55 512 3936000 393600>,
1002 <55 512 3936000 393600>,
1003 <55 512 3936000 393600>;
1004 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1005
1006 qcom,qcrypto@fd404000 {
1007 compatible = "qcom,qcrypto";
1008 reg = <0xfd400000 0x20000>,
1009 <0xfd404000 0x8000>;
1010 reg-names = "crypto-base","crypto-bam-base";
1011 interrupts = <0 207 0>;
1012 qcom,bam-pipe-pair = <2>;
1013 qcom,ce-hw-instance = <0>;
1014 qcom,ce-hw-shared;
1015 qcom,msm-bus,name = "qcrypto-noc";
1016 qcom,msm-bus,num-cases = <2>;
1017 qcom,msm-bus,active-only = <0>;
1018 qcom,msm-bus,num-paths = <1>;
1019 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1020 <55 512 0 0>,
1021 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1022 };
1023
1024 qcom,qcedev@fd400000 {
1025 compatible = "qcom,qcedev";
1026 reg = <0xfd400000 0x20000>,
1027 <0xfd404000 0x8000>;
1028 reg-names = "crypto-base","crypto-bam-base";
1029 interrupts = <0 207 0>;
1030 qcom,bam-pipe-pair = <1>;
1031 qcom,ce-hw-instance = <0>;
1032 qcom,ce-hw-shared;
1033 qcom,msm-bus,name = "qcedev-noc";
1034 qcom,msm-bus,num-cases = <2>;
1035 qcom,msm-bus,active-only = <0>;
1036 qcom,msm-bus,num-paths = <1>;
1037 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1038 <55 512 0 0>,
1039 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1040 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1041
1042 cpu-pmu {
1043 compatible = "arm,cortex-a7-pmu";
1044 qcom,irq-is-percpu;
1045 interrupts = <1 7 0xf00>;
1046 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1047};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1048
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1049&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1050 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1051 status = "ok";
1052};
1053
1054&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1055 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1056 status = "ok";
1057};
1058
1059&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1060 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1061 status = "ok";
1062};
1063
1064&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1065 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1066 status = "ok";
1067};
1068
1069&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1070 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1071 status = "ok";
1072};
1073
1074&gdsc_usb_hsic {
1075 status = "ok";
1076};
1077
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1078/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1079/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1080/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1081
1082&pm8226_vadc {
1083 chan@0 {
1084 label = "usb_in";
1085 reg = <0>;
1086 qcom,decimation = <0>;
1087 qcom,pre-div-channel-scaling = <4>;
1088 qcom,calibration-type = "absolute";
1089 qcom,scale-function = <0>;
1090 qcom,hw-settle-time = <0>;
1091 qcom,fast-avg-setup = <0>;
1092 };
1093
1094 chan@2 {
1095 label = "vchg_sns";
1096 reg = <2>;
1097 qcom,decimation = <0>;
1098 qcom,pre-div-channel-scaling = <3>;
1099 qcom,calibration-type = "absolute";
1100 qcom,scale-function = <0>;
1101 qcom,hw-settle-time = <0>;
1102 qcom,fast-avg-setup = <0>;
1103 };
1104
1105 chan@5 {
1106 label = "vcoin";
1107 reg = <5>;
1108 qcom,decimation = <0>;
1109 qcom,pre-div-channel-scaling = <1>;
1110 qcom,calibration-type = "absolute";
1111 qcom,scale-function = <0>;
1112 qcom,hw-settle-time = <0>;
1113 qcom,fast-avg-setup = <0>;
1114 };
1115
1116 chan@6 {
1117 label = "vbat_sns";
1118 reg = <6>;
1119 qcom,decimation = <0>;
1120 qcom,pre-div-channel-scaling = <1>;
1121 qcom,calibration-type = "absolute";
1122 qcom,scale-function = <0>;
1123 qcom,hw-settle-time = <0>;
1124 qcom,fast-avg-setup = <0>;
1125 };
1126
1127 chan@7 {
1128 label = "vph_pwr";
1129 reg = <7>;
1130 qcom,decimation = <0>;
1131 qcom,pre-div-channel-scaling = <1>;
1132 qcom,calibration-type = "absolute";
1133 qcom,scale-function = <0>;
1134 qcom,hw-settle-time = <0>;
1135 qcom,fast-avg-setup = <0>;
1136 };
1137
1138 chan@30 {
1139 label = "batt_therm";
1140 reg = <0x30>;
1141 qcom,decimation = <0>;
1142 qcom,pre-div-channel-scaling = <0>;
1143 qcom,calibration-type = "ratiometric";
1144 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1145 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1146 qcom,fast-avg-setup = <0>;
1147 };
1148
1149 chan@31 {
1150 label = "batt_id";
1151 reg = <0x31>;
1152 qcom,decimation = <0>;
1153 qcom,pre-div-channel-scaling = <0>;
1154 qcom,calibration-type = "ratiometric";
1155 qcom,scale-function = <0>;
1156 qcom,hw-settle-time = <2>;
1157 qcom,fast-avg-setup = <0>;
1158 };
1159
1160 chan@b2 {
1161 label = "xo_therm_pu2";
1162 reg = <0xb2>;
1163 qcom,decimation = <0>;
1164 qcom,pre-div-channel-scaling = <0>;
1165 qcom,calibration-type = "ratiometric";
1166 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1167 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1168 qcom,fast-avg-setup = <0>;
1169 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1170
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1171 chan@39 {
1172 label = "usb_id_nopull";
1173 reg = <0x39>;
1174 qcom,decimation = <0>;
1175 qcom,pre-div-channel-scaling = <0>;
1176 qcom,calibration-type = "ratiometric";
1177 qcom,scale-function = <0>;
1178 qcom,hw-settle-time = <2>;
1179 qcom,fast-avg-setup = <0>;
1180 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1181};
1182
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1183&pm8226_adc_tm {
1184 /* Channel Node */
1185 chan@30 {
1186 label = "batt_therm";
1187 reg = <0x30>;
1188 qcom,decimation = <0>;
1189 qcom,pre-div-channel-scaling = <0>;
1190 qcom,calibration-type = "ratiometric";
1191 qcom,scale-function = <1>;
1192 qcom,hw-settle-time = <2>;
1193 qcom,fast-avg-setup = <3>;
1194 qcom,btm-channel-number = <0x48>;
1195 };
1196
1197 chan@8 {
1198 label = "die_temp";
1199 reg = <8>;
1200 qcom,decimation = <0>;
1201 qcom,pre-div-channel-scaling = <0>;
1202 qcom,calibration-type = "absolute";
1203 qcom,scale-function = <3>;
1204 qcom,hw-settle-time = <0>;
1205 qcom,fast-avg-setup = <3>;
1206 qcom,btm-channel-number = <0x68>;
1207 };
1208
1209 chan@6 {
1210 label = "vbat_sns";
1211 reg = <6>;
1212 qcom,decimation = <0>;
1213 qcom,pre-div-channel-scaling = <1>;
1214 qcom,calibration-type = "absolute";
1215 qcom,scale-function = <0>;
1216 qcom,hw-settle-time = <0>;
1217 qcom,fast-avg-setup = <3>;
1218 qcom,btm-channel-number = <0x70>;
1219 };
1220
1221 chan@14 {
1222 label = "pa_therm0";
1223 reg = <0x14>;
1224 qcom,decimation = <0>;
1225 qcom,pre-div-channel-scaling = <0>;
1226 qcom,calibration-type = "ratiometric";
1227 qcom,scale-function = <2>;
1228 qcom,hw-settle-time = <2>;
1229 qcom,fast-avg-setup = <0>;
1230 qcom,btm-channel-number = <0x78>;
1231 qcom,thermal-node;
1232 };
1233
1234 chan@17 {
1235 label = "pa_therm1";
1236 reg = <0x17>;
1237 qcom,decimation = <0>;
1238 qcom,pre-div-channel-scaling = <0>;
1239 qcom,calibration-type = "ratiometric";
1240 qcom,scale-function = <2>;
1241 qcom,hw-settle-time = <2>;
1242 qcom,fast-avg-setup = <0>;
1243 qcom,btm-channel-number = <0x80>;
1244 qcom,thermal-node;
1245 };
1246};
1247
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1248&pm8226_chg {
1249 status = "ok";
1250
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1251 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1252 status = "ok";
1253 };
1254
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1255 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1256 status = "ok";
1257 };
1258
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1259 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1260 status = "ok";
1261 };
1262
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1263 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1264 status = "ok";
1265 };
1266
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1267 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1268 status = "ok";
1269 };
1270
1271 qcom,chg-misc@1600 {
1272 status = "ok";
1273 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1274};