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gerrit-public.fairphone.software / kernel / msm / f2b115e69d46344ae7afcaad5823496d2a0d8650 / . / drivers / net / e1000e / e1000.h
blob: 189dfa2d6c76b80ad4702bfb281a541ed500b783 [file] [log] [blame]
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]4 Copyright(c) 1999 - 2008 Intel Corporation.
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* Linux PRO/1000 Ethernet Driver main header file */
30
31#ifndef _E1000_H_
32#define _E1000_H_
33
34#include <linux/types.h>
35#include <linux/timer.h>
36#include <linux/workqueue.h>
37#include <linux/io.h>
38#include <linux/netdevice.h>
39
40#include "hw.h"
41
42struct e1000_info;
43
Jeff Kirsher44defeb2008-08-04 17:20:41 -0700[diff] [blame]44#define e_printk(level, adapter, format, arg...) \
45 printk(level "%s: %s: " format, pci_name(adapter->pdev), \
46 adapter->netdev->name, ## arg)
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]47
48#ifdef DEBUG
Jeff Kirsher44defeb2008-08-04 17:20:41 -0700[diff] [blame]49#define e_dbg(format, arg...) \
50 e_printk(KERN_DEBUG , adapter, format, ## arg)
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]51#else
Jeff Kirsher44defeb2008-08-04 17:20:41 -0700[diff] [blame]52#define e_dbg(format, arg...) do { (void)(adapter); } while (0)
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]53#endif
54
Jeff Kirsher44defeb2008-08-04 17:20:41 -0700[diff] [blame]55#define e_err(format, arg...) \
56 e_printk(KERN_ERR, adapter, format, ## arg)
57#define e_info(format, arg...) \
58 e_printk(KERN_INFO, adapter, format, ## arg)
59#define e_warn(format, arg...) \
60 e_printk(KERN_WARNING, adapter, format, ## arg)
61#define e_notice(format, arg...) \
62 e_printk(KERN_NOTICE, adapter, format, ## arg)
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]63
64
Martin Olsson98a17082009-04-22 18:21:29 +0200[diff] [blame]65/* Interrupt modes, as used by the IntMode parameter */
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]66#define E1000E_INT_MODE_LEGACY 0
67#define E1000E_INT_MODE_MSI 1
68#define E1000E_INT_MODE_MSIX 2
69
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]70/* Tx/Rx descriptor defines */
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]71#define E1000_DEFAULT_TXD 256
72#define E1000_MAX_TXD 4096
Auke Kok7b1be192008-04-23 11:09:19 -0700[diff] [blame]73#define E1000_MIN_TXD 64
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]74
75#define E1000_DEFAULT_RXD 256
76#define E1000_MAX_RXD 4096
Auke Kok7b1be192008-04-23 11:09:19 -0700[diff] [blame]77#define E1000_MIN_RXD 64
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]78
Auke Kokde5b3072008-04-23 11:09:08 -0700[diff] [blame]79#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
80#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
81
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]82/* Early Receive defines */
83#define E1000_ERT_2048 0x100
84
85#define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
86
87/* How many Tx Descriptors do we need to call netif_wake_queue ? */
88/* How many Rx Buffers do we bundle into one write to the hardware ? */
89#define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
90
91#define AUTO_ALL_MODES 0
92#define E1000_EEPROM_APME 0x0400
93
94#define E1000_MNG_VLAN_NONE (-1)
95
96/* Number of packet split data buffers (not including the header buffer) */
97#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
98
Bruce Allan2adc55c2009-06-02 11:28:58 +0000[diff] [blame]99#define DEFAULT_JUMBO 9234
100
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]101/* BM/HV Specific Registers */
102#define BM_PORT_CTRL_PAGE 769
103
104#define PHY_UPPER_SHIFT 21
105#define BM_PHY_REG(page, reg) \
106 (((reg) & MAX_PHY_REG_ADDRESS) |\
107 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
108 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
109
110/* PHY Wakeup Registers and defines */
111#define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
112#define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
113#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
114#define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
115#define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
116#define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
117#define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
118#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
119#define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
120
121#define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
122#define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
123#define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
124#define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
125#define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
126#define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
127#define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */
128
129#define HV_SCC_UPPER PHY_REG(778, 16) /* Single Collision Count */
130#define HV_SCC_LOWER PHY_REG(778, 17)
131#define HV_ECOL_UPPER PHY_REG(778, 18) /* Excessive Collision Count */
132#define HV_ECOL_LOWER PHY_REG(778, 19)
133#define HV_MCC_UPPER PHY_REG(778, 20) /* Multiple Collision Count */
134#define HV_MCC_LOWER PHY_REG(778, 21)
135#define HV_LATECOL_UPPER PHY_REG(778, 23) /* Late Collision Count */
136#define HV_LATECOL_LOWER PHY_REG(778, 24)
137#define HV_COLC_UPPER PHY_REG(778, 25) /* Collision Count */
138#define HV_COLC_LOWER PHY_REG(778, 26)
139#define HV_DC_UPPER PHY_REG(778, 27) /* Defer Count */
140#define HV_DC_LOWER PHY_REG(778, 28)
141#define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */
142#define HV_TNCRS_LOWER PHY_REG(778, 30)
143
Bruce Allan1d5846b2009-10-29 13:46:05 +0000[diff] [blame]144/* BM PHY Copper Specific Status */
145#define BM_CS_STATUS 17
146#define BM_CS_STATUS_LINK_UP 0x0400
147#define BM_CS_STATUS_RESOLVED 0x0800
148#define BM_CS_STATUS_SPEED_MASK 0xC000
149#define BM_CS_STATUS_SPEED_1000 0x8000
150
151/* 82577 Mobile Phy Status Register */
152#define HV_M_STATUS 26
153#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
154#define HV_M_STATUS_SPEED_MASK 0x0300
155#define HV_M_STATUS_SPEED_1000 0x0200
156#define HV_M_STATUS_LINK_UP 0x0040
157
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]158enum e1000_boards {
159 board_82571,
160 board_82572,
161 board_82573,
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]162 board_82574,
Alexander Duyck8c81c9c2009-03-19 01:12:27 +0000[diff] [blame]163 board_82583,
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]164 board_80003es2lan,
165 board_ich8lan,
166 board_ich9lan,
Bruce Allanf4187b52008-08-26 18:36:50 -0700[diff] [blame]167 board_ich10lan,
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]168 board_pchlan,
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]169};
170
171struct e1000_queue_stats {
172 u64 packets;
173 u64 bytes;
174};
175
176struct e1000_ps_page {
177 struct page *page;
178 u64 dma; /* must be u64 - written to hw */
179};
180
181/*
182 * wrappers around a pointer to a socket buffer,
183 * so a DMA handle can be stored along with the buffer
184 */
185struct e1000_buffer {
186 dma_addr_t dma;
187 struct sk_buff *skb;
188 union {
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]189 /* Tx */
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]190 struct {
191 unsigned long time_stamp;
192 u16 length;
193 u16 next_to_watch;
194 };
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]195 /* Rx */
Auke Kok47f44e42007-10-25 13:57:44 -0700[diff] [blame]196 /* arrays of page information for packet split */
197 struct e1000_ps_page *ps_pages;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]198 };
Bruce Allan97ac8ca2008-04-29 09:16:05 -0700[diff] [blame]199 struct page *page;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]200};
201
202struct e1000_ring {
203 void *desc; /* pointer to ring memory */
204 dma_addr_t dma; /* phys address of ring */
205 unsigned int size; /* length of ring in bytes */
206 unsigned int count; /* number of desc. in ring */
207
208 u16 next_to_use;
209 u16 next_to_clean;
210
211 u16 head;
212 u16 tail;
213
214 /* array of buffer information structs */
215 struct e1000_buffer *buffer_info;
216
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]217 char name[IFNAMSIZ + 5];
218 u32 ims_val;
219 u32 itr_val;
220 u16 itr_register;
221 int set_itr;
222
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]223 struct sk_buff *rx_skb_top;
224
225 struct e1000_queue_stats stats;
226};
227
Bruce Allan7c257692008-04-23 11:09:00 -0700[diff] [blame]228/* PHY register snapshot values */
229struct e1000_phy_regs {
230 u16 bmcr; /* basic mode control register */
231 u16 bmsr; /* basic mode status register */
232 u16 advertise; /* auto-negotiation advertisement */
233 u16 lpa; /* link partner ability register */
234 u16 expansion; /* auto-negotiation expansion reg */
235 u16 ctrl1000; /* 1000BASE-T control register */
236 u16 stat1000; /* 1000BASE-T status register */
237 u16 estatus; /* extended status register */
238};
239
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]240/* board specific private data structure */
241struct e1000_adapter {
242 struct timer_list watchdog_timer;
243 struct timer_list phy_info_timer;
244 struct timer_list blink_timer;
245
246 struct work_struct reset_task;
247 struct work_struct watchdog_task;
248
249 const struct e1000_info *ei;
250
251 struct vlan_group *vlgrp;
252 u32 bd_number;
253 u32 rx_buffer_len;
254 u16 mng_vlan_id;
255 u16 link_speed;
256 u16 link_duplex;
Bruce Allan84527592008-11-21 17:00:22 -0800[diff] [blame]257 u16 eeprom_vers;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]258
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]259 /* track device up/down/testing state */
260 unsigned long state;
261
262 /* Interrupt Throttle Rate */
263 u32 itr;
264 u32 itr_setting;
265 u16 tx_itr;
266 u16 rx_itr;
267
268 /*
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]269 * Tx
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]270 */
271 struct e1000_ring *tx_ring /* One per active queue */
272 ____cacheline_aligned_in_smp;
273
274 struct napi_struct napi;
275
276 unsigned long tx_queue_len;
277 unsigned int restart_queue;
278 u32 txd_cmd;
279
280 bool detect_tx_hung;
281 u8 tx_timeout_factor;
282
283 u32 tx_int_delay;
284 u32 tx_abs_int_delay;
285
286 unsigned int total_tx_bytes;
287 unsigned int total_tx_packets;
288 unsigned int total_rx_bytes;
289 unsigned int total_rx_packets;
290
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]291 /* Tx stats */
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]292 u64 tpt_old;
293 u64 colc_old;
Bruce Allan7c257692008-04-23 11:09:00 -0700[diff] [blame]294 u32 gotc;
295 u64 gotc_old;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]296 u32 tx_timeout_count;
297 u32 tx_fifo_head;
298 u32 tx_head_addr;
299 u32 tx_fifo_size;
300 u32 tx_dma_failed;
301
302 /*
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]303 * Rx
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]304 */
305 bool (*clean_rx) (struct e1000_adapter *adapter,
306 int *work_done, int work_to_do)
307 ____cacheline_aligned_in_smp;
308 void (*alloc_rx_buf) (struct e1000_adapter *adapter,
309 int cleaned_count);
310 struct e1000_ring *rx_ring;
311
312 u32 rx_int_delay;
313 u32 rx_abs_int_delay;
314
Bruce Allanad680762008-03-28 09:15:03 -0700[diff] [blame]315 /* Rx stats */
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]316 u64 hw_csum_err;
317 u64 hw_csum_good;
318 u64 rx_hdr_split;
Bruce Allan7c257692008-04-23 11:09:00 -0700[diff] [blame]319 u32 gorc;
320 u64 gorc_old;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]321 u32 alloc_rx_buff_failed;
322 u32 rx_dma_failed;
323
324 unsigned int rx_ps_pages;
325 u16 rx_ps_bsize0;
Jeff Kirsher318a94d2008-03-28 09:15:16 -0700[diff] [blame]326 u32 max_frame_size;
327 u32 min_frame_size;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]328
329 /* OS defined structs */
330 struct net_device *netdev;
331 struct pci_dev *pdev;
332 struct net_device_stats net_stats;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]333
334 /* structs defined in e1000_hw.h */
335 struct e1000_hw hw;
336
337 struct e1000_hw_stats stats;
338 struct e1000_phy_info phy_info;
339 struct e1000_phy_stats phy_stats;
340
Bruce Allan7c257692008-04-23 11:09:00 -0700[diff] [blame]341 /* Snapshot of PHY registers */
342 struct e1000_phy_regs phy_regs;
343
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]344 struct e1000_ring test_tx_ring;
345 struct e1000_ring test_rx_ring;
346 u32 test_icr;
347
348 u32 msg_enable;
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]349 struct msix_entry *msix_entries;
350 int int_mode;
351 u32 eiac_mask;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]352
353 u32 eeprom_wol;
354 u32 wol;
355 u32 pba;
Bruce Allan2adc55c2009-06-02 11:28:58 +0000[diff] [blame]356 u32 max_hw_frame_size;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]357
Jeff Kirsher318a94d2008-03-28 09:15:16 -0700[diff] [blame]358 bool fc_autoneg;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]359
360 unsigned long led_status;
361
362 unsigned int flags;
Jeff Kirshereb7c3ad2008-11-14 06:45:23 +0000[diff] [blame]363 unsigned int flags2;
Jesse Brandeburga8f88ff2008-10-02 16:33:25 -0700[diff] [blame]364 struct work_struct downshift_task;
365 struct work_struct update_phy_task;
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]366 struct work_struct led_blink_task;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]367};
368
369struct e1000_info {
370 enum e1000_mac_type mac;
371 unsigned int flags;
Jeff Kirshereb7c3ad2008-11-14 06:45:23 +0000[diff] [blame]372 unsigned int flags2;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]373 u32 pba;
Bruce Allan2adc55c2009-06-02 11:28:58 +0000[diff] [blame]374 u32 max_hw_frame_size;
Jeff Kirsher69e3fd82008-04-02 13:48:18 -0700[diff] [blame]375 s32 (*get_variants)(struct e1000_adapter *);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]376 struct e1000_mac_operations *mac_ops;
377 struct e1000_phy_operations *phy_ops;
378 struct e1000_nvm_operations *nvm_ops;
379};
380
381/* hardware capability, feature, and workaround flags */
382#define FLAG_HAS_AMT (1 << 0)
383#define FLAG_HAS_FLASH (1 << 1)
384#define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
385#define FLAG_HAS_WOL (1 << 3)
386#define FLAG_HAS_ERT (1 << 4)
387#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
388#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
389#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
Bruce Allan4a770352008-10-01 17:18:35 -0700[diff] [blame]390#define FLAG_READ_ONLY_NVM (1 << 8)
Bruce Allan97ac8ca2008-04-29 09:16:05 -0700[diff] [blame]391#define FLAG_IS_ICH (1 << 9)
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]392#define FLAG_HAS_MSIX (1 << 10)
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]393#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
394#define FLAG_IS_QUAD_PORT_A (1 << 12)
395#define FLAG_IS_QUAD_PORT (1 << 13)
396#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
397#define FLAG_APME_IN_WUC (1 << 15)
398#define FLAG_APME_IN_CTRL3 (1 << 16)
399#define FLAG_APME_CHECK_PORT_B (1 << 17)
400#define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
401#define FLAG_NO_WAKE_UCAST (1 << 19)
402#define FLAG_MNG_PT_ENABLED (1 << 20)
403#define FLAG_RESET_OVERWRITES_LAA (1 << 21)
404#define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
405#define FLAG_TARC_SET_BIT_ZERO (1 << 23)
406#define FLAG_RX_NEEDS_RESTART (1 << 24)
407#define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
408#define FLAG_SMART_POWER_DOWN (1 << 26)
409#define FLAG_MSI_ENABLED (1 << 27)
410#define FLAG_RX_CSUM_ENABLED (1 << 28)
411#define FLAG_TSO_FORCE (1 << 29)
Jeff Kirsher318a94d2008-03-28 09:15:16 -0700[diff] [blame]412#define FLAG_RX_RESTART_NOW (1 << 30)
Bruce Allanf8d59f72008-08-08 18:36:11 -0700[diff] [blame]413#define FLAG_MSI_TEST_FAILED (1 << 31)
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]414
Jeff Kirshereb7c3ad2008-11-14 06:45:23 +0000[diff] [blame]415/* CRC Stripping defines */
416#define FLAG2_CRC_STRIPPING (1 << 0)
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]417#define FLAG2_HAS_PHY_WAKEUP (1 << 1)
Jeff Kirshereb7c3ad2008-11-14 06:45:23 +0000[diff] [blame]418
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]419#define E1000_RX_DESC_PS(R, i) \
420 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
421#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
422#define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
423#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
424#define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
425
426enum e1000_state_t {
427 __E1000_TESTING,
428 __E1000_RESETTING,
429 __E1000_DOWN
430};
431
432enum latency_range {
433 lowest_latency = 0,
434 low_latency = 1,
435 bulk_latency = 2,
436 latency_invalid = 255
437};
438
439extern char e1000e_driver_name[];
440extern const char e1000e_driver_version[];
441
442extern void e1000e_check_options(struct e1000_adapter *adapter);
443extern void e1000e_set_ethtool_ops(struct net_device *netdev);
444
445extern int e1000e_up(struct e1000_adapter *adapter);
446extern void e1000e_down(struct e1000_adapter *adapter);
447extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
448extern void e1000e_reset(struct e1000_adapter *adapter);
449extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
450extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
451extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
452extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
453extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
454extern void e1000e_update_stats(struct e1000_adapter *adapter);
Bruce Allana20e4cf2008-11-21 17:01:35 -0800[diff] [blame]455extern bool e1000_has_link(struct e1000_adapter *adapter);
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]456extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
457extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]458
459extern unsigned int copybreak;
460
461extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
462
463extern struct e1000_info e1000_82571_info;
464extern struct e1000_info e1000_82572_info;
465extern struct e1000_info e1000_82573_info;
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]466extern struct e1000_info e1000_82574_info;
Alexander Duyck8c81c9c2009-03-19 01:12:27 +0000[diff] [blame]467extern struct e1000_info e1000_82583_info;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]468extern struct e1000_info e1000_ich8_info;
469extern struct e1000_info e1000_ich9_info;
Bruce Allanf4187b52008-08-26 18:36:50 -0700[diff] [blame]470extern struct e1000_info e1000_ich10_info;
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]471extern struct e1000_info e1000_pch_info;
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]472extern struct e1000_info e1000_es2_info;
473
Jeff Kirsher69e3fd82008-04-02 13:48:18 -0700[diff] [blame]474extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]475
476extern s32 e1000e_commit_phy(struct e1000_hw *hw);
477
478extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
479
480extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
481extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
482
Bruce Allan4a770352008-10-01 17:18:35 -0700[diff] [blame]483extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]484extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
485 bool state);
486extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
487extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
Bruce Allan97ac8ca2008-04-29 09:16:05 -0700[diff] [blame]488extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]489
490extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
491extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
492extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]493extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]494extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
495extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
496extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
497extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
498extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
499extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
500extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
501extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
502extern s32 e1000e_id_led_init(struct e1000_hw *hw);
503extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
504extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
505extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
506extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
507extern s32 e1000e_setup_link(struct e1000_hw *hw);
508extern void e1000e_clear_vfta(struct e1000_hw *hw);
509extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
Jeff Kirshere2de3eb2008-03-28 09:15:11 -0700[diff] [blame]510extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
511 u8 *mc_addr_list,
512 u32 mc_addr_count,
513 u32 rar_used_count,
514 u32 rar_count);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]515extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
516extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
517extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
518extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
519extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
520extern void e1000e_config_collision_dist(struct e1000_hw *hw);
521extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
522extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
523extern s32 e1000e_blink_led(struct e1000_hw *hw);
524extern void e1000e_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
525extern void e1000e_reset_adaptive(struct e1000_hw *hw);
526extern void e1000e_update_adaptive(struct e1000_hw *hw);
527
528extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
529extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
530extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
531extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
532extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
533extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
534extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
535extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
Bruce Allan5ccdcec2009-10-26 11:24:02 +0000[diff] [blame]536extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
537 u16 *data);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]538extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
539extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
540extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
Bruce Allan5ccdcec2009-10-26 11:24:02 +0000[diff] [blame]541extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
542 u16 data);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]543extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
544extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
545extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
546extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
547extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
548extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
549extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
Bruce Allanf4187b52008-08-26 18:36:50 -0700[diff] [blame]550extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]551extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
Bruce Allan97ac8ca2008-04-29 09:16:05 -0700[diff] [blame]552extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
553extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
554extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]555extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
556extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]557extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
558extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
Bruce Allan5ccdcec2009-10-26 11:24:02 +0000[diff] [blame]559extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
560 u16 data);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]561extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
Bruce Allan5ccdcec2009-10-26 11:24:02 +0000[diff] [blame]562extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
563 u16 *data);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]564extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
565 u32 usec_interval, bool *success);
566extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
David Graham2d9498f2008-04-23 11:09:14 -0700[diff] [blame]567extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
568extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]569extern s32 e1000e_check_downshift(struct e1000_hw *hw);
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]570extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
Bruce Allan5ccdcec2009-10-26 11:24:02 +0000[diff] [blame]571extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
572 u16 *data);
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]573extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
Bruce Allan5ccdcec2009-10-26 11:24:02 +0000[diff] [blame]574extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
575 u16 data);
Bruce Allana4f58f52009-06-02 11:29:18 +0000[diff] [blame]576extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
577extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
578extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
579extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
580extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
581extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
582extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]583
584static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
585{
586 return hw->phy.ops.reset_phy(hw);
587}
588
589static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
590{
591 return hw->phy.ops.check_reset_block(hw);
592}
593
594static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
595{
596 return hw->phy.ops.read_phy_reg(hw, offset, data);
597}
598
599static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
600{
601 return hw->phy.ops.write_phy_reg(hw, offset, data);
602}
603
604static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
605{
606 return hw->phy.ops.get_cable_length(hw);
607}
608
609extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
610extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
611extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
612extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]613extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
614extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
615extern void e1000e_release_nvm(struct e1000_hw *hw);
616extern void e1000e_reload_nvm(struct e1000_hw *hw);
617extern s32 e1000e_read_mac_addr(struct e1000_hw *hw);
618
619static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
620{
621 return hw->nvm.ops.validate_nvm(hw);
622}
623
624static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
625{
626 return hw->nvm.ops.update_nvm(hw);
627}
628
629static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
630{
631 return hw->nvm.ops.read_nvm(hw, offset, words, data);
632}
633
634static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
635{
636 return hw->nvm.ops.write_nvm(hw, offset, words, data);
637}
638
639static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
640{
641 return hw->phy.ops.get_phy_info(hw);
642}
643
Bruce Allan4662e822008-08-26 18:37:06 -0700[diff] [blame]644static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
645{
646 return hw->mac.ops.check_mng_mode(hw);
647}
648
649extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
Auke Kokbc7f75f2007-09-17 12:30:59 -0700[diff] [blame]650extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
651extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
652
653static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
654{
655 return readl(hw->hw_addr + reg);
656}
657
658static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
659{
660 writel(val, hw->hw_addr + reg);
661}
662
663#endif /* _E1000_H_ */