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Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +01001/*
2 * linux/arch/arm/mach-sa1100/nanoengine.c
3 *
4 * Bright Star Engineering's nanoEngine board init code.
5 *
Marcelo Roberto Jimenezfa876722010-10-18 22:41:29 +01006 * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +01007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/root_dev.h>
19
20#include <asm/mach-types.h>
21#include <asm/setup.h>
Bjorn Helgaas2b974792012-01-03 17:12:48 +000022#include <asm/page.h>
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +010023
24#include <asm/mach/arch.h>
25#include <asm/mach/flash.h>
26#include <asm/mach/map.h>
27#include <asm/mach/serial_sa1100.h>
28
29#include <mach/hardware.h>
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +010030#include <mach/nanoengine.h>
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +010031
32#include "generic.h"
33
34/* Flash bank 0 */
35static struct mtd_partition nanoengine_partitions[] = {
36 {
37 .name = "nanoEngine boot firmware and parameter table",
38 .size = 0x00010000, /* 32K */
39 .offset = 0,
40 .mask_flags = MTD_WRITEABLE,
41 }, {
42 .name = "kernel/initrd reserved",
43 .size = 0x002f0000,
44 .offset = 0x00010000,
45 .mask_flags = MTD_WRITEABLE,
46 }, {
47 .name = "experimental filesystem allocation",
48 .size = 0x00100000,
49 .offset = 0x00300000,
50 .mask_flags = MTD_WRITEABLE,
51 }
52};
53
54static struct flash_platform_data nanoengine_flash_data = {
55 .map_name = "jedec_probe",
56 .parts = nanoengine_partitions,
57 .nr_parts = ARRAY_SIZE(nanoengine_partitions),
58};
59
60static struct resource nanoengine_flash_resources[] = {
Russell Kinga1810992012-01-12 10:25:29 +000061 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
62 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +010063};
64
65static struct map_desc nanoengine_io_desc[] __initdata = {
66 {
67 /* System Registers */
68 .virtual = 0xf0000000,
69 .pfn = __phys_to_pfn(0x10000000),
70 .length = 0x00100000,
71 .type = MT_DEVICE
72 }, {
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +010073 /* Internal PCI Memory Read/Write */
74 .virtual = NANO_PCI_MEM_RW_VIRT,
75 .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
76 .length = NANO_PCI_MEM_RW_SIZE,
77 .type = MT_DEVICE
78 }, {
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +010079 /* Internal PCI Config Space */
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +010080 .virtual = NANO_PCI_CONFIG_SPACE_VIRT,
81 .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
82 .length = NANO_PCI_CONFIG_SPACE_SIZE,
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +010083 .type = MT_DEVICE
84 }
85};
86
87static void __init nanoengine_map_io(void)
88{
89 sa1100_map_io();
90 iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
91
92 sa1100_register_uart(0, 1);
93 sa1100_register_uart(1, 2);
94 sa1100_register_uart(2, 3);
95 Ser1SDCR0 |= SDCR0_UART;
96 /* disable IRDA -- UART2 is used as a normal serial port */
97 Ser2UTCR4 = 0;
98 Ser2HSCR0 = 0;
99}
100
101static void __init nanoengine_init(void)
102{
103 sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
104 ARRAY_SIZE(nanoengine_flash_resources));
105}
106
107MACHINE_START(NANOENGINE, "BSE nanoEngine")
Nicolas Pitre17f44252011-07-05 22:38:17 -0400108 .atag_offset = 0x100,
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +0100109 .map_io = nanoengine_map_io,
110 .init_irq = sa1100_init_irq,
111 .timer = &sa1100_timer,
112 .init_machine = nanoengine_init,
Russell Kingd9ca5832011-11-05 10:28:50 +0000113 .restart = sa11x0_restart,
Marcelo Roberto Jimenez9f15d2c2010-12-16 20:51:30 +0100114MACHINE_END