Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/video/igafb.c -- Frame buffer device for IGA 1682 |
| 3 | * |
| 4 | * Copyright (C) 1998 Vladimir Roganov and Gleb Raiko |
| 5 | * |
| 6 | * This driver is partly based on the Frame buffer device for ATI Mach64 |
| 7 | * and partially on VESA-related code. |
| 8 | * |
| 9 | * Copyright (C) 1997-1998 Geert Uytterhoeven |
| 10 | * Copyright (C) 1998 Bernd Harries |
| 11 | * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) |
| 12 | * |
| 13 | * This file is subject to the terms and conditions of the GNU General Public |
| 14 | * License. See the file COPYING in the main directory of this archive for |
| 15 | * more details. |
| 16 | */ |
| 17 | |
| 18 | /****************************************************************************** |
| 19 | |
| 20 | TODO: |
| 21 | Despite of IGA Card has advanced graphic acceleration, |
| 22 | initial version is almost dummy and does not support it. |
| 23 | Support for video modes and acceleration must be added |
| 24 | together with accelerated X-Windows driver implementation. |
| 25 | |
| 26 | Most important thing at this moment is that we have working |
| 27 | JavaEngine1 console & X with new console interface. |
| 28 | |
| 29 | ******************************************************************************/ |
| 30 | |
| 31 | #include <linux/module.h> |
| 32 | #include <linux/kernel.h> |
| 33 | #include <linux/errno.h> |
| 34 | #include <linux/string.h> |
| 35 | #include <linux/mm.h> |
| 36 | #include <linux/tty.h> |
| 37 | #include <linux/slab.h> |
| 38 | #include <linux/vmalloc.h> |
| 39 | #include <linux/delay.h> |
| 40 | #include <linux/interrupt.h> |
| 41 | #include <linux/fb.h> |
| 42 | #include <linux/init.h> |
| 43 | #include <linux/pci.h> |
| 44 | #include <linux/nvram.h> |
| 45 | |
| 46 | #include <asm/io.h> |
| 47 | |
| 48 | #ifdef __sparc__ |
| 49 | #include <asm/pbm.h> |
| 50 | #include <asm/pcic.h> |
| 51 | #endif |
| 52 | |
| 53 | #include <video/iga.h> |
| 54 | |
| 55 | struct pci_mmap_map { |
| 56 | unsigned long voff; |
| 57 | unsigned long poff; |
| 58 | unsigned long size; |
| 59 | unsigned long prot_flag; |
| 60 | unsigned long prot_mask; |
| 61 | }; |
| 62 | |
| 63 | struct iga_par { |
| 64 | struct pci_mmap_map *mmap_map; |
| 65 | unsigned long frame_buffer_phys; |
| 66 | unsigned long io_base; |
| 67 | }; |
| 68 | |
| 69 | struct fb_info fb_info; |
| 70 | |
| 71 | struct fb_fix_screeninfo igafb_fix __initdata = { |
| 72 | .id = "IGA 1682", |
| 73 | .type = FB_TYPE_PACKED_PIXELS, |
| 74 | .mmio_len = 1000 |
| 75 | }; |
| 76 | |
| 77 | struct fb_var_screeninfo default_var = { |
| 78 | /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */ |
| 79 | .xres = 640, |
| 80 | .yres = 480, |
| 81 | .xres_virtual = 640, |
| 82 | .yres_virtual = 480, |
| 83 | .bits_per_pixel = 8, |
| 84 | .red = {0, 8, 0 }, |
| 85 | .green = {0, 8, 0 }, |
| 86 | .blue = {0, 8, 0 }, |
| 87 | .height = -1, |
| 88 | .width = -1, |
| 89 | .accel_flags = FB_ACCEL_NONE, |
| 90 | .pixclock = 39722, |
| 91 | .left_margin = 48, |
| 92 | .right_margin = 16, |
| 93 | .upper_margin = 33, |
| 94 | .lower_margin = 10, |
| 95 | .hsync_len = 96, |
| 96 | .vsync_len = 2, |
| 97 | .vmode = FB_VMODE_NONINTERLACED |
| 98 | }; |
| 99 | |
| 100 | #ifdef __sparc__ |
| 101 | struct fb_var_screeninfo default_var_1024x768 __initdata = { |
| 102 | /* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */ |
| 103 | .xres = 1024, |
| 104 | .yres = 768, |
| 105 | .xres_virtual = 1024, |
| 106 | .yres_virtual = 768, |
| 107 | .bits_per_pixel = 8, |
| 108 | .red = {0, 8, 0 }, |
| 109 | .green = {0, 8, 0 }, |
| 110 | .blue = {0, 8, 0 }, |
| 111 | .height = -1, |
| 112 | .width = -1, |
| 113 | .accel_flags = FB_ACCEL_NONE, |
| 114 | .pixclock = 12699, |
| 115 | .left_margin = 176, |
| 116 | .right_margin = 16, |
| 117 | .upper_margin = 28, |
| 118 | .lower_margin = 1, |
| 119 | .hsync_len = 96, |
| 120 | .vsync_len = 3, |
| 121 | .vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED |
| 122 | }; |
| 123 | |
| 124 | struct fb_var_screeninfo default_var_1152x900 __initdata = { |
| 125 | /* 1152x900, 76 Hz, Non-Interlaced (110.0 MHz dotclock) */ |
| 126 | .xres = 1152, |
| 127 | .yres = 900, |
| 128 | .xres_virtual = 1152, |
| 129 | .yres_virtual = 900, |
| 130 | .bits_per_pixel = 8, |
| 131 | .red = { 0, 8, 0 }, |
| 132 | .green = { 0, 8, 0 }, |
| 133 | .blue = { 0, 8, 0 }, |
| 134 | .height = -1, |
| 135 | .width = -1, |
| 136 | .accel_flags = FB_ACCEL_NONE, |
| 137 | .pixclock = 9091, |
| 138 | .left_margin = 234, |
| 139 | .right_margin = 24, |
| 140 | .upper_margin = 34, |
| 141 | .lower_margin = 3, |
| 142 | .hsync_len = 100, |
| 143 | .vsync_len = 3, |
| 144 | .vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED |
| 145 | }; |
| 146 | |
| 147 | struct fb_var_screeninfo default_var_1280x1024 __initdata = { |
| 148 | /* 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) */ |
| 149 | .xres = 1280, |
| 150 | .yres = 1024, |
| 151 | .xres_virtual = 1280, |
| 152 | .yres_virtual = 1024, |
| 153 | .bits_per_pixel = 8, |
| 154 | .red = {0, 8, 0 }, |
| 155 | .green = {0, 8, 0 }, |
| 156 | .blue = {0, 8, 0 }, |
| 157 | .height = -1, |
| 158 | .width = -1, |
| 159 | .accel_flags = 0, |
| 160 | .pixclock = 7408, |
| 161 | .left_margin = 248, |
| 162 | .right_margin = 16, |
| 163 | .upper_margin = 38, |
| 164 | .lower_margin = 1, |
| 165 | .hsync_len = 144, |
| 166 | .vsync_len = 3, |
| 167 | .vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED |
| 168 | }; |
| 169 | |
| 170 | /* |
| 171 | * Memory-mapped I/O functions for Sparc PCI |
| 172 | * |
| 173 | * On sparc we happen to access I/O with memory mapped functions too. |
| 174 | */ |
| 175 | #define pci_inb(par, reg) readb(par->io_base+(reg)) |
| 176 | #define pci_outb(par, val, reg) writeb(val, par->io_base+(reg)) |
| 177 | |
| 178 | static inline unsigned int iga_inb(struct iga_par *par, unsigned int reg, |
| 179 | unsigned int idx) |
| 180 | { |
| 181 | pci_outb(par, idx, reg); |
| 182 | return pci_inb(par, reg + 1); |
| 183 | } |
| 184 | |
| 185 | static inline void iga_outb(struct iga_par *par, unsigned char val, |
| 186 | unsigned int reg, unsigned int idx ) |
| 187 | { |
| 188 | pci_outb(par, idx, reg); |
| 189 | pci_outb(par, val, reg+1); |
| 190 | } |
| 191 | |
| 192 | #endif /* __sparc__ */ |
| 193 | |
| 194 | /* |
| 195 | * Very important functionality for the JavaEngine1 computer: |
| 196 | * make screen border black (usign special IGA registers) |
| 197 | */ |
| 198 | static void iga_blank_border(struct iga_par *par) |
| 199 | { |
| 200 | int i; |
| 201 | #if 0 |
| 202 | /* |
| 203 | * PROM does this for us, so keep this code as a reminder |
| 204 | * about required read from 0x3DA and writing of 0x20 in the end. |
| 205 | */ |
| 206 | (void) pci_inb(par, 0x3DA); /* required for every access */ |
| 207 | pci_outb(par, IGA_IDX_VGA_OVERSCAN, IGA_ATTR_CTL); |
| 208 | (void) pci_inb(par, IGA_ATTR_CTL+1); |
| 209 | pci_outb(par, 0x38, IGA_ATTR_CTL); |
| 210 | pci_outb(par, 0x20, IGA_ATTR_CTL); /* re-enable visual */ |
| 211 | #endif |
| 212 | /* |
| 213 | * This does not work as it was designed because the overscan |
| 214 | * color is looked up in the palette. Therefore, under X11 |
| 215 | * overscan changes color. |
| 216 | */ |
| 217 | for (i=0; i < 3; i++) |
| 218 | iga_outb(par, 0, IGA_EXT_CNTRL, IGA_IDX_OVERSCAN_COLOR + i); |
| 219 | } |
| 220 | |
| 221 | #ifdef __sparc__ |
Christoph Hellwig | 216d526 | 2006-01-14 13:21:25 -0800 | [diff] [blame] | 222 | static int igafb_mmap(struct fb_info *info, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | struct vm_area_struct *vma) |
| 224 | { |
| 225 | struct iga_par *par = (struct iga_par *)info->par; |
| 226 | unsigned int size, page, map_size = 0; |
| 227 | unsigned long map_offset = 0; |
| 228 | int i; |
| 229 | |
| 230 | if (!par->mmap_map) |
| 231 | return -ENXIO; |
| 232 | |
| 233 | size = vma->vm_end - vma->vm_start; |
| 234 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | /* Each page, see which map applies */ |
| 236 | for (page = 0; page < size; ) { |
| 237 | map_size = 0; |
| 238 | for (i = 0; par->mmap_map[i].size; i++) { |
| 239 | unsigned long start = par->mmap_map[i].voff; |
| 240 | unsigned long end = start + par->mmap_map[i].size; |
| 241 | unsigned long offset = (vma->vm_pgoff << PAGE_SHIFT) + page; |
| 242 | |
| 243 | if (start > offset) |
| 244 | continue; |
| 245 | if (offset >= end) |
| 246 | continue; |
| 247 | |
| 248 | map_size = par->mmap_map[i].size - (offset - start); |
| 249 | map_offset = par->mmap_map[i].poff + (offset - start); |
| 250 | break; |
| 251 | } |
| 252 | if (!map_size) { |
| 253 | page += PAGE_SIZE; |
| 254 | continue; |
| 255 | } |
| 256 | if (page + map_size > size) |
| 257 | map_size = size - page; |
| 258 | |
| 259 | pgprot_val(vma->vm_page_prot) &= ~(par->mmap_map[i].prot_mask); |
| 260 | pgprot_val(vma->vm_page_prot) |= par->mmap_map[i].prot_flag; |
| 261 | |
| 262 | if (remap_pfn_range(vma, vma->vm_start + page, |
| 263 | map_offset >> PAGE_SHIFT, map_size, vma->vm_page_prot)) |
| 264 | return -EAGAIN; |
| 265 | |
| 266 | page += map_size; |
| 267 | } |
| 268 | |
| 269 | if (!map_size) |
| 270 | return -EINVAL; |
| 271 | |
| 272 | vma->vm_flags |= VM_IO; |
| 273 | return 0; |
| 274 | } |
| 275 | #endif /* __sparc__ */ |
| 276 | |
| 277 | static int igafb_setcolreg(unsigned regno, unsigned red, unsigned green, |
| 278 | unsigned blue, unsigned transp, |
| 279 | struct fb_info *info) |
| 280 | { |
| 281 | /* |
| 282 | * Set a single color register. The values supplied are |
| 283 | * already rounded down to the hardware's capabilities |
| 284 | * (according to the entries in the `var' structure). Return |
| 285 | * != 0 for invalid regno. |
| 286 | */ |
| 287 | struct iga_par *par = (struct iga_par *)info->par; |
| 288 | |
| 289 | if (regno >= info->cmap.len) |
| 290 | return 1; |
| 291 | |
| 292 | pci_outb(par, regno, DAC_W_INDEX); |
| 293 | pci_outb(par, red, DAC_DATA); |
| 294 | pci_outb(par, green, DAC_DATA); |
| 295 | pci_outb(par, blue, DAC_DATA); |
| 296 | |
| 297 | if (regno < 16) { |
| 298 | switch (info->var.bits_per_pixel) { |
| 299 | case 16: |
| 300 | ((u16*)(info->pseudo_palette))[regno] = |
| 301 | (regno << 10) | (regno << 5) | regno; |
| 302 | break; |
| 303 | case 24: |
| 304 | ((u32*)(info->pseudo_palette))[regno] = |
| 305 | (regno << 16) | (regno << 8) | regno; |
| 306 | break; |
| 307 | case 32: |
| 308 | { int i; |
| 309 | i = (regno << 8) | regno; |
| 310 | ((u32*)(info->pseudo_palette))[regno] = (i << 16) | i; |
| 311 | } |
| 312 | break; |
| 313 | } |
| 314 | } |
| 315 | return 0; |
| 316 | } |
| 317 | |
| 318 | /* |
| 319 | * Framebuffer option structure |
| 320 | */ |
| 321 | static struct fb_ops igafb_ops = { |
| 322 | .owner = THIS_MODULE, |
| 323 | .fb_setcolreg = igafb_setcolreg, |
| 324 | .fb_fillrect = cfb_fillrect, |
| 325 | .fb_copyarea = cfb_copyarea, |
| 326 | .fb_imageblit = cfb_imageblit, |
| 327 | #ifdef __sparc__ |
| 328 | .fb_mmap = igafb_mmap, |
| 329 | #endif |
| 330 | }; |
| 331 | |
| 332 | static int __init iga_init(struct fb_info *info, struct iga_par *par) |
| 333 | { |
| 334 | char vramsz = iga_inb(par, IGA_EXT_CNTRL, IGA_IDX_EXT_BUS_CNTL) |
| 335 | & MEM_SIZE_ALIAS; |
| 336 | int video_cmap_len; |
| 337 | |
| 338 | switch (vramsz) { |
| 339 | case MEM_SIZE_1M: |
| 340 | info->fix.smem_len = 0x100000; |
| 341 | break; |
| 342 | case MEM_SIZE_2M: |
| 343 | info->fix.smem_len = 0x200000; |
| 344 | break; |
| 345 | case MEM_SIZE_4M: |
| 346 | case MEM_SIZE_RESERVED: |
| 347 | info->fix.smem_len = 0x400000; |
| 348 | break; |
| 349 | } |
| 350 | |
| 351 | if (info->var.bits_per_pixel > 8) |
| 352 | video_cmap_len = 16; |
| 353 | else |
| 354 | video_cmap_len = 256; |
| 355 | |
| 356 | info->fbops = &igafb_ops; |
| 357 | info->flags = FBINFO_DEFAULT; |
| 358 | |
| 359 | fb_alloc_cmap(&info->cmap, video_cmap_len, 0); |
| 360 | |
| 361 | if (register_framebuffer(info) < 0) |
| 362 | return 0; |
| 363 | |
| 364 | printk("fb%d: %s frame buffer device at 0x%08lx [%dMB VRAM]\n", |
| 365 | info->node, info->fix.id, |
| 366 | par->frame_buffer_phys, info->fix.smem_len >> 20); |
| 367 | |
| 368 | iga_blank_border(par); |
| 369 | return 1; |
| 370 | } |
| 371 | |
| 372 | int __init igafb_init(void) |
| 373 | { |
| 374 | extern int con_is_present(void); |
| 375 | struct fb_info *info; |
| 376 | struct pci_dev *pdev; |
| 377 | struct iga_par *par; |
| 378 | unsigned long addr; |
| 379 | int size, iga2000 = 0; |
| 380 | |
| 381 | if (fb_get_options("igafb", NULL)) |
| 382 | return -ENODEV; |
| 383 | |
| 384 | /* Do not attach when we have a serial console. */ |
| 385 | if (!con_is_present()) |
| 386 | return -ENXIO; |
| 387 | |
| 388 | pdev = pci_find_device(PCI_VENDOR_ID_INTERG, |
| 389 | PCI_DEVICE_ID_INTERG_1682, 0); |
| 390 | if (pdev == NULL) { |
| 391 | /* |
| 392 | * XXX We tried to use cyber2000fb.c for IGS 2000. |
| 393 | * But it does not initialize the chip in JavaStation-E, alas. |
| 394 | */ |
| 395 | pdev = pci_find_device(PCI_VENDOR_ID_INTERG, 0x2000, 0); |
| 396 | if(pdev == NULL) { |
| 397 | return -ENXIO; |
| 398 | } |
| 399 | iga2000 = 1; |
| 400 | } |
| 401 | |
| 402 | size = sizeof(struct fb_info) + sizeof(struct iga_par) + sizeof(u32)*16; |
| 403 | |
| 404 | info = kmalloc(size, GFP_ATOMIC); |
| 405 | if (!info) { |
| 406 | printk("igafb_init: can't alloc fb_info\n"); |
| 407 | return -ENOMEM; |
| 408 | } |
| 409 | memset(info, 0, size); |
| 410 | |
| 411 | par = (struct iga_par *) (info + 1); |
| 412 | |
| 413 | |
| 414 | if ((addr = pdev->resource[0].start) == 0) { |
| 415 | printk("igafb_init: no memory start\n"); |
| 416 | kfree(info); |
| 417 | return -ENXIO; |
| 418 | } |
| 419 | |
| 420 | if ((info->screen_base = ioremap(addr, 1024*1024*2)) == 0) { |
| 421 | printk("igafb_init: can't remap %lx[2M]\n", addr); |
| 422 | kfree(info); |
| 423 | return -ENXIO; |
| 424 | } |
| 425 | |
| 426 | par->frame_buffer_phys = addr & PCI_BASE_ADDRESS_MEM_MASK; |
| 427 | |
| 428 | #ifdef __sparc__ |
| 429 | /* |
| 430 | * The following is sparc specific and this is why: |
| 431 | * |
| 432 | * IGS2000 has its I/O memory mapped and we want |
| 433 | * to generate memory cycles on PCI, e.g. do ioremap(), |
| 434 | * then readb/writeb() as in Documentation/IO-mapping.txt. |
| 435 | * |
| 436 | * IGS1682 is more traditional, it responds to PCI I/O |
| 437 | * cycles, so we want to access it with inb()/outb(). |
| 438 | * |
| 439 | * On sparc, PCIC converts CPU memory access within |
| 440 | * phys window 0x3000xxxx into PCI I/O cycles. Therefore |
| 441 | * we may use readb/writeb to access them with IGS1682. |
| 442 | * |
| 443 | * We do not take io_base_phys from resource[n].start |
| 444 | * on IGS1682 because that chip is BROKEN. It does not |
| 445 | * have a base register for I/O. We just "know" what its |
| 446 | * I/O addresses are. |
| 447 | */ |
| 448 | if (iga2000) { |
| 449 | igafb_fix.mmio_start = par->frame_buffer_phys | 0x00800000; |
| 450 | } else { |
| 451 | igafb_fix.mmio_start = 0x30000000; /* XXX */ |
| 452 | } |
| 453 | if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) { |
| 454 | printk("igafb_init: can't remap %lx[4K]\n", igafb_fix.mmio_start); |
| 455 | iounmap((void *)info->screen_base); |
| 456 | kfree(info); |
| 457 | return -ENXIO; |
| 458 | } |
| 459 | |
| 460 | /* |
| 461 | * Figure mmap addresses from PCI config space. |
| 462 | * We need two regions: for video memory and for I/O ports. |
| 463 | * Later one can add region for video coprocessor registers. |
| 464 | * However, mmap routine loops until size != 0, so we put |
| 465 | * one additional region with size == 0. |
| 466 | */ |
| 467 | |
| 468 | par->mmap_map = kmalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC); |
| 469 | if (!par->mmap_map) { |
| 470 | printk("igafb_init: can't alloc mmap_map\n"); |
| 471 | iounmap((void *)par->io_base); |
| 472 | iounmap(info->screen_base); |
| 473 | kfree(info); |
| 474 | return -ENOMEM; |
| 475 | } |
| 476 | |
| 477 | memset(par->mmap_map, 0, 4 * sizeof(*par->mmap_map)); |
| 478 | |
| 479 | /* |
| 480 | * Set default vmode and cmode from PROM properties. |
| 481 | */ |
| 482 | { |
| 483 | struct pcidev_cookie *cookie = pdev->sysdata; |
| 484 | int node = cookie->prom_node; |
| 485 | int width = prom_getintdefault(node, "width", 1024); |
| 486 | int height = prom_getintdefault(node, "height", 768); |
| 487 | int depth = prom_getintdefault(node, "depth", 8); |
| 488 | switch (width) { |
| 489 | case 1024: |
| 490 | if (height == 768) |
| 491 | default_var = default_var_1024x768; |
| 492 | break; |
| 493 | case 1152: |
| 494 | if (height == 900) |
| 495 | default_var = default_var_1152x900; |
| 496 | break; |
| 497 | case 1280: |
| 498 | if (height == 1024) |
| 499 | default_var = default_var_1280x1024; |
| 500 | break; |
| 501 | default: |
| 502 | break; |
| 503 | } |
| 504 | |
| 505 | switch (depth) { |
| 506 | case 8: |
| 507 | default_var.bits_per_pixel = 8; |
| 508 | break; |
| 509 | case 16: |
| 510 | default_var.bits_per_pixel = 16; |
| 511 | break; |
| 512 | case 24: |
| 513 | default_var.bits_per_pixel = 24; |
| 514 | break; |
| 515 | case 32: |
| 516 | default_var.bits_per_pixel = 32; |
| 517 | break; |
| 518 | default: |
| 519 | break; |
| 520 | } |
| 521 | } |
| 522 | |
| 523 | #endif |
| 524 | igafb_fix.smem_start = (unsigned long) info->screen_base; |
| 525 | igafb_fix.line_length = default_var.xres*(default_var.bits_per_pixel/8); |
| 526 | igafb_fix.visual = default_var.bits_per_pixel <= 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR; |
| 527 | |
| 528 | info->var = default_var; |
| 529 | info->fix = igafb_fix; |
| 530 | info->pseudo_palette = (void *)(par + 1); |
| 531 | info->device = &pdev->dev; |
| 532 | |
| 533 | if (!iga_init(info, par)) { |
| 534 | iounmap((void *)par->io_base); |
| 535 | iounmap(info->screen_base); |
| 536 | kfree(par->mmap_map); |
| 537 | kfree(info); |
| 538 | } |
| 539 | |
| 540 | #ifdef __sparc__ |
| 541 | /* |
| 542 | * Add /dev/fb mmap values. |
| 543 | */ |
| 544 | |
| 545 | /* First region is for video memory */ |
| 546 | par->mmap_map[0].voff = 0x0; |
| 547 | par->mmap_map[0].poff = par->frame_buffer_phys & PAGE_MASK; |
| 548 | par->mmap_map[0].size = info->fix.smem_len & PAGE_MASK; |
| 549 | par->mmap_map[0].prot_mask = SRMMU_CACHE; |
| 550 | par->mmap_map[0].prot_flag = SRMMU_WRITE; |
| 551 | |
| 552 | /* Second region is for I/O ports */ |
| 553 | par->mmap_map[1].voff = par->frame_buffer_phys & PAGE_MASK; |
| 554 | par->mmap_map[1].poff = info->fix.smem_start & PAGE_MASK; |
| 555 | par->mmap_map[1].size = PAGE_SIZE * 2; /* X wants 2 pages */ |
| 556 | par->mmap_map[1].prot_mask = SRMMU_CACHE; |
| 557 | par->mmap_map[1].prot_flag = SRMMU_WRITE; |
| 558 | #endif /* __sparc__ */ |
| 559 | |
| 560 | return 0; |
| 561 | } |
| 562 | |
| 563 | int __init igafb_setup(char *options) |
| 564 | { |
| 565 | char *this_opt; |
| 566 | |
| 567 | if (!options || !*options) |
| 568 | return 0; |
| 569 | |
| 570 | while ((this_opt = strsep(&options, ",")) != NULL) { |
| 571 | } |
| 572 | return 0; |
| 573 | } |
| 574 | |
| 575 | module_init(igafb_init); |
| 576 | MODULE_LICENSE("GPL"); |