John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 1 | #ifndef BCM43xx_H_ |
| 2 | #define BCM43xx_H_ |
| 3 | |
| 4 | #include <linux/version.h> |
| 5 | #include <linux/kernel.h> |
| 6 | #include <linux/spinlock.h> |
| 7 | #include <linux/interrupt.h> |
| 8 | #include <linux/stringify.h> |
| 9 | #include <linux/pci.h> |
| 10 | #include <net/ieee80211.h> |
| 11 | #include <net/ieee80211softmac.h> |
| 12 | #include <asm/atomic.h> |
| 13 | #include <asm/io.h> |
| 14 | |
| 15 | |
| 16 | #include "bcm43xx_debugfs.h" |
| 17 | #include "bcm43xx_leds.h" |
| 18 | |
| 19 | |
Michael Buesch | 65f3f19 | 2006-01-31 20:11:38 +0100 | [diff] [blame] | 20 | #define PFX KBUILD_MODNAME ": " |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 21 | |
Michael Buesch | 489423c | 2006-02-13 00:11:07 +0100 | [diff] [blame] | 22 | #define BCM43xx_SWITCH_CORE_MAX_RETRIES 50 |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 23 | #define BCM43xx_IRQWAIT_MAX_RETRIES 50 |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 24 | |
| 25 | #define BCM43xx_IO_SIZE 8192 |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 26 | |
Michael Buesch | 489423c | 2006-02-13 00:11:07 +0100 | [diff] [blame] | 27 | /* Active Core PCI Configuration Register. */ |
| 28 | #define BCM43xx_PCICFG_ACTIVE_CORE 0x80 |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 29 | /* SPROM control register. */ |
| 30 | #define BCM43xx_PCICFG_SPROMCTL 0x88 |
Michael Buesch | 489423c | 2006-02-13 00:11:07 +0100 | [diff] [blame] | 31 | /* Interrupt Control PCI Configuration Register. (Only on PCI cores with rev >= 6) */ |
| 32 | #define BCM43xx_PCICFG_ICR 0x94 |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 33 | |
| 34 | /* MMIO offsets */ |
| 35 | #define BCM43xx_MMIO_DMA1_REASON 0x20 |
| 36 | #define BCM43xx_MMIO_DMA1_IRQ_MASK 0x24 |
| 37 | #define BCM43xx_MMIO_DMA2_REASON 0x28 |
| 38 | #define BCM43xx_MMIO_DMA2_IRQ_MASK 0x2C |
| 39 | #define BCM43xx_MMIO_DMA3_REASON 0x30 |
| 40 | #define BCM43xx_MMIO_DMA3_IRQ_MASK 0x34 |
| 41 | #define BCM43xx_MMIO_DMA4_REASON 0x38 |
| 42 | #define BCM43xx_MMIO_DMA4_IRQ_MASK 0x3C |
| 43 | #define BCM43xx_MMIO_STATUS_BITFIELD 0x120 |
| 44 | #define BCM43xx_MMIO_STATUS2_BITFIELD 0x124 |
| 45 | #define BCM43xx_MMIO_GEN_IRQ_REASON 0x128 |
| 46 | #define BCM43xx_MMIO_GEN_IRQ_MASK 0x12C |
| 47 | #define BCM43xx_MMIO_RAM_CONTROL 0x130 |
| 48 | #define BCM43xx_MMIO_RAM_DATA 0x134 |
| 49 | #define BCM43xx_MMIO_PS_STATUS 0x140 |
| 50 | #define BCM43xx_MMIO_RADIO_HWENABLED_HI 0x158 |
| 51 | #define BCM43xx_MMIO_SHM_CONTROL 0x160 |
| 52 | #define BCM43xx_MMIO_SHM_DATA 0x164 |
| 53 | #define BCM43xx_MMIO_SHM_DATA_UNALIGNED 0x166 |
| 54 | #define BCM43xx_MMIO_XMITSTAT_0 0x170 |
| 55 | #define BCM43xx_MMIO_XMITSTAT_1 0x174 |
| 56 | #define BCM43xx_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */ |
| 57 | #define BCM43xx_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */ |
| 58 | #define BCM43xx_MMIO_DMA1_BASE 0x200 |
| 59 | #define BCM43xx_MMIO_DMA2_BASE 0x220 |
| 60 | #define BCM43xx_MMIO_DMA3_BASE 0x240 |
| 61 | #define BCM43xx_MMIO_DMA4_BASE 0x260 |
| 62 | #define BCM43xx_MMIO_PIO1_BASE 0x300 |
| 63 | #define BCM43xx_MMIO_PIO2_BASE 0x310 |
| 64 | #define BCM43xx_MMIO_PIO3_BASE 0x320 |
| 65 | #define BCM43xx_MMIO_PIO4_BASE 0x330 |
| 66 | #define BCM43xx_MMIO_PHY_VER 0x3E0 |
| 67 | #define BCM43xx_MMIO_PHY_RADIO 0x3E2 |
| 68 | #define BCM43xx_MMIO_ANTENNA 0x3E8 |
| 69 | #define BCM43xx_MMIO_CHANNEL 0x3F0 |
| 70 | #define BCM43xx_MMIO_CHANNEL_EXT 0x3F4 |
| 71 | #define BCM43xx_MMIO_RADIO_CONTROL 0x3F6 |
| 72 | #define BCM43xx_MMIO_RADIO_DATA_HIGH 0x3F8 |
| 73 | #define BCM43xx_MMIO_RADIO_DATA_LOW 0x3FA |
| 74 | #define BCM43xx_MMIO_PHY_CONTROL 0x3FC |
| 75 | #define BCM43xx_MMIO_PHY_DATA 0x3FE |
| 76 | #define BCM43xx_MMIO_MACFILTER_CONTROL 0x420 |
| 77 | #define BCM43xx_MMIO_MACFILTER_DATA 0x422 |
| 78 | #define BCM43xx_MMIO_RADIO_HWENABLED_LO 0x49A |
| 79 | #define BCM43xx_MMIO_GPIO_CONTROL 0x49C |
| 80 | #define BCM43xx_MMIO_GPIO_MASK 0x49E |
| 81 | #define BCM43xx_MMIO_TSF_0 0x632 /* core rev < 3 only */ |
| 82 | #define BCM43xx_MMIO_TSF_1 0x634 /* core rev < 3 only */ |
| 83 | #define BCM43xx_MMIO_TSF_2 0x636 /* core rev < 3 only */ |
| 84 | #define BCM43xx_MMIO_TSF_3 0x638 /* core rev < 3 only */ |
| 85 | #define BCM43xx_MMIO_POWERUP_DELAY 0x6A8 |
| 86 | |
| 87 | /* SPROM offsets. */ |
| 88 | #define BCM43xx_SPROM_BASE 0x1000 |
| 89 | #define BCM43xx_SPROM_BOARDFLAGS2 0x1c |
| 90 | #define BCM43xx_SPROM_IL0MACADDR 0x24 |
| 91 | #define BCM43xx_SPROM_ET0MACADDR 0x27 |
| 92 | #define BCM43xx_SPROM_ET1MACADDR 0x2a |
| 93 | #define BCM43xx_SPROM_ETHPHY 0x2d |
| 94 | #define BCM43xx_SPROM_BOARDREV 0x2e |
| 95 | #define BCM43xx_SPROM_PA0B0 0x2f |
| 96 | #define BCM43xx_SPROM_PA0B1 0x30 |
| 97 | #define BCM43xx_SPROM_PA0B2 0x31 |
| 98 | #define BCM43xx_SPROM_WL0GPIO0 0x32 |
| 99 | #define BCM43xx_SPROM_WL0GPIO2 0x33 |
| 100 | #define BCM43xx_SPROM_MAXPWR 0x34 |
| 101 | #define BCM43xx_SPROM_PA1B0 0x35 |
| 102 | #define BCM43xx_SPROM_PA1B1 0x36 |
| 103 | #define BCM43xx_SPROM_PA1B2 0x37 |
| 104 | #define BCM43xx_SPROM_IDL_TSSI_TGT 0x38 |
| 105 | #define BCM43xx_SPROM_BOARDFLAGS 0x39 |
| 106 | #define BCM43xx_SPROM_ANTENNA_GAIN 0x3a |
| 107 | #define BCM43xx_SPROM_VERSION 0x3f |
| 108 | |
| 109 | /* BCM43xx_SPROM_BOARDFLAGS values */ |
| 110 | #define BCM43xx_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ |
| 111 | #define BCM43xx_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */ |
| 112 | #define BCM43xx_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */ |
| 113 | #define BCM43xx_BFL_RSSI 0x0008 /* software calculates nrssi slope. */ |
| 114 | #define BCM43xx_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */ |
| 115 | #define BCM43xx_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */ |
| 116 | #define BCM43xx_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */ |
| 117 | #define BCM43xx_BFL_ENETADM 0x0080 /* has ADMtek switch */ |
| 118 | #define BCM43xx_BFL_ENETVLAN 0x0100 /* can do vlan */ |
| 119 | #define BCM43xx_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */ |
| 120 | #define BCM43xx_BFL_NOPCI 0x0400 /* leaves PCI floating */ |
| 121 | #define BCM43xx_BFL_FEM 0x0800 /* supports the Front End Module */ |
Michael Buesch | b3db5e5 | 2006-03-15 16:31:45 +0100 | [diff] [blame] | 122 | #define BCM43xx_BFL_EXTLNA 0x1000 /* has an external LNA */ |
| 123 | #define BCM43xx_BFL_HGPA 0x2000 /* had high gain PA */ |
| 124 | #define BCM43xx_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */ |
| 125 | #define BCM43xx_BFL_ALTIQ 0x8000 /* alternate I/Q settings */ |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 126 | |
| 127 | /* GPIO register offset, in both ChipCommon and PCI core. */ |
| 128 | #define BCM43xx_GPIO_CONTROL 0x6c |
| 129 | |
| 130 | /* SHM Routing */ |
| 131 | #define BCM43xx_SHM_SHARED 0x0001 |
| 132 | #define BCM43xx_SHM_WIRELESS 0x0002 |
| 133 | #define BCM43xx_SHM_PCM 0x0003 |
| 134 | #define BCM43xx_SHM_HWMAC 0x0004 |
| 135 | #define BCM43xx_SHM_UCODE 0x0300 |
| 136 | |
| 137 | /* MacFilter offsets. */ |
| 138 | #define BCM43xx_MACFILTER_SELF 0x0000 |
| 139 | #define BCM43xx_MACFILTER_ASSOC 0x0003 |
| 140 | |
| 141 | /* Chipcommon registers. */ |
| 142 | #define BCM43xx_CHIPCOMMON_CAPABILITIES 0x04 |
| 143 | #define BCM43xx_CHIPCOMMON_PLLONDELAY 0xB0 |
| 144 | #define BCM43xx_CHIPCOMMON_FREFSELDELAY 0xB4 |
| 145 | #define BCM43xx_CHIPCOMMON_SLOWCLKCTL 0xB8 |
| 146 | #define BCM43xx_CHIPCOMMON_SYSCLKCTL 0xC0 |
| 147 | |
| 148 | /* PCI core specific registers. */ |
| 149 | #define BCM43xx_PCICORE_BCAST_ADDR 0x50 |
| 150 | #define BCM43xx_PCICORE_BCAST_DATA 0x54 |
| 151 | #define BCM43xx_PCICORE_SBTOPCI2 0x108 |
| 152 | |
| 153 | /* SBTOPCI2 values. */ |
| 154 | #define BCM43xx_SBTOPCI2_PREFETCH 0x4 |
| 155 | #define BCM43xx_SBTOPCI2_BURST 0x8 |
| 156 | |
| 157 | /* Chipcommon capabilities. */ |
| 158 | #define BCM43xx_CAPABILITIES_PCTL 0x00040000 |
| 159 | #define BCM43xx_CAPABILITIES_PLLMASK 0x00030000 |
| 160 | #define BCM43xx_CAPABILITIES_PLLSHIFT 16 |
| 161 | #define BCM43xx_CAPABILITIES_FLASHMASK 0x00000700 |
| 162 | #define BCM43xx_CAPABILITIES_FLASHSHIFT 8 |
| 163 | #define BCM43xx_CAPABILITIES_EXTBUSPRESENT 0x00000040 |
| 164 | #define BCM43xx_CAPABILITIES_UARTGPIO 0x00000020 |
| 165 | #define BCM43xx_CAPABILITIES_UARTCLOCKMASK 0x00000018 |
| 166 | #define BCM43xx_CAPABILITIES_UARTCLOCKSHIFT 3 |
| 167 | #define BCM43xx_CAPABILITIES_MIPSBIGENDIAN 0x00000004 |
| 168 | #define BCM43xx_CAPABILITIES_NRUARTSMASK 0x00000003 |
| 169 | |
| 170 | /* PowerControl */ |
| 171 | #define BCM43xx_PCTL_IN 0xB0 |
| 172 | #define BCM43xx_PCTL_OUT 0xB4 |
| 173 | #define BCM43xx_PCTL_OUTENABLE 0xB8 |
| 174 | #define BCM43xx_PCTL_XTAL_POWERUP 0x40 |
| 175 | #define BCM43xx_PCTL_PLL_POWERDOWN 0x80 |
| 176 | |
| 177 | /* PowerControl Clock Modes */ |
| 178 | #define BCM43xx_PCTL_CLK_FAST 0x00 |
| 179 | #define BCM43xx_PCTL_CLK_SLOW 0x01 |
| 180 | #define BCM43xx_PCTL_CLK_DYNAMIC 0x02 |
| 181 | |
| 182 | #define BCM43xx_PCTL_FORCE_SLOW 0x0800 |
| 183 | #define BCM43xx_PCTL_FORCE_PLL 0x1000 |
| 184 | #define BCM43xx_PCTL_DYN_XTAL 0x2000 |
| 185 | |
| 186 | /* COREIDs */ |
| 187 | #define BCM43xx_COREID_CHIPCOMMON 0x800 |
| 188 | #define BCM43xx_COREID_ILINE20 0x801 |
| 189 | #define BCM43xx_COREID_SDRAM 0x803 |
| 190 | #define BCM43xx_COREID_PCI 0x804 |
| 191 | #define BCM43xx_COREID_MIPS 0x805 |
| 192 | #define BCM43xx_COREID_ETHERNET 0x806 |
| 193 | #define BCM43xx_COREID_V90 0x807 |
| 194 | #define BCM43xx_COREID_USB11_HOSTDEV 0x80a |
| 195 | #define BCM43xx_COREID_IPSEC 0x80b |
| 196 | #define BCM43xx_COREID_PCMCIA 0x80d |
| 197 | #define BCM43xx_COREID_EXT_IF 0x80f |
| 198 | #define BCM43xx_COREID_80211 0x812 |
| 199 | #define BCM43xx_COREID_MIPS_3302 0x816 |
| 200 | #define BCM43xx_COREID_USB11_HOST 0x817 |
| 201 | #define BCM43xx_COREID_USB11_DEV 0x818 |
| 202 | #define BCM43xx_COREID_USB20_HOST 0x819 |
| 203 | #define BCM43xx_COREID_USB20_DEV 0x81a |
| 204 | #define BCM43xx_COREID_SDIO_HOST 0x81b |
| 205 | |
| 206 | /* Core Information Registers */ |
| 207 | #define BCM43xx_CIR_BASE 0xf00 |
| 208 | #define BCM43xx_CIR_SBTPSFLAG (BCM43xx_CIR_BASE + 0x18) |
| 209 | #define BCM43xx_CIR_SBIMSTATE (BCM43xx_CIR_BASE + 0x90) |
| 210 | #define BCM43xx_CIR_SBINTVEC (BCM43xx_CIR_BASE + 0x94) |
| 211 | #define BCM43xx_CIR_SBTMSTATELOW (BCM43xx_CIR_BASE + 0x98) |
| 212 | #define BCM43xx_CIR_SBTMSTATEHIGH (BCM43xx_CIR_BASE + 0x9c) |
| 213 | #define BCM43xx_CIR_SBIMCONFIGLOW (BCM43xx_CIR_BASE + 0xa8) |
| 214 | #define BCM43xx_CIR_SB_ID_HI (BCM43xx_CIR_BASE + 0xfc) |
| 215 | |
| 216 | /* Mask to get the Backplane Flag Number from SBTPSFLAG. */ |
| 217 | #define BCM43xx_BACKPLANE_FLAG_NR_MASK 0x3f |
| 218 | |
| 219 | /* SBIMCONFIGLOW values/masks. */ |
| 220 | #define BCM43xx_SBIMCONFIGLOW_SERVICE_TOUT_MASK 0x00000007 |
| 221 | #define BCM43xx_SBIMCONFIGLOW_SERVICE_TOUT_SHIFT 0 |
| 222 | #define BCM43xx_SBIMCONFIGLOW_REQUEST_TOUT_MASK 0x00000070 |
| 223 | #define BCM43xx_SBIMCONFIGLOW_REQUEST_TOUT_SHIFT 4 |
| 224 | #define BCM43xx_SBIMCONFIGLOW_CONNID_MASK 0x00ff0000 |
| 225 | #define BCM43xx_SBIMCONFIGLOW_CONNID_SHIFT 16 |
| 226 | |
| 227 | /* sbtmstatelow state flags */ |
| 228 | #define BCM43xx_SBTMSTATELOW_RESET 0x01 |
| 229 | #define BCM43xx_SBTMSTATELOW_REJECT 0x02 |
| 230 | #define BCM43xx_SBTMSTATELOW_CLOCK 0x10000 |
| 231 | #define BCM43xx_SBTMSTATELOW_FORCE_GATE_CLOCK 0x20000 |
| 232 | |
| 233 | /* sbtmstatehigh state flags */ |
| 234 | #define BCM43xx_SBTMSTATEHIGH_SERROR 0x1 |
| 235 | #define BCM43xx_SBTMSTATEHIGH_BUSY 0x4 |
| 236 | |
| 237 | /* sbimstate flags */ |
| 238 | #define BCM43xx_SBIMSTATE_IB_ERROR 0x20000 |
| 239 | #define BCM43xx_SBIMSTATE_TIMEOUT 0x40000 |
| 240 | |
| 241 | /* PHYVersioning */ |
| 242 | #define BCM43xx_PHYTYPE_A 0x00 |
| 243 | #define BCM43xx_PHYTYPE_B 0x01 |
| 244 | #define BCM43xx_PHYTYPE_G 0x02 |
| 245 | |
| 246 | /* PHYRegisters */ |
| 247 | #define BCM43xx_PHY_ILT_A_CTRL 0x0072 |
| 248 | #define BCM43xx_PHY_ILT_A_DATA1 0x0073 |
| 249 | #define BCM43xx_PHY_ILT_A_DATA2 0x0074 |
| 250 | #define BCM43xx_PHY_G_LO_CONTROL 0x0810 |
| 251 | #define BCM43xx_PHY_ILT_G_CTRL 0x0472 |
| 252 | #define BCM43xx_PHY_ILT_G_DATA1 0x0473 |
| 253 | #define BCM43xx_PHY_ILT_G_DATA2 0x0474 |
| 254 | #define BCM43xx_PHY_A_PCTL 0x007B |
| 255 | #define BCM43xx_PHY_G_PCTL 0x0029 |
| 256 | #define BCM43xx_PHY_A_CRS 0x0029 |
| 257 | #define BCM43xx_PHY_RADIO_BITFIELD 0x0401 |
| 258 | #define BCM43xx_PHY_G_CRS 0x0429 |
| 259 | #define BCM43xx_PHY_NRSSILT_CTRL 0x0803 |
| 260 | #define BCM43xx_PHY_NRSSILT_DATA 0x0804 |
| 261 | |
| 262 | /* RadioRegisters */ |
| 263 | #define BCM43xx_RADIOCTL_ID 0x01 |
| 264 | |
| 265 | /* StatusBitField */ |
| 266 | #define BCM43xx_SBF_MAC_ENABLED 0x00000001 |
| 267 | #define BCM43xx_SBF_2 0x00000002 /*FIXME: fix name*/ |
| 268 | #define BCM43xx_SBF_CORE_READY 0x00000004 |
| 269 | #define BCM43xx_SBF_400 0x00000400 /*FIXME: fix name*/ |
| 270 | #define BCM43xx_SBF_4000 0x00004000 /*FIXME: fix name*/ |
| 271 | #define BCM43xx_SBF_8000 0x00008000 /*FIXME: fix name*/ |
| 272 | #define BCM43xx_SBF_XFER_REG_BYTESWAP 0x00010000 |
| 273 | #define BCM43xx_SBF_MODE_NOTADHOC 0x00020000 |
| 274 | #define BCM43xx_SBF_MODE_AP 0x00040000 |
| 275 | #define BCM43xx_SBF_RADIOREG_LOCK 0x00080000 |
| 276 | #define BCM43xx_SBF_MODE_MONITOR 0x00400000 |
| 277 | #define BCM43xx_SBF_MODE_PROMISC 0x01000000 |
| 278 | #define BCM43xx_SBF_PS1 0x02000000 |
| 279 | #define BCM43xx_SBF_PS2 0x04000000 |
| 280 | #define BCM43xx_SBF_NO_SSID_BCAST 0x08000000 |
| 281 | #define BCM43xx_SBF_TIME_UPDATE 0x10000000 |
| 282 | #define BCM43xx_SBF_80000000 0x80000000 /*FIXME: fix name*/ |
| 283 | |
| 284 | /* MicrocodeFlagsBitfield (addr + lo-word values?)*/ |
| 285 | #define BCM43xx_UCODEFLAGS_OFFSET 0x005E |
| 286 | |
| 287 | #define BCM43xx_UCODEFLAG_AUTODIV 0x0001 |
| 288 | #define BCM43xx_UCODEFLAG_UNKBGPHY 0x0002 |
| 289 | #define BCM43xx_UCODEFLAG_UNKBPHY 0x0004 |
| 290 | #define BCM43xx_UCODEFLAG_UNKGPHY 0x0020 |
| 291 | #define BCM43xx_UCODEFLAG_UNKPACTRL 0x0040 |
| 292 | #define BCM43xx_UCODEFLAG_JAPAN 0x0080 |
| 293 | |
| 294 | /* Generic-Interrupt reasons. */ |
| 295 | #define BCM43xx_IRQ_READY (1 << 0) |
| 296 | #define BCM43xx_IRQ_BEACON (1 << 1) |
| 297 | #define BCM43xx_IRQ_PS (1 << 2) |
| 298 | #define BCM43xx_IRQ_REG124 (1 << 5) |
| 299 | #define BCM43xx_IRQ_PMQ (1 << 6) |
| 300 | #define BCM43xx_IRQ_PIO_WORKAROUND (1 << 8) |
| 301 | #define BCM43xx_IRQ_XMIT_ERROR (1 << 11) |
| 302 | #define BCM43xx_IRQ_RX (1 << 15) |
| 303 | #define BCM43xx_IRQ_SCAN (1 << 16) |
| 304 | #define BCM43xx_IRQ_NOISE (1 << 18) |
| 305 | #define BCM43xx_IRQ_XMIT_STATUS (1 << 29) |
| 306 | |
| 307 | #define BCM43xx_IRQ_ALL 0xffffffff |
| 308 | #define BCM43xx_IRQ_INITIAL (BCM43xx_IRQ_PS | \ |
| 309 | BCM43xx_IRQ_REG124 | \ |
| 310 | BCM43xx_IRQ_PMQ | \ |
| 311 | BCM43xx_IRQ_XMIT_ERROR | \ |
| 312 | BCM43xx_IRQ_RX | \ |
| 313 | BCM43xx_IRQ_SCAN | \ |
| 314 | BCM43xx_IRQ_NOISE | \ |
| 315 | BCM43xx_IRQ_XMIT_STATUS) |
| 316 | |
| 317 | |
| 318 | /* Initial default iw_mode */ |
| 319 | #define BCM43xx_INITIAL_IWMODE IW_MODE_INFRA |
| 320 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 321 | /* Bus type PCI. */ |
| 322 | #define BCM43xx_BUSTYPE_PCI 0 |
| 323 | /* Bus type Silicone Backplane Bus. */ |
| 324 | #define BCM43xx_BUSTYPE_SB 1 |
| 325 | /* Bus type PCMCIA. */ |
| 326 | #define BCM43xx_BUSTYPE_PCMCIA 2 |
| 327 | |
| 328 | /* Threshold values. */ |
| 329 | #define BCM43xx_MIN_RTS_THRESHOLD 1U |
| 330 | #define BCM43xx_MAX_RTS_THRESHOLD 2304U |
| 331 | #define BCM43xx_DEFAULT_RTS_THRESHOLD BCM43xx_MAX_RTS_THRESHOLD |
| 332 | |
| 333 | #define BCM43xx_DEFAULT_SHORT_RETRY_LIMIT 7 |
| 334 | #define BCM43xx_DEFAULT_LONG_RETRY_LIMIT 4 |
| 335 | |
| 336 | /* Max size of a security key */ |
| 337 | #define BCM43xx_SEC_KEYSIZE 16 |
| 338 | /* Security algorithms. */ |
| 339 | enum { |
| 340 | BCM43xx_SEC_ALGO_NONE = 0, /* unencrypted, as of TX header. */ |
| 341 | BCM43xx_SEC_ALGO_WEP, |
| 342 | BCM43xx_SEC_ALGO_UNKNOWN, |
| 343 | BCM43xx_SEC_ALGO_AES, |
| 344 | BCM43xx_SEC_ALGO_WEP104, |
| 345 | BCM43xx_SEC_ALGO_TKIP, |
| 346 | }; |
| 347 | |
| 348 | #ifdef assert |
| 349 | # undef assert |
| 350 | #endif |
| 351 | #ifdef CONFIG_BCM43XX_DEBUG |
| 352 | #define assert(expr) \ |
| 353 | do { \ |
| 354 | if (unlikely(!(expr))) { \ |
| 355 | printk(KERN_ERR PFX "ASSERTION FAILED (%s) at: %s:%d:%s()\n", \ |
| 356 | #expr, __FILE__, __LINE__, __FUNCTION__); \ |
| 357 | } \ |
| 358 | } while (0) |
| 359 | #else |
| 360 | #define assert(expr) do { /* nothing */ } while (0) |
| 361 | #endif |
| 362 | |
| 363 | /* rate limited printk(). */ |
| 364 | #ifdef printkl |
| 365 | # undef printkl |
| 366 | #endif |
| 367 | #define printkl(f, x...) do { if (printk_ratelimit()) printk(f ,##x); } while (0) |
| 368 | /* rate limited printk() for debugging */ |
| 369 | #ifdef dprintkl |
| 370 | # undef dprintkl |
| 371 | #endif |
| 372 | #ifdef CONFIG_BCM43XX_DEBUG |
| 373 | # define dprintkl printkl |
| 374 | #else |
| 375 | # define dprintkl(f, x...) do { /* nothing */ } while (0) |
| 376 | #endif |
| 377 | |
| 378 | /* Helper macro for if branches. |
| 379 | * An if branch marked with this macro is only taken in DEBUG mode. |
| 380 | * Example: |
| 381 | * if (DEBUG_ONLY(foo == bar)) { |
| 382 | * do something |
| 383 | * } |
| 384 | * In DEBUG mode, the branch will be taken if (foo == bar). |
| 385 | * In non-DEBUG mode, the branch will never be taken. |
| 386 | */ |
| 387 | #ifdef DEBUG_ONLY |
| 388 | # undef DEBUG_ONLY |
| 389 | #endif |
| 390 | #ifdef CONFIG_BCM43XX_DEBUG |
| 391 | # define DEBUG_ONLY(x) (x) |
| 392 | #else |
| 393 | # define DEBUG_ONLY(x) 0 |
| 394 | #endif |
| 395 | |
| 396 | /* debugging printk() */ |
| 397 | #ifdef dprintk |
| 398 | # undef dprintk |
| 399 | #endif |
| 400 | #ifdef CONFIG_BCM43XX_DEBUG |
| 401 | # define dprintk(f, x...) do { printk(f ,##x); } while (0) |
| 402 | #else |
| 403 | # define dprintk(f, x...) do { /* nothing */ } while (0) |
| 404 | #endif |
| 405 | |
| 406 | |
| 407 | struct net_device; |
| 408 | struct pci_dev; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 409 | struct bcm43xx_dmaring; |
| 410 | struct bcm43xx_pioqueue; |
| 411 | |
| 412 | struct bcm43xx_initval { |
| 413 | u16 offset; |
| 414 | u16 size; |
| 415 | u32 value; |
| 416 | } __attribute__((__packed__)); |
| 417 | |
| 418 | /* Values for bcm430x_sprominfo.locale */ |
| 419 | enum { |
| 420 | BCM43xx_LOCALE_WORLD = 0, |
| 421 | BCM43xx_LOCALE_THAILAND, |
| 422 | BCM43xx_LOCALE_ISRAEL, |
| 423 | BCM43xx_LOCALE_JORDAN, |
| 424 | BCM43xx_LOCALE_CHINA, |
| 425 | BCM43xx_LOCALE_JAPAN, |
| 426 | BCM43xx_LOCALE_USA_CANADA_ANZ, |
| 427 | BCM43xx_LOCALE_EUROPE, |
| 428 | BCM43xx_LOCALE_USA_LOW, |
| 429 | BCM43xx_LOCALE_JAPAN_HIGH, |
| 430 | BCM43xx_LOCALE_ALL, |
| 431 | BCM43xx_LOCALE_NONE, |
| 432 | }; |
| 433 | |
| 434 | #define BCM43xx_SPROM_SIZE 64 /* in 16-bit words. */ |
| 435 | struct bcm43xx_sprominfo { |
| 436 | u16 boardflags2; |
| 437 | u8 il0macaddr[6]; |
| 438 | u8 et0macaddr[6]; |
| 439 | u8 et1macaddr[6]; |
| 440 | u8 et0phyaddr:5; |
| 441 | u8 et1phyaddr:5; |
| 442 | u8 et0mdcport:1; |
| 443 | u8 et1mdcport:1; |
| 444 | u8 boardrev; |
| 445 | u8 locale:4; |
| 446 | u8 antennas_aphy:2; |
| 447 | u8 antennas_bgphy:2; |
| 448 | u16 pa0b0; |
| 449 | u16 pa0b1; |
| 450 | u16 pa0b2; |
| 451 | u8 wl0gpio0; |
| 452 | u8 wl0gpio1; |
| 453 | u8 wl0gpio2; |
| 454 | u8 wl0gpio3; |
| 455 | u8 maxpower_aphy; |
| 456 | u8 maxpower_bgphy; |
| 457 | u16 pa1b0; |
| 458 | u16 pa1b1; |
| 459 | u16 pa1b2; |
| 460 | u8 idle_tssi_tgt_aphy; |
| 461 | u8 idle_tssi_tgt_bgphy; |
| 462 | u16 boardflags; |
| 463 | u16 antennagain_aphy; |
| 464 | u16 antennagain_bgphy; |
| 465 | }; |
| 466 | |
| 467 | /* Value pair to measure the LocalOscillator. */ |
| 468 | struct bcm43xx_lopair { |
| 469 | s8 low; |
| 470 | s8 high; |
| 471 | u8 used:1; |
| 472 | }; |
| 473 | #define BCM43xx_LO_COUNT (14*4) |
| 474 | |
| 475 | struct bcm43xx_phyinfo { |
| 476 | /* Hardware Data */ |
| 477 | u8 version; |
| 478 | u8 type; |
| 479 | u8 rev; |
| 480 | u16 antenna_diversity; |
| 481 | u16 savedpctlreg; |
| 482 | u16 minlowsig[2]; |
| 483 | u16 minlowsigpos[2]; |
| 484 | u8 connected:1, |
| 485 | calibrated:1, |
| 486 | is_locked:1, /* used in bcm43xx_phy_{un}lock() */ |
| 487 | dyn_tssi_tbl:1; /* used in bcm43xx_phy_init_tssi2dbm_table() */ |
| 488 | /* LO Measurement Data. |
| 489 | * Use bcm43xx_get_lopair() to get a value. |
| 490 | */ |
| 491 | struct bcm43xx_lopair *_lo_pairs; |
| 492 | |
| 493 | /* TSSI to dBm table in use */ |
| 494 | const s8 *tssi2dbm; |
| 495 | /* idle TSSI value */ |
| 496 | s8 idle_tssi; |
Michael Buesch | adc40e9 | 2006-03-25 20:36:57 +0100 | [diff] [blame] | 497 | |
| 498 | /* Values from bcm43xx_calc_loopback_gain() */ |
| 499 | u16 loopback_gain[2]; |
| 500 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 501 | /* PHY lock for core.rev < 3 |
| 502 | * This lock is only used by bcm43xx_phy_{un}lock() |
| 503 | */ |
| 504 | spinlock_t lock; |
| 505 | }; |
| 506 | |
| 507 | |
| 508 | struct bcm43xx_radioinfo { |
| 509 | u16 manufact; |
| 510 | u16 version; |
| 511 | u8 revision; |
| 512 | |
Michael Buesch | 393344f | 2006-02-05 15:28:20 +0100 | [diff] [blame] | 513 | /* Desired TX power in dBm Q5.2 */ |
| 514 | u16 txpower_desired; |
Michael Buesch | 6ecb269 | 2006-03-20 00:01:04 +0100 | [diff] [blame] | 515 | /* TX Power control values. */ |
| 516 | union { |
| 517 | /* B/G PHY */ |
| 518 | struct { |
| 519 | u16 baseband_atten; |
| 520 | u16 radio_atten; |
| 521 | u16 txctl1; |
| 522 | u16 txctl2; |
| 523 | }; |
| 524 | /* A PHY */ |
| 525 | struct { |
| 526 | u16 txpwr_offset; |
| 527 | }; |
| 528 | }; |
| 529 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 530 | /* Current Interference Mitigation mode */ |
| 531 | int interfmode; |
Michael Buesch | e382c23 | 2006-03-21 18:16:28 +0100 | [diff] [blame] | 532 | /* Stack of saved values from the Interference Mitigation code. |
| 533 | * Each value in the stack is layed out as follows: |
| 534 | * bit 0-11: offset |
| 535 | * bit 12-15: register ID |
| 536 | * bit 16-32: value |
| 537 | * register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT |
| 538 | */ |
| 539 | #define BCM43xx_INTERFSTACK_SIZE 26 |
| 540 | u32 interfstack[BCM43xx_INTERFSTACK_SIZE]; |
| 541 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 542 | /* Saved values from the NRSSI Slope calculation */ |
| 543 | s16 nrssi[2]; |
| 544 | s32 nrssislope; |
| 545 | /* In memory nrssi lookup table. */ |
| 546 | s8 nrssi_lt[64]; |
| 547 | |
| 548 | /* current channel */ |
| 549 | u8 channel; |
| 550 | u8 initial_channel; |
| 551 | |
| 552 | u16 lofcal; |
| 553 | |
| 554 | u16 initval; |
| 555 | |
| 556 | u8 enabled:1; |
| 557 | /* ACI (adjacent channel interference) flags. */ |
| 558 | u8 aci_enable:1, |
| 559 | aci_wlan_automatic:1, |
| 560 | aci_hw_rssi:1; |
| 561 | }; |
| 562 | |
| 563 | /* Data structures for DMA transmission, per 80211 core. */ |
| 564 | struct bcm43xx_dma { |
| 565 | struct bcm43xx_dmaring *tx_ring0; |
| 566 | struct bcm43xx_dmaring *tx_ring1; |
| 567 | struct bcm43xx_dmaring *tx_ring2; |
| 568 | struct bcm43xx_dmaring *tx_ring3; |
| 569 | struct bcm43xx_dmaring *rx_ring0; |
| 570 | struct bcm43xx_dmaring *rx_ring1; /* only available on core.rev < 5 */ |
| 571 | }; |
| 572 | |
| 573 | /* Data structures for PIO transmission, per 80211 core. */ |
| 574 | struct bcm43xx_pio { |
| 575 | struct bcm43xx_pioqueue *queue0; |
| 576 | struct bcm43xx_pioqueue *queue1; |
| 577 | struct bcm43xx_pioqueue *queue2; |
| 578 | struct bcm43xx_pioqueue *queue3; |
| 579 | }; |
| 580 | |
| 581 | #define BCM43xx_MAX_80211_CORES 2 |
| 582 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 583 | #ifdef CONFIG_BCM947XX |
| 584 | #define core_offset(bcm) (bcm)->current_core_offset |
| 585 | #else |
| 586 | #define core_offset(bcm) 0 |
| 587 | #endif |
| 588 | |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 589 | /* Generic information about a core. */ |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 590 | struct bcm43xx_coreinfo { |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 591 | u8 available:1, |
| 592 | enabled:1, |
| 593 | initialized:1; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 594 | /** core_id ID number */ |
| 595 | u16 id; |
| 596 | /** core_rev revision number */ |
| 597 | u8 rev; |
| 598 | /** Index number for _switch_core() */ |
| 599 | u8 index; |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 600 | }; |
| 601 | |
| 602 | /* Additional information for each 80211 core. */ |
| 603 | struct bcm43xx_coreinfo_80211 { |
| 604 | /* PHY device. */ |
| 605 | struct bcm43xx_phyinfo phy; |
| 606 | /* Radio device. */ |
| 607 | struct bcm43xx_radioinfo radio; |
| 608 | union { |
| 609 | /* DMA context. */ |
| 610 | struct bcm43xx_dma dma; |
| 611 | /* PIO context. */ |
| 612 | struct bcm43xx_pio pio; |
| 613 | }; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 614 | }; |
| 615 | |
| 616 | /* Context information for a noise calculation (Link Quality). */ |
| 617 | struct bcm43xx_noise_calculation { |
| 618 | struct bcm43xx_coreinfo *core_at_start; |
| 619 | u8 channel_at_start; |
| 620 | u8 calculation_running:1; |
| 621 | u8 nr_samples; |
| 622 | s8 samples[8][4]; |
| 623 | }; |
| 624 | |
| 625 | struct bcm43xx_stats { |
| 626 | u8 link_quality; |
Michael Buesch | 72fb851 | 2006-03-22 18:10:19 +0100 | [diff] [blame] | 627 | u8 noise; |
| 628 | struct iw_statistics wstats; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 629 | /* Store the last TX/RX times here for updating the leds. */ |
| 630 | unsigned long last_tx; |
| 631 | unsigned long last_rx; |
| 632 | }; |
| 633 | |
| 634 | struct bcm43xx_key { |
| 635 | u8 enabled:1; |
| 636 | u8 algorithm; |
| 637 | }; |
| 638 | |
Michael Buesch | 78ff56a | 2006-06-05 20:24:10 +0200 | [diff] [blame] | 639 | /* Driver initialization status. */ |
| 640 | enum { |
| 641 | BCM43xx_STAT_UNINIT, /* Uninitialized. */ |
| 642 | BCM43xx_STAT_INITIALIZING, /* init_board() in progress. */ |
| 643 | BCM43xx_STAT_INITIALIZED, /* Fully operational. */ |
| 644 | BCM43xx_STAT_SHUTTINGDOWN, /* free_board() in progress. */ |
| 645 | BCM43xx_STAT_RESTARTING, /* controller_restart() called. */ |
| 646 | }; |
| 647 | #define bcm43xx_status(bcm) atomic_read(&(bcm)->init_status) |
| 648 | #define bcm43xx_set_status(bcm, stat) atomic_set(&(bcm)->init_status, (stat)) |
| 649 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 650 | struct bcm43xx_private { |
| 651 | struct ieee80211_device *ieee; |
| 652 | struct ieee80211softmac_device *softmac; |
| 653 | |
| 654 | struct net_device *net_dev; |
| 655 | struct pci_dev *pci_dev; |
| 656 | unsigned int irq; |
| 657 | |
| 658 | void __iomem *mmio_addr; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 659 | |
Michael Buesch | 78ff56a | 2006-06-05 20:24:10 +0200 | [diff] [blame] | 660 | /* Locking, see "theory of locking" text below. */ |
| 661 | spinlock_t irq_lock; |
| 662 | struct mutex mutex; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 663 | |
Michael Buesch | 78ff56a | 2006-06-05 20:24:10 +0200 | [diff] [blame] | 664 | /* Driver initialization status BCM43xx_STAT_*** */ |
| 665 | atomic_t init_status; |
| 666 | |
| 667 | u16 was_initialized:1, /* for PCI suspend/resume. */ |
Michael Buesch | 77db31e | 2006-02-12 16:47:44 +0100 | [diff] [blame] | 668 | __using_pio:1, /* Internal, use bcm43xx_using_pio(). */ |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 669 | bad_frames_preempt:1, /* Use "Bad Frames Preemption" (default off) */ |
| 670 | reg124_set_0x4:1, /* Some variable to keep track of IRQ stuff. */ |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 671 | short_preamble:1, /* TRUE, if short preamble is enabled. */ |
| 672 | firmware_norelease:1; /* Do not release the firmware. Used on suspend. */ |
| 673 | |
| 674 | struct bcm43xx_stats stats; |
| 675 | |
| 676 | /* Bus type we are connected to. |
| 677 | * This is currently always BCM43xx_BUSTYPE_PCI |
| 678 | */ |
| 679 | u8 bustype; |
| 680 | |
| 681 | u16 board_vendor; |
| 682 | u16 board_type; |
| 683 | u16 board_revision; |
| 684 | |
| 685 | u16 chip_id; |
| 686 | u8 chip_rev; |
Michael Buesch | adc40e9 | 2006-03-25 20:36:57 +0100 | [diff] [blame] | 687 | u8 chip_package; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 688 | |
| 689 | struct bcm43xx_sprominfo sprom; |
| 690 | #define BCM43xx_NR_LEDS 4 |
| 691 | struct bcm43xx_led leds[BCM43xx_NR_LEDS]; |
| 692 | |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 693 | /* The currently active core. */ |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 694 | struct bcm43xx_coreinfo *current_core; |
| 695 | #ifdef CONFIG_BCM947XX |
| 696 | /** current core memory offset */ |
| 697 | u32 current_core_offset; |
| 698 | #endif |
| 699 | struct bcm43xx_coreinfo *active_80211_core; |
| 700 | /* coreinfo structs for all possible cores follow. |
| 701 | * Note that a core might not exist. |
| 702 | * So check the coreinfo flags before using it. |
| 703 | */ |
| 704 | struct bcm43xx_coreinfo core_chipcommon; |
| 705 | struct bcm43xx_coreinfo core_pci; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 706 | struct bcm43xx_coreinfo core_80211[ BCM43xx_MAX_80211_CORES ]; |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 707 | /* Additional information, specific to the 80211 cores. */ |
| 708 | struct bcm43xx_coreinfo_80211 core_80211_ext[ BCM43xx_MAX_80211_CORES ]; |
| 709 | /* Index of the current 80211 core. If current_core is not |
| 710 | * an 80211 core, this is -1. |
| 711 | */ |
| 712 | int current_80211_core_idx; |
| 713 | /* Number of available 80211 cores. */ |
| 714 | int nr_80211_available; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 715 | |
| 716 | u32 chipcommon_capabilities; |
| 717 | |
| 718 | /* Reason code of the last interrupt. */ |
| 719 | u32 irq_reason; |
| 720 | u32 dma_reason[4]; |
| 721 | /* saved irq enable/disable state bitfield. */ |
| 722 | u32 irq_savedstate; |
| 723 | /* Link Quality calculation context. */ |
| 724 | struct bcm43xx_noise_calculation noisecalc; |
| 725 | |
| 726 | /* Threshold values. */ |
| 727 | //TODO: The RTS thr has to be _used_. Currently, it is only set via WX. |
| 728 | u32 rts_threshold; |
| 729 | |
| 730 | /* Interrupt Service Routine tasklet (bottom-half) */ |
| 731 | struct tasklet_struct isr_tasklet; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 732 | |
| 733 | /* Periodic tasks */ |
Michael Buesch | 78ff56a | 2006-06-05 20:24:10 +0200 | [diff] [blame] | 734 | struct work_struct periodic_work; |
Michael Buesch | ab4977f | 2006-02-12 22:40:39 +0100 | [diff] [blame] | 735 | unsigned int periodic_state; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 736 | |
| 737 | struct work_struct restart_work; |
| 738 | |
| 739 | /* Informational stuff. */ |
| 740 | char nick[IW_ESSID_MAX_SIZE + 1]; |
| 741 | |
| 742 | /* encryption/decryption */ |
| 743 | u16 security_offset; |
| 744 | struct bcm43xx_key key[54]; |
| 745 | u8 default_key_idx; |
| 746 | |
| 747 | /* Firmware. */ |
| 748 | const struct firmware *ucode; |
| 749 | const struct firmware *pcm; |
| 750 | const struct firmware *initvals0; |
| 751 | const struct firmware *initvals1; |
| 752 | |
| 753 | /* Debugging stuff follows. */ |
| 754 | #ifdef CONFIG_BCM43XX_DEBUG |
| 755 | struct bcm43xx_dfsentry *dfsentry; |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 756 | #endif |
| 757 | }; |
| 758 | |
Michael Buesch | 78ff56a | 2006-06-05 20:24:10 +0200 | [diff] [blame] | 759 | |
| 760 | /* *** THEORY OF LOCKING *** |
| 761 | * |
| 762 | * We have two different locks in the bcm43xx driver. |
| 763 | * => bcm->mutex: General sleeping mutex. Protects struct bcm43xx_private |
| 764 | * and the device registers. |
| 765 | * => bcm->irq_lock: IRQ spinlock. Protects against IRQ handler concurrency. |
| 766 | * |
| 767 | * We have three types of helper function pairs to utilize these locks. |
| 768 | * (Always use the helper functions.) |
| 769 | * 1) bcm43xx_{un}lock_noirq(): |
| 770 | * Takes bcm->mutex. Does _not_ protect against IRQ concurrency, |
| 771 | * so it is almost always unsafe, if device IRQs are enabled. |
| 772 | * So only use this, if device IRQs are masked. |
| 773 | * Locking may sleep. |
| 774 | * You can sleep within the critical section. |
| 775 | * 2) bcm43xx_{un}lock_irqonly(): |
| 776 | * Takes bcm->irq_lock. Does _not_ protect against |
| 777 | * bcm43xx_lock_noirq() critical sections. |
| 778 | * Does only protect against the IRQ handler path and other |
| 779 | * irqonly() critical sections. |
| 780 | * Locking does not sleep. |
| 781 | * You must not sleep within the critical section. |
| 782 | * 3) bcm43xx_{un}lock_irqsafe(): |
| 783 | * This is the cummulative lock and takes both, mutex and irq_lock. |
| 784 | * Protects against noirq() and irqonly() critical sections (and |
| 785 | * the IRQ handler path). |
| 786 | * Locking may sleep. |
| 787 | * You must not sleep within the critical section. |
Michael Buesch | efccb64 | 2006-03-11 13:39:14 +0100 | [diff] [blame] | 788 | */ |
Michael Buesch | 78ff56a | 2006-06-05 20:24:10 +0200 | [diff] [blame] | 789 | |
| 790 | /* Lock type 1 */ |
| 791 | #define bcm43xx_lock_noirq(bcm) mutex_lock(&(bcm)->mutex) |
| 792 | #define bcm43xx_unlock_noirq(bcm) mutex_unlock(&(bcm)->mutex) |
| 793 | /* Lock type 2 */ |
| 794 | #define bcm43xx_lock_irqonly(bcm, flags) \ |
| 795 | spin_lock_irqsave(&(bcm)->irq_lock, flags) |
| 796 | #define bcm43xx_unlock_irqonly(bcm, flags) \ |
| 797 | spin_unlock_irqrestore(&(bcm)->irq_lock, flags) |
| 798 | /* Lock type 3 */ |
| 799 | #define bcm43xx_lock_irqsafe(bcm, flags) do { \ |
| 800 | bcm43xx_lock_noirq(bcm); \ |
| 801 | bcm43xx_lock_irqonly(bcm, flags); \ |
| 802 | } while (0) |
| 803 | #define bcm43xx_unlock_irqsafe(bcm, flags) do { \ |
| 804 | bcm43xx_unlock_irqonly(bcm, flags); \ |
| 805 | bcm43xx_unlock_noirq(bcm); \ |
| 806 | } while (0) |
| 807 | |
Michael Buesch | efccb64 | 2006-03-11 13:39:14 +0100 | [diff] [blame] | 808 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 809 | static inline |
| 810 | struct bcm43xx_private * bcm43xx_priv(struct net_device *dev) |
| 811 | { |
| 812 | return ieee80211softmac_priv(dev); |
| 813 | } |
| 814 | |
Michael Buesch | b35d649 | 2006-04-13 02:32:58 +0200 | [diff] [blame] | 815 | struct device; |
| 816 | |
| 817 | static inline |
| 818 | struct bcm43xx_private * dev_to_bcm(struct device *dev) |
| 819 | { |
| 820 | struct net_device *net_dev; |
| 821 | struct bcm43xx_private *bcm; |
| 822 | |
| 823 | net_dev = dev_get_drvdata(dev); |
| 824 | bcm = bcm43xx_priv(net_dev); |
| 825 | |
| 826 | return bcm; |
| 827 | } |
| 828 | |
Michael Buesch | 77db31e | 2006-02-12 16:47:44 +0100 | [diff] [blame] | 829 | |
| 830 | /* Helper function, which returns a boolean. |
| 831 | * TRUE, if PIO is used; FALSE, if DMA is used. |
| 832 | */ |
| 833 | #if defined(CONFIG_BCM43XX_DMA) && defined(CONFIG_BCM43XX_PIO) |
| 834 | static inline |
| 835 | int bcm43xx_using_pio(struct bcm43xx_private *bcm) |
| 836 | { |
| 837 | return bcm->__using_pio; |
| 838 | } |
| 839 | #elif defined(CONFIG_BCM43XX_DMA) |
| 840 | static inline |
| 841 | int bcm43xx_using_pio(struct bcm43xx_private *bcm) |
| 842 | { |
| 843 | return 0; |
| 844 | } |
| 845 | #elif defined(CONFIG_BCM43XX_PIO) |
| 846 | static inline |
| 847 | int bcm43xx_using_pio(struct bcm43xx_private *bcm) |
| 848 | { |
| 849 | return 1; |
| 850 | } |
| 851 | #else |
| 852 | # error "Using neither DMA nor PIO? Confused..." |
| 853 | #endif |
| 854 | |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 855 | /* Helper functions to access data structures private to the 80211 cores. |
| 856 | * Note that we _must_ have an 80211 core mapped when calling |
| 857 | * any of these functions. |
| 858 | */ |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 859 | static inline |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 860 | struct bcm43xx_pio * bcm43xx_current_pio(struct bcm43xx_private *bcm) |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 861 | { |
Michael Buesch | e9357c0 | 2006-03-13 19:27:34 +0100 | [diff] [blame] | 862 | assert(bcm43xx_using_pio(bcm)); |
| 863 | assert(bcm->current_80211_core_idx >= 0); |
| 864 | assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES); |
| 865 | return &(bcm->core_80211_ext[bcm->current_80211_core_idx].pio); |
| 866 | } |
| 867 | static inline |
| 868 | struct bcm43xx_dma * bcm43xx_current_dma(struct bcm43xx_private *bcm) |
| 869 | { |
| 870 | assert(!bcm43xx_using_pio(bcm)); |
| 871 | assert(bcm->current_80211_core_idx >= 0); |
| 872 | assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES); |
| 873 | return &(bcm->core_80211_ext[bcm->current_80211_core_idx].dma); |
| 874 | } |
| 875 | static inline |
| 876 | struct bcm43xx_phyinfo * bcm43xx_current_phy(struct bcm43xx_private *bcm) |
| 877 | { |
| 878 | assert(bcm->current_80211_core_idx >= 0); |
| 879 | assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES); |
| 880 | return &(bcm->core_80211_ext[bcm->current_80211_core_idx].phy); |
| 881 | } |
| 882 | static inline |
| 883 | struct bcm43xx_radioinfo * bcm43xx_current_radio(struct bcm43xx_private *bcm) |
| 884 | { |
| 885 | assert(bcm->current_80211_core_idx >= 0); |
| 886 | assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES); |
| 887 | return &(bcm->core_80211_ext[bcm->current_80211_core_idx].radio); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 888 | } |
| 889 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 890 | |
| 891 | static inline |
| 892 | struct bcm43xx_lopair * bcm43xx_get_lopair(struct bcm43xx_phyinfo *phy, |
| 893 | u16 radio_attenuation, |
| 894 | u16 baseband_attenuation) |
| 895 | { |
| 896 | return phy->_lo_pairs + (radio_attenuation + 14 * (baseband_attenuation / 2)); |
| 897 | } |
| 898 | |
| 899 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 900 | static inline |
| 901 | u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset) |
| 902 | { |
Michael Buesch | 7ce942d | 2006-03-11 13:43:06 +0100 | [diff] [blame] | 903 | return ioread16(bcm->mmio_addr + core_offset(bcm) + offset); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 904 | } |
| 905 | |
| 906 | static inline |
| 907 | void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value) |
| 908 | { |
| 909 | iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 910 | } |
| 911 | |
| 912 | static inline |
| 913 | u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset) |
| 914 | { |
Michael Buesch | 7ce942d | 2006-03-11 13:43:06 +0100 | [diff] [blame] | 915 | return ioread32(bcm->mmio_addr + core_offset(bcm) + offset); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 916 | } |
| 917 | |
| 918 | static inline |
| 919 | void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value) |
| 920 | { |
| 921 | iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 922 | } |
| 923 | |
| 924 | static inline |
| 925 | int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value) |
| 926 | { |
Michael Buesch | 7ce942d | 2006-03-11 13:43:06 +0100 | [diff] [blame] | 927 | return pci_read_config_word(bcm->pci_dev, offset, value); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 928 | } |
| 929 | |
| 930 | static inline |
| 931 | int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value) |
| 932 | { |
Michael Buesch | 7ce942d | 2006-03-11 13:43:06 +0100 | [diff] [blame] | 933 | return pci_read_config_dword(bcm->pci_dev, offset, value); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 934 | } |
| 935 | |
| 936 | static inline |
| 937 | int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value) |
| 938 | { |
Michael Buesch | 7ce942d | 2006-03-11 13:43:06 +0100 | [diff] [blame] | 939 | return pci_write_config_word(bcm->pci_dev, offset, value); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 940 | } |
| 941 | |
| 942 | static inline |
| 943 | int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value) |
| 944 | { |
Michael Buesch | 7ce942d | 2006-03-11 13:43:06 +0100 | [diff] [blame] | 945 | return pci_write_config_dword(bcm->pci_dev, offset, value); |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 946 | } |
| 947 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 948 | /** Limit a value between two limits */ |
| 949 | #ifdef limit_value |
| 950 | # undef limit_value |
| 951 | #endif |
| 952 | #define limit_value(value, min, max) \ |
| 953 | ({ \ |
| 954 | typeof(value) __value = (value); \ |
| 955 | typeof(value) __min = (min); \ |
| 956 | typeof(value) __max = (max); \ |
| 957 | if (__value < __min) \ |
| 958 | __value = __min; \ |
| 959 | else if (__value > __max) \ |
| 960 | __value = __max; \ |
| 961 | __value; \ |
| 962 | }) |
| 963 | |
Michael Buesch | f398f02 | 2006-02-23 21:15:39 +0100 | [diff] [blame] | 964 | /** Helpers to print MAC addresses. */ |
| 965 | #define BCM43xx_MACFMT "%02x:%02x:%02x:%02x:%02x:%02x" |
| 966 | #define BCM43xx_MACARG(x) ((u8*)(x))[0], ((u8*)(x))[1], \ |
| 967 | ((u8*)(x))[2], ((u8*)(x))[3], \ |
| 968 | ((u8*)(x))[4], ((u8*)(x))[5] |
| 969 | |
John W. Linville | f222313 | 2006-01-23 16:59:58 -0500 | [diff] [blame] | 970 | #endif /* BCM43xx_H_ */ |