blob: 50387fd4009bdbe464af98703e0653debf4baaf6 [file] [log] [blame]
Leo (Hao) Chen266dead2009-10-09 19:13:08 -07001/*****************************************************************************
2* Copyright 2004 - 2009 Broadcom Corporation. All rights reserved.
3*
4* Unless you and Broadcom execute a separate written software license
5* agreement governing use of this software, this software is licensed to you
6* under the terms of the GNU General Public License version 2, available at
7* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
8*
9* Notwithstanding the above, under no circumstances may you combine this
10* software in any way with any other Broadcom software provided under a
11* license other than the GPL, without Broadcom's express prior written
12* consent.
13*****************************************************************************/
14
15/* ---- Include Files ---------------------------------------------------- */
Leo (Hao) Chen266dead2009-10-09 19:13:08 -070016#include <linux/module.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090020#include <linux/slab.h>
Leo (Hao) Chen266dead2009-10-09 19:13:08 -070021#include <linux/string.h>
22#include <linux/ioport.h>
23#include <linux/device.h>
24#include <linux/delay.h>
25#include <linux/err.h>
26#include <linux/io.h>
27#include <linux/platform_device.h>
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/nand.h>
30#include <linux/mtd/nand_ecc.h>
31#include <linux/mtd/partitions.h>
32
33#include <asm/mach-types.h>
34#include <asm/system.h>
35
36#include <mach/reg_nand.h>
37#include <mach/reg_umi.h>
38
39#include "nand_bcm_umi.h"
40
41#include <mach/memory_settings.h>
42
43#define USE_DMA 1
44#include <mach/dma.h>
45#include <linux/dma-mapping.h>
46#include <linux/completion.h>
47
48/* ---- External Variable Declarations ----------------------------------- */
49/* ---- External Function Prototypes ------------------------------------- */
50/* ---- Public Variables ------------------------------------------------- */
51/* ---- Private Constants and Types -------------------------------------- */
52static const __devinitconst char gBanner[] = KERN_INFO \
53 "BCM UMI MTD NAND Driver: 1.00\n";
54
Leo (Hao) Chen266dead2009-10-09 19:13:08 -070055#if NAND_ECC_BCH
56static uint8_t scan_ff_pattern[] = { 0xff };
57
58static struct nand_bbt_descr largepage_bbt = {
59 .options = 0,
60 .offs = 0,
61 .len = 1,
62 .pattern = scan_ff_pattern
63};
64#endif
65
66/*
67** Preallocate a buffer to avoid having to do this every dma operation.
68** This is the size of the preallocated coherent DMA buffer.
69*/
70#if USE_DMA
71#define DMA_MIN_BUFLEN 512
72#define DMA_MAX_BUFLEN PAGE_SIZE
73#define USE_DIRECT_IO(len) (((len) < DMA_MIN_BUFLEN) || \
74 ((len) > DMA_MAX_BUFLEN))
75
76/*
77 * The current NAND data space goes from 0x80001900 to 0x80001FFF,
78 * which is only 0x700 = 1792 bytes long. This is too small for 2K, 4K page
79 * size NAND flash. Need to break the DMA down to multiple 1Ks.
80 *
81 * Need to make sure REG_NAND_DATA_PADDR + DMA_MAX_LEN < 0x80002000
82 */
83#define DMA_MAX_LEN 1024
84
85#else /* !USE_DMA */
86#define DMA_MIN_BUFLEN 0
87#define DMA_MAX_BUFLEN 0
88#define USE_DIRECT_IO(len) 1
89#endif
90/* ---- Private Function Prototypes -------------------------------------- */
91static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len);
92static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
93 int len);
94
95/* ---- Private Variables ------------------------------------------------ */
96static struct mtd_info *board_mtd;
97static void __iomem *bcm_umi_io_base;
98static void *virtPtr;
99static dma_addr_t physPtr;
100static struct completion nand_comp;
101
102/* ---- Private Functions ------------------------------------------------ */
103#if NAND_ECC_BCH
104#include "bcm_umi_bch.c"
105#else
106#include "bcm_umi_hamming.c"
107#endif
108
109#if USE_DMA
110
111/* Handler called when the DMA finishes. */
112static void nand_dma_handler(DMA_Device_t dev, int reason, void *userData)
113{
114 complete(&nand_comp);
115}
116
117static int nand_dma_init(void)
118{
119 int rc;
120
121 rc = dma_set_device_handler(DMA_DEVICE_NAND_MEM_TO_MEM,
122 nand_dma_handler, NULL);
123 if (rc != 0) {
124 printk(KERN_ERR "dma_set_device_handler failed: %d\n", rc);
125 return rc;
126 }
127
128 virtPtr =
129 dma_alloc_coherent(NULL, DMA_MAX_BUFLEN, &physPtr, GFP_KERNEL);
130 if (virtPtr == NULL) {
131 printk(KERN_ERR "NAND - Failed to allocate memory for DMA buffer\n");
132 return -ENOMEM;
133 }
134
135 return 0;
136}
137
138static void nand_dma_term(void)
139{
140 if (virtPtr != NULL)
141 dma_free_coherent(NULL, DMA_MAX_BUFLEN, virtPtr, physPtr);
142}
143
144static void nand_dma_read(void *buf, int len)
145{
146 int offset = 0;
147 int tmp_len = 0;
148 int len_left = len;
149 DMA_Handle_t hndl;
150
151 if (virtPtr == NULL)
152 panic("nand_dma_read: virtPtr == NULL\n");
153
154 if ((void *)physPtr == NULL)
155 panic("nand_dma_read: physPtr == NULL\n");
156
157 hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
158 if (hndl < 0) {
159 printk(KERN_ERR
160 "nand_dma_read: unable to allocate dma channel: %d\n",
161 (int)hndl);
162 panic("\n");
163 }
164
165 while (len_left > 0) {
166 if (len_left > DMA_MAX_LEN) {
167 tmp_len = DMA_MAX_LEN;
168 len_left -= DMA_MAX_LEN;
169 } else {
170 tmp_len = len_left;
171 len_left = 0;
172 }
173
174 init_completion(&nand_comp);
175 dma_transfer_mem_to_mem(hndl, REG_NAND_DATA_PADDR,
176 physPtr + offset, tmp_len);
177 wait_for_completion(&nand_comp);
178
179 offset += tmp_len;
180 }
181
182 dma_free_channel(hndl);
183
184 if (buf != NULL)
185 memcpy(buf, virtPtr, len);
186}
187
188static void nand_dma_write(const void *buf, int len)
189{
190 int offset = 0;
191 int tmp_len = 0;
192 int len_left = len;
193 DMA_Handle_t hndl;
194
195 if (buf == NULL)
196 panic("nand_dma_write: buf == NULL\n");
197
198 if (virtPtr == NULL)
199 panic("nand_dma_write: virtPtr == NULL\n");
200
201 if ((void *)physPtr == NULL)
202 panic("nand_dma_write: physPtr == NULL\n");
203
204 memcpy(virtPtr, buf, len);
205
206
207 hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
208 if (hndl < 0) {
209 printk(KERN_ERR
210 "nand_dma_write: unable to allocate dma channel: %d\n",
211 (int)hndl);
212 panic("\n");
213 }
214
215 while (len_left > 0) {
216 if (len_left > DMA_MAX_LEN) {
217 tmp_len = DMA_MAX_LEN;
218 len_left -= DMA_MAX_LEN;
219 } else {
220 tmp_len = len_left;
221 len_left = 0;
222 }
223
224 init_completion(&nand_comp);
225 dma_transfer_mem_to_mem(hndl, physPtr + offset,
226 REG_NAND_DATA_PADDR, tmp_len);
227 wait_for_completion(&nand_comp);
228
229 offset += tmp_len;
230 }
231
232 dma_free_channel(hndl);
233}
234
235#endif
236
237static int nand_dev_ready(struct mtd_info *mtd)
238{
239 return nand_bcm_umi_dev_ready();
240}
241
242/****************************************************************************
243*
244* bcm_umi_nand_inithw
245*
246* This routine does the necessary hardware (board-specific)
247* initializations. This includes setting up the timings, etc.
248*
249***************************************************************************/
250int bcm_umi_nand_inithw(void)
251{
252 /* Configure nand timing parameters */
253 REG_UMI_NAND_TCR &= ~0x7ffff;
254 REG_UMI_NAND_TCR |= HW_CFG_NAND_TCR;
255
256#if !defined(CONFIG_MTD_NAND_BCM_UMI_HWCS)
257 /* enable software control of CS */
258 REG_UMI_NAND_TCR |= REG_UMI_NAND_TCR_CS_SWCTRL;
259#endif
260
261 /* keep NAND chip select asserted */
262 REG_UMI_NAND_RCSR |= REG_UMI_NAND_RCSR_CS_ASSERTED;
263
264 REG_UMI_NAND_TCR &= ~REG_UMI_NAND_TCR_WORD16;
265 /* enable writes to flash */
266 REG_UMI_MMD_ICR |= REG_UMI_MMD_ICR_FLASH_WP;
267
268 writel(NAND_CMD_RESET, bcm_umi_io_base + REG_NAND_CMD_OFFSET);
269 nand_bcm_umi_wait_till_ready();
270
271#if NAND_ECC_BCH
272 nand_bcm_umi_bch_config_ecc(NAND_ECC_NUM_BYTES);
273#endif
274
275 return 0;
276}
277
278/* Used to turn latch the proper register for access. */
279static void bcm_umi_nand_hwcontrol(struct mtd_info *mtd, int cmd,
280 unsigned int ctrl)
281{
282 /* send command to hardware */
283 struct nand_chip *chip = mtd->priv;
284 if (ctrl & NAND_CTRL_CHANGE) {
285 if (ctrl & NAND_CLE) {
286 chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_CMD_OFFSET;
287 goto CMD;
288 }
289 if (ctrl & NAND_ALE) {
290 chip->IO_ADDR_W =
291 bcm_umi_io_base + REG_NAND_ADDR_OFFSET;
292 goto CMD;
293 }
294 chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
295 }
296
297CMD:
298 /* Send command to chip directly */
299 if (cmd != NAND_CMD_NONE)
300 writeb(cmd, chip->IO_ADDR_W);
301}
302
303static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
304 int len)
305{
306 if (USE_DIRECT_IO(len)) {
307 /* Do it the old way if the buffer is small or too large.
308 * Probably quicker than starting and checking dma. */
309 int i;
310 struct nand_chip *this = mtd->priv;
311
312 for (i = 0; i < len; i++)
313 writeb(buf[i], this->IO_ADDR_W);
314 }
315#if USE_DMA
316 else
317 nand_dma_write(buf, len);
318#endif
319}
320
321static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len)
322{
323 if (USE_DIRECT_IO(len)) {
324 int i;
325 struct nand_chip *this = mtd->priv;
326
327 for (i = 0; i < len; i++)
328 buf[i] = readb(this->IO_ADDR_R);
329 }
330#if USE_DMA
331 else
332 nand_dma_read(buf, len);
333#endif
334}
335
336static uint8_t readbackbuf[NAND_MAX_PAGESIZE];
337static int bcm_umi_nand_verify_buf(struct mtd_info *mtd, const u_char * buf,
338 int len)
339{
340 /*
341 * Try to readback page with ECC correction. This is necessary
342 * for MLC parts which may have permanently stuck bits.
343 */
344 struct nand_chip *chip = mtd->priv;
345 int ret = chip->ecc.read_page(mtd, chip, readbackbuf, 0);
346 if (ret < 0)
347 return -EFAULT;
348 else {
349 if (memcmp(readbackbuf, buf, len) == 0)
350 return 0;
351
352 return -EFAULT;
353 }
354 return 0;
355}
356
357static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
358{
359 struct nand_chip *this;
360 struct resource *r;
361 int err = 0;
362
363 printk(gBanner);
364
365 /* Allocate memory for MTD device structure and private data */
366 board_mtd =
367 kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
368 GFP_KERNEL);
369 if (!board_mtd) {
370 printk(KERN_WARNING
371 "Unable to allocate NAND MTD device structure.\n");
372 return -ENOMEM;
373 }
374
375 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
376
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200377 if (!r) {
378 err = -ENXIO;
379 goto out_free;
380 }
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700381
Daniel Mack3ad2f3f2010-02-03 08:01:28 +0800382 /* map physical address */
Joe Perches28f65c12011-06-09 09:13:32 -0700383 bcm_umi_io_base = ioremap(r->start, resource_size(r));
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700384
385 if (!bcm_umi_io_base) {
386 printk(KERN_ERR "ioremap to access BCM UMI NAND chip failed\n");
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200387 err = -EIO;
388 goto out_free;
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700389 }
390
391 /* Get pointer to private data */
392 this = (struct nand_chip *)(&board_mtd[1]);
393
394 /* Initialize structures */
395 memset((char *)board_mtd, 0, sizeof(struct mtd_info));
396 memset((char *)this, 0, sizeof(struct nand_chip));
397
398 /* Link the private data with the MTD structure */
399 board_mtd->priv = this;
400
401 /* Initialize the NAND hardware. */
402 if (bcm_umi_nand_inithw() < 0) {
403 printk(KERN_ERR "BCM UMI NAND chip could not be initialized\n");
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200404 err = -EIO;
405 goto out_unmap;
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700406 }
407
408 /* Set address of NAND IO lines */
409 this->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
410 this->IO_ADDR_R = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
411
412 /* Set command delay time, see datasheet for correct value */
413 this->chip_delay = 0;
414 /* Assign the device ready function, if available */
415 this->dev_ready = nand_dev_ready;
416 this->options = 0;
417
418 this->write_buf = bcm_umi_nand_write_buf;
419 this->read_buf = bcm_umi_nand_read_buf;
420 this->verify_buf = bcm_umi_nand_verify_buf;
421
422 this->cmd_ctrl = bcm_umi_nand_hwcontrol;
423 this->ecc.mode = NAND_ECC_HW;
424 this->ecc.size = 512;
425 this->ecc.bytes = NAND_ECC_NUM_BYTES;
426#if NAND_ECC_BCH
427 this->ecc.read_page = bcm_umi_bch_read_page_hwecc;
428 this->ecc.write_page = bcm_umi_bch_write_page_hwecc;
429#else
430 this->ecc.correct = nand_correct_data512;
431 this->ecc.calculate = bcm_umi_hamming_get_hw_ecc;
432 this->ecc.hwctl = bcm_umi_hamming_enable_hwecc;
433#endif
434
435#if USE_DMA
436 err = nand_dma_init();
437 if (err != 0)
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200438 goto out_unmap;
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700439#endif
440
441 /* Figure out the size of the device that we have.
442 * We need to do this to figure out which ECC
443 * layout we'll be using.
444 */
445
David Woodhouse5e81e882010-02-26 18:32:56 +0000446 err = nand_scan_ident(board_mtd, 1, NULL);
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700447 if (err) {
448 printk(KERN_ERR "nand_scan failed: %d\n", err);
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200449 goto out_unmap;
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700450 }
451
452 /* Now that we know the nand size, we can setup the ECC layout */
453
454 switch (board_mtd->writesize) { /* writesize is the pagesize */
455 case 4096:
456 this->ecc.layout = &nand_hw_eccoob_4096;
457 break;
458 case 2048:
459 this->ecc.layout = &nand_hw_eccoob_2048;
460 break;
461 case 512:
462 this->ecc.layout = &nand_hw_eccoob_512;
463 break;
464 default:
465 {
466 printk(KERN_ERR "NAND - Unrecognized pagesize: %d\n",
467 board_mtd->writesize);
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200468 err = -EINVAL;
469 goto out_unmap;
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700470 }
471 }
472
473#if NAND_ECC_BCH
474 if (board_mtd->writesize > 512) {
Brian Norrisbb9ebd42011-05-31 16:31:23 -0700475 if (this->bbt_options & NAND_BBT_USE_FLASH)
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700476 largepage_bbt.options = NAND_BBT_SCAN2NDPAGE;
477 this->badblock_pattern = &largepage_bbt;
478 }
479#endif
480
481 /* Now finish off the scan, now that ecc.layout has been initialized. */
482
483 err = nand_scan_tail(board_mtd);
484 if (err) {
485 printk(KERN_ERR "nand_scan failed: %d\n", err);
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200486 goto out_unmap;
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700487 }
488
489 /* Register the partitions */
Dmitry Eremin-Solenikov58171cb2011-06-02 18:00:27 +0400490 board_mtd->name = "bcm_umi-nand";
491 mtd_device_parse_register(board_mtd, NULL, 0, NULL, 0);
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700492
493 /* Return happy */
494 return 0;
Julia Lawall38ca6eb2011-08-10 10:14:14 +0200495out_unmap:
496 iounmap(bcm_umi_io_base);
497out_free:
498 kfree(board_mtd);
499 return err;
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700500}
501
502static int bcm_umi_nand_remove(struct platform_device *pdev)
503{
504#if USE_DMA
505 nand_dma_term();
506#endif
507
508 /* Release resources, unregister device */
509 nand_release(board_mtd);
510
Daniel Mack3ad2f3f2010-02-03 08:01:28 +0800511 /* unmap physical address */
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700512 iounmap(bcm_umi_io_base);
513
514 /* Free the MTD device structure */
515 kfree(board_mtd);
516
517 return 0;
518}
519
520#ifdef CONFIG_PM
521static int bcm_umi_nand_suspend(struct platform_device *pdev,
522 pm_message_t state)
523{
524 printk(KERN_ERR "MTD NAND suspend is being called\n");
525 return 0;
526}
527
528static int bcm_umi_nand_resume(struct platform_device *pdev)
529{
530 printk(KERN_ERR "MTD NAND resume is being called\n");
531 return 0;
532}
533#else
534#define bcm_umi_nand_suspend NULL
535#define bcm_umi_nand_resume NULL
536#endif
537
538static struct platform_driver nand_driver = {
539 .driver = {
540 .name = "bcm-nand",
541 .owner = THIS_MODULE,
542 },
543 .probe = bcm_umi_nand_probe,
544 .remove = bcm_umi_nand_remove,
545 .suspend = bcm_umi_nand_suspend,
546 .resume = bcm_umi_nand_resume,
547};
548
Axel Linf99640d2011-11-27 20:45:03 +0800549module_platform_driver(nand_driver);
Leo (Hao) Chen266dead2009-10-09 19:13:08 -0700550
551MODULE_LICENSE("GPL");
552MODULE_AUTHOR("Broadcom");
553MODULE_DESCRIPTION("BCM UMI MTD NAND driver");