Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Mailbox reservation modules for DSP |
| 3 | * |
| 4 | * Copyright (C) 2006 Nokia Corporation |
| 5 | * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file "COPYING" in the main directory of this archive |
| 9 | * for more details. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/resource.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/platform_device.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame^] | 16 | #include <linux/io.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 17 | #include <mach/mailbox.h> |
| 18 | #include <mach/irqs.h> |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 19 | |
| 20 | #define MAILBOX_ARM2DSP1 0x00 |
| 21 | #define MAILBOX_ARM2DSP1b 0x04 |
| 22 | #define MAILBOX_DSP2ARM1 0x08 |
| 23 | #define MAILBOX_DSP2ARM1b 0x0c |
| 24 | #define MAILBOX_DSP2ARM2 0x10 |
| 25 | #define MAILBOX_DSP2ARM2b 0x14 |
| 26 | #define MAILBOX_ARM2DSP1_Flag 0x18 |
| 27 | #define MAILBOX_DSP2ARM1_Flag 0x1c |
| 28 | #define MAILBOX_DSP2ARM2_Flag 0x20 |
| 29 | |
| 30 | unsigned long mbox_base; |
| 31 | |
| 32 | struct omap_mbox1_fifo { |
| 33 | unsigned long cmd; |
| 34 | unsigned long data; |
| 35 | unsigned long flag; |
| 36 | }; |
| 37 | |
| 38 | struct omap_mbox1_priv { |
| 39 | struct omap_mbox1_fifo tx_fifo; |
| 40 | struct omap_mbox1_fifo rx_fifo; |
| 41 | }; |
| 42 | |
| 43 | static inline int mbox_read_reg(unsigned int reg) |
| 44 | { |
| 45 | return __raw_readw(mbox_base + reg); |
| 46 | } |
| 47 | |
| 48 | static inline void mbox_write_reg(unsigned int val, unsigned int reg) |
| 49 | { |
| 50 | __raw_writew(val, mbox_base + reg); |
| 51 | } |
| 52 | |
| 53 | /* msg */ |
Tony Lindgren | e27a93a | 2007-12-18 20:58:32 -0800 | [diff] [blame] | 54 | static mbox_msg_t omap1_mbox_fifo_read(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 55 | { |
| 56 | struct omap_mbox1_fifo *fifo = |
| 57 | &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo; |
| 58 | mbox_msg_t msg; |
| 59 | |
| 60 | msg = mbox_read_reg(fifo->data); |
| 61 | msg |= ((mbox_msg_t) mbox_read_reg(fifo->cmd)) << 16; |
| 62 | |
| 63 | return msg; |
| 64 | } |
| 65 | |
Tony Lindgren | e27a93a | 2007-12-18 20:58:32 -0800 | [diff] [blame] | 66 | static void |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 67 | omap1_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) |
| 68 | { |
| 69 | struct omap_mbox1_fifo *fifo = |
| 70 | &((struct omap_mbox1_priv *)mbox->priv)->tx_fifo; |
| 71 | |
| 72 | mbox_write_reg(msg & 0xffff, fifo->data); |
| 73 | mbox_write_reg(msg >> 16, fifo->cmd); |
| 74 | } |
| 75 | |
Tony Lindgren | e27a93a | 2007-12-18 20:58:32 -0800 | [diff] [blame] | 76 | static int omap1_mbox_fifo_empty(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 77 | { |
| 78 | return 0; |
| 79 | } |
| 80 | |
Tony Lindgren | e27a93a | 2007-12-18 20:58:32 -0800 | [diff] [blame] | 81 | static int omap1_mbox_fifo_full(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 82 | { |
| 83 | struct omap_mbox1_fifo *fifo = |
| 84 | &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo; |
| 85 | |
| 86 | return (mbox_read_reg(fifo->flag)); |
| 87 | } |
| 88 | |
| 89 | /* irq */ |
Tony Lindgren | e27a93a | 2007-12-18 20:58:32 -0800 | [diff] [blame] | 90 | static void |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 91 | omap1_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) |
| 92 | { |
| 93 | if (irq == IRQ_RX) |
| 94 | enable_irq(mbox->irq); |
| 95 | } |
| 96 | |
Tony Lindgren | e27a93a | 2007-12-18 20:58:32 -0800 | [diff] [blame] | 97 | static void |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 98 | omap1_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) |
| 99 | { |
| 100 | if (irq == IRQ_RX) |
| 101 | disable_irq(mbox->irq); |
| 102 | } |
| 103 | |
Tony Lindgren | e27a93a | 2007-12-18 20:58:32 -0800 | [diff] [blame] | 104 | static int |
Hiroshi DOYU | 340a614a | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 105 | omap1_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) |
| 106 | { |
| 107 | if (irq == IRQ_TX) |
| 108 | return 0; |
| 109 | return 1; |
| 110 | } |
| 111 | |
| 112 | static struct omap_mbox_ops omap1_mbox_ops = { |
| 113 | .type = OMAP_MBOX_TYPE1, |
| 114 | .fifo_read = omap1_mbox_fifo_read, |
| 115 | .fifo_write = omap1_mbox_fifo_write, |
| 116 | .fifo_empty = omap1_mbox_fifo_empty, |
| 117 | .fifo_full = omap1_mbox_fifo_full, |
| 118 | .enable_irq = omap1_mbox_enable_irq, |
| 119 | .disable_irq = omap1_mbox_disable_irq, |
| 120 | .is_irq = omap1_mbox_is_irq, |
| 121 | }; |
| 122 | |
| 123 | /* FIXME: the following struct should be created automatically by the user id */ |
| 124 | |
| 125 | /* DSP */ |
| 126 | static struct omap_mbox1_priv omap1_mbox_dsp_priv = { |
| 127 | .tx_fifo = { |
| 128 | .cmd = MAILBOX_ARM2DSP1b, |
| 129 | .data = MAILBOX_ARM2DSP1, |
| 130 | .flag = MAILBOX_ARM2DSP1_Flag, |
| 131 | }, |
| 132 | .rx_fifo = { |
| 133 | .cmd = MAILBOX_DSP2ARM1b, |
| 134 | .data = MAILBOX_DSP2ARM1, |
| 135 | .flag = MAILBOX_DSP2ARM1_Flag, |
| 136 | }, |
| 137 | }; |
| 138 | |
| 139 | struct omap_mbox mbox_dsp_info = { |
| 140 | .name = "dsp", |
| 141 | .ops = &omap1_mbox_ops, |
| 142 | .priv = &omap1_mbox_dsp_priv, |
| 143 | }; |
| 144 | EXPORT_SYMBOL(mbox_dsp_info); |
| 145 | |
| 146 | static int __init omap1_mbox_probe(struct platform_device *pdev) |
| 147 | { |
| 148 | struct resource *res; |
| 149 | int ret = 0; |
| 150 | |
| 151 | if (pdev->num_resources != 2) { |
| 152 | dev_err(&pdev->dev, "invalid number of resources: %d\n", |
| 153 | pdev->num_resources); |
| 154 | return -ENODEV; |
| 155 | } |
| 156 | |
| 157 | /* MBOX base */ |
| 158 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 159 | if (unlikely(!res)) { |
| 160 | dev_err(&pdev->dev, "invalid mem resource\n"); |
| 161 | return -ENODEV; |
| 162 | } |
| 163 | mbox_base = res->start; |
| 164 | |
| 165 | /* DSP IRQ */ |
| 166 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 167 | if (unlikely(!res)) { |
| 168 | dev_err(&pdev->dev, "invalid irq resource\n"); |
| 169 | return -ENODEV; |
| 170 | } |
| 171 | mbox_dsp_info.irq = res->start; |
| 172 | |
| 173 | ret = omap_mbox_register(&mbox_dsp_info); |
| 174 | |
| 175 | return ret; |
| 176 | } |
| 177 | |
| 178 | static int omap1_mbox_remove(struct platform_device *pdev) |
| 179 | { |
| 180 | omap_mbox_unregister(&mbox_dsp_info); |
| 181 | |
| 182 | return 0; |
| 183 | } |
| 184 | |
| 185 | static struct platform_driver omap1_mbox_driver = { |
| 186 | .probe = omap1_mbox_probe, |
| 187 | .remove = omap1_mbox_remove, |
| 188 | .driver = { |
| 189 | .name = "mailbox", |
| 190 | }, |
| 191 | }; |
| 192 | |
| 193 | static int __init omap1_mbox_init(void) |
| 194 | { |
| 195 | return platform_driver_register(&omap1_mbox_driver); |
| 196 | } |
| 197 | |
| 198 | static void __exit omap1_mbox_exit(void) |
| 199 | { |
| 200 | platform_driver_unregister(&omap1_mbox_driver); |
| 201 | } |
| 202 | |
| 203 | module_init(omap1_mbox_init); |
| 204 | module_exit(omap1_mbox_exit); |
| 205 | |
| 206 | MODULE_LICENSE("GPL"); |