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gerrit-public.fairphone.software / kernel / msm / 10cc3529072d5415fb040018a8a99aa7a60190b6 / arch / mips / mm / c-r4k.c
  1. 10cc352 [MIPS] Allow hardwiring of the CPU type to a single type for optimization. by Ralf Baechle · 17 years ago
  2. db813fe [MIPS] Avoid indexed cacheops. by Ralf Baechle · 17 years ago
  3. 641e97f [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. by Ralf Baechle · 17 years ago
  4. e001e52 [MIPS] Replace use of stext with _stext. by Ralf Baechle · 17 years ago
  5. 2a21c73 [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 by Fuxin Zhang · 18 years ago
  6. 617667b [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. by Ralf Baechle · 18 years ago
  7. 0550d9d [MIPS] Remove redundant r4k_blast_icache() calls by Atsushi Nemoto · 18 years ago
  8. c59a0f1 [MIPS] Remove __flush_icache_page by Atsushi Nemoto · 18 years ago
  9. a00f631 [MIPS] c-r4k: Convert init functions from inline to __init. by Ralf Baechle · 18 years ago
  10. f650279 [MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache. by Atsushi Nemoto · 18 years ago
  11. 585fa72 [MIPS] Retire flush_icache_page from mm use. by Ralf Baechle · 18 years ago
  12. df586d5 [MIPS] c-r4k: Typo fix. by Ralf Baechle · 18 years ago
  13. 2874fe5 [MIPS] vr41xx: Replace magic number for P4K bit with symbol. by Yoichi Yuasa · 18 years ago
  14. 1058ecd [MIPS] vr41xx: Changed workaround to recommended method by Yoichi Yuasa · 18 years ago
  15. 4e8ab36 [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80. by Yoichi Yuasa · 18 years ago
  16. fc5d2d2 [MIPS] Use the proper technical term for naming some of the cache macros. by Ralf Baechle · 18 years ago
  17. 6ab3d56 Remove obsolete #include <linux/config.h> by Jörn Engel · 18 years ago
  18. 2e78ae3 [MIPS] 74K: Assume it will also have an AR bit in config7 by Ralf Baechle · 18 years ago
  19. beab375 [MIPS] Treat CPUs with AR bit as physically indexed. by Ralf Baechle · 19 years ago
  20. 73f4035 [MIPS] Fix handling of 0 length I & D caches. by Chris Dearman · 19 years ago
  21. 9318c51 [MIPS] MIPS32/MIPS64 secondary cache management by Chris Dearman · 19 years ago
  22. 9370b35 [MIPS] Save write-only Config.OD from being clobbered by Sergei Shtylyov · 19 years ago
  23. 44d921b [MIPS] Treat R14000 like R10000. by Kumba · 19 years ago
  24. 7f3f1d0 [MIPS] Fix deadlock on MP with cache aliases. by Ralf Baechle · 19 years ago
  25. 98a41de [MIPS] Add missing 34K processor IDs by Nigel Stephens · 19 years ago
  26. 3c68da7 [MIPS] Use __ffs() instead of ffs() for waybit calculation. by Atsushi Nemoto · 19 years ago
  27. 7e3bfc7 [MIPS] Handle IDE PIO cache aliases on SMP. by Ralf Baechle · 19 years ago
  28. 67a3f6d [MIPS] Fix tx49_blast_icache32_page_indexed. by Atsushi Nemoto · 19 years ago
  29. de862b4 [MIPS] TX49XX has prefetch. by Atsushi Nemoto · 19 years ago
  30. de62893 [MIPS] local_r4k_flush_cache_page fix by Atsushi Nemoto · 19 years ago
  31. 4debe4f [MIPS] Initialize S-cache function pointers even on S-cache-less CPUs. by Ralf Baechle · 19 years ago
  32. 41700e7 [MIPS] Add protected_blast_icache_range, blast_icache_range, etc. by Atsushi Nemoto · 19 years ago
  33. d4264f1 [MIPS] Remove wrong __user tags. by Atsushi Nemoto · 19 years ago
  34. e7958bb MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. by Ralf Baechle · 19 years ago
  35. 6ec2580 Rename page argument of flush_cache_page to something more descriptive. by Ralf Baechle · 19 years ago
  36. 02cf211 Cleanup the mess in cpu_cache_init. by Ralf Baechle · 19 years ago
  37. 10a3dab Add/Fix missing bit of R4600 hit cacheop workaround. by Thiemo Seufer · 19 years ago
  38. 02fe2c9 Minor code cleanup. by Thiemo Seufer · 19 years ago
  39. d8748a3 More .set push/pop. by Thiemo Seufer · 19 years ago
  40. 330cfe0 Let r4600 PRID detection match only legacy CPUs, cleanups. by Thiemo Seufer · 19 years ago
  41. 1d40cfc Avoid SMP cacheflushes. This is a minor optimization of startup but by Ralf Baechle · 19 years ago
  42. e01402b More AP / SP bits for the 34K, the Malta bits and things. Still wants by Ralf Baechle · 19 years ago
  43. ec74e36 Mark a few variables __read_mostly. by Ralf Baechle · 19 years ago
  44. cc61c1f MIPS R2 instruction hazard handling. by Ralf Baechle · 19 years ago
  45. ba5187d Better interface to run uncached cache setup code. by Thiemo Seufer · 20 years ago
  46. fe00f94 Sparseify MIPS. by Ralf Baechle · 20 years ago
  47. e3ad1c2 Base Au1200 2.6 support. by Pete Popov · 20 years ago
  48. 26a51b2 Use intermediate variable. by Thiemo Seufer · 20 years ago
  49. 79acf83 Moves a test which determines if we actually need to perform a by Ralf Baechle · 20 years ago
  50. c6e8b58 Update MIPS to use the 4-level pagetable code thereby getting rid of by Ralf Baechle · 20 years ago
  51. 505403b 25Kf is also physically indexed. by Ralf Baechle · 20 years ago
  52. a95970f 20Kc and SB1 don't suffer from aliases. by Ralf Baechle · 20 years ago
  53. ae6aafe Move missplaced code line to the right place. by Ralf Baechle · 20 years ago
  54. d1e344e Use hardware mechanism to deal with cache aliases in the 24K. by Ralf Baechle · 20 years ago
  55. 28ecca4 Remove old wrong bits of cache code. by Ralf Baechle · 20 years ago
  56. 42a3b4f [PATCH] mips: nuke trailing whitespace by Ralf Baechle · 19 years ago
  57. 875d43e [PATCH] mips: clean up 32/64-bit configuration by Ralf Baechle · 19 years ago
  58. 1da177e Linux-2.6.12-rc2 by Linus Torvalds · 20 years ago