1. 2e78ae3 [MIPS] 74K: Assume it will also have an AR bit in config7 by Ralf Baechle · 18 years ago
  2. beab375 [MIPS] Treat CPUs with AR bit as physically indexed. by Ralf Baechle · 18 years ago
  3. 73f4035 [MIPS] Fix handling of 0 length I & D caches. by Chris Dearman · 18 years ago
  4. 9318c51 [MIPS] MIPS32/MIPS64 secondary cache management by Chris Dearman · 18 years ago
  5. 9370b35 [MIPS] Save write-only Config.OD from being clobbered by Sergei Shtylyov · 18 years ago
  6. 44d921b [MIPS] Treat R14000 like R10000. by Kumba · 18 years ago
  7. 7f3f1d0 [MIPS] Fix deadlock on MP with cache aliases. by Ralf Baechle · 19 years ago
  8. 98a41de [MIPS] Add missing 34K processor IDs by Nigel Stephens · 19 years ago
  9. 3c68da7 [MIPS] Use __ffs() instead of ffs() for waybit calculation. by Atsushi Nemoto · 19 years ago
  10. 7e3bfc7 [MIPS] Handle IDE PIO cache aliases on SMP. by Ralf Baechle · 19 years ago
  11. 67a3f6d [MIPS] Fix tx49_blast_icache32_page_indexed. by Atsushi Nemoto · 19 years ago
  12. de862b4 [MIPS] TX49XX has prefetch. by Atsushi Nemoto · 19 years ago
  13. de62893 [MIPS] local_r4k_flush_cache_page fix by Atsushi Nemoto · 19 years ago
  14. 4debe4f [MIPS] Initialize S-cache function pointers even on S-cache-less CPUs. by Ralf Baechle · 19 years ago
  15. 41700e7 [MIPS] Add protected_blast_icache_range, blast_icache_range, etc. by Atsushi Nemoto · 19 years ago
  16. d4264f1 [MIPS] Remove wrong __user tags. by Atsushi Nemoto · 19 years ago
  17. e7958bb MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. by Ralf Baechle · 19 years ago
  18. 6ec2580 Rename page argument of flush_cache_page to something more descriptive. by Ralf Baechle · 19 years ago
  19. 02cf211 Cleanup the mess in cpu_cache_init. by Ralf Baechle · 19 years ago
  20. 10a3dab Add/Fix missing bit of R4600 hit cacheop workaround. by Thiemo Seufer · 19 years ago
  21. 02fe2c9 Minor code cleanup. by Thiemo Seufer · 19 years ago
  22. d8748a3 More .set push/pop. by Thiemo Seufer · 19 years ago
  23. 330cfe0 Let r4600 PRID detection match only legacy CPUs, cleanups. by Thiemo Seufer · 19 years ago
  24. 1d40cfc Avoid SMP cacheflushes. This is a minor optimization of startup but by Ralf Baechle · 19 years ago
  25. e01402b More AP / SP bits for the 34K, the Malta bits and things. Still wants by Ralf Baechle · 19 years ago
  26. ec74e36 Mark a few variables __read_mostly. by Ralf Baechle · 19 years ago
  27. cc61c1f MIPS R2 instruction hazard handling. by Ralf Baechle · 19 years ago
  28. ba5187d Better interface to run uncached cache setup code. by Thiemo Seufer · 20 years ago
  29. fe00f94 Sparseify MIPS. by Ralf Baechle · 20 years ago
  30. e3ad1c2 Base Au1200 2.6 support. by Pete Popov · 20 years ago
  31. 26a51b2 Use intermediate variable. by Thiemo Seufer · 20 years ago
  32. 79acf83 Moves a test which determines if we actually need to perform a by Ralf Baechle · 20 years ago
  33. c6e8b58 Update MIPS to use the 4-level pagetable code thereby getting rid of by Ralf Baechle · 20 years ago
  34. 505403b 25Kf is also physically indexed. by Ralf Baechle · 20 years ago
  35. a95970f 20Kc and SB1 don't suffer from aliases. by Ralf Baechle · 20 years ago
  36. ae6aafe Move missplaced code line to the right place. by Ralf Baechle · 20 years ago
  37. d1e344e Use hardware mechanism to deal with cache aliases in the 24K. by Ralf Baechle · 20 years ago
  38. 28ecca4 Remove old wrong bits of cache code. by Ralf Baechle · 20 years ago
  39. 42a3b4f [PATCH] mips: nuke trailing whitespace by Ralf Baechle · 19 years ago
  40. 875d43e [PATCH] mips: clean up 32/64-bit configuration by Ralf Baechle · 19 years ago
  41. 1da177e Linux-2.6.12-rc2 by Linus Torvalds · 20 years ago