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gerrit-public.fairphone.software / kernel / msm / 3a083227a45cbbf5d29e6fe7c093af9e09905d4d / drivers / gpu / drm / nouveau / nv50_display.h
  1. cdccc70 drm/nv50-nvc0: initialise display sync channels by Ben Skeggs · 15 years ago
  2. 292deb7 drm/nv50-nvc0: tidy evo object creation some more by Ben Skeggs · 15 years ago
  3. 60f60bf drm/nv50-nvc0: request and wait on notification of modeset completion by Ben Skeggs · 15 years ago
  4. f13e435 drm/nv50-nvc0: switch to tasklet for display isr bh by Ben Skeggs · 15 years ago
  5. 30d8181 drm/nv50-nvc0: disp channels have fixed purposes, don't "allocate" them by Ben Skeggs · 15 years ago
  6. 59c0f57 drm/nv50-nvc0: rename disp->evo to disp->master by Ben Skeggs · 15 years ago
  7. ef8389a drm/nv50-nvc0: move non-sharable display state into private structure by Ben Skeggs · 15 years ago
  8. fce2bad drm/nv50: rework PGPIO IRQ handling and hotplug detection by Ben Skeggs · 15 years ago
  9. 19b7fc7 drm/nv50: use register/unregister functionality for PDISPLAY ISR by Ben Skeggs · 15 years ago
  10. c88c2e0 drm/nouveau: Move display init to a new nouveau_engine. by Francisco Jerez · 15 years ago
  11. a5acac6 drm/nv50: punt hotplug irq handling out to workqueue by Ben Skeggs · 15 years ago
  12. 6ee7386 drm/nouveau: Add DRM driver for NVIDIA GPUs by Ben Skeggs · 16 years ago