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gerrit-public.fairphone.software / kernel / msm / 4f94afa258c3e574a8d985160e87146a5183944b / arch
  1. 57e3e3b When no yamon command line is passed to the kernel, preserve the default by Pete Popov · 19 years ago
  2. 10a3dab Add/Fix missing bit of R4600 hit cacheop workaround. by Thiemo Seufer · 19 years ago
  3. 02fe2c9 Minor code cleanup. by Thiemo Seufer · 19 years ago
  4. f5b4d95 R4600 v2.0 needs a nop before tlbp. by Thiemo Seufer · 19 years ago
  5. 424cada Don't set up a sg dma address if we have no page address for some reason. by Thiemo Seufer · 19 years ago
  6. d8748a3 More .set push/pop. by Thiemo Seufer · 19 years ago
  7. 5bcb9a5 Move genrtc.c's functions into <asm/rtc.h> by Ralf Baechle · 19 years ago
  8. 330cfe0 Let r4600 PRID detection match only legacy CPUs, cleanups. by Thiemo Seufer · 19 years ago
  9. 37c8c64 IP22 EISA support update. by Thiemo Seufer · 19 years ago
  10. 7623deb Handle mtc0 - tlb write hazard for VR5432. by Ralf Baechle · 19 years ago
  11. 23bbbaf Make static what ought to be static. by Maciej W. Rozycki · 19 years ago
  12. e607d6c Get rid of a bunch of debug serial routines. Use prom_printf instead. by Pete Popov · 19 years ago
  13. 340ee4b Virtual SMP support for the 34K. by Ralf Baechle · 19 years ago
  14. d03d0a5 MT bulletproofing. by Ralf Baechle · 19 years ago
  15. a50b3e2 Do the timer interrupt only once on CPU 0 ... by Ralf Baechle · 19 years ago
  16. ac351d9 Add a few simple error checks to tlb dumper. by Ralf Baechle · 19 years ago
  17. d2f755e Reindent dump_tlb.c. by Ralf Baechle · 19 years ago
  18. e027802 Display presence of SmartMIPS, DSP and MT ASEs in /proc/cpuinfo. by Ralf Baechle · 19 years ago
  19. 3bffe73 Delete old junk. by Ralf Baechle · 19 years ago
  20. 28a7879 Spelling fix. by Ralf Baechle · 19 years ago
  21. 479a0e3 Support for CoreFPGA-3. by Ralf Baechle · 19 years ago
  22. fd0197d Implement get_system_type() for Qemu to get procfs-enabled kernels to link. by Ralf Baechle · 20 years ago
  23. 797798c A little more Kconfig untangeling. by Ralf Baechle · 20 years ago
  24. d9912d8 Inlining will result in back-to-back mtc0 mfc0 instructions. Break the by Ralf Baechle · 20 years ago
  25. d3ffd08 Use pr_debug instead of homegrown debug print macros. by Ralf Baechle · 20 years ago
  26. 0ae1279 Send CONFIG_VTAG_ICACHE back into it's cold grave. by Ralf Baechle · 20 years ago
  27. c8094b5 Get rid of the nonsense in the CONFIG_CPU_HAS_PREFETCH block. by Ralf Baechle · 20 years ago
  28. 8d9c626 sys is only used for native o32 ... by Ralf Baechle · 20 years ago
  29. 075e750 R4600 has 32 FPRs. by Thiemo Seufer · 20 years ago
  30. 23fbee9 Support for Toshiba's RBHMA4500 eval board for the TX4938. by Ralf Baechle · 20 years ago
  31. 1329404 Void functions shouldn't return values by Ladislav Michl · 20 years ago
  32. 154b500 commit 1858f72fa2e2f63e62114a9bd40c8e68468d8c5e by Ralf Baechle · 20 years ago
  33. 3ce86ee Au1x PM fixes. by Pete Popov · 20 years ago
  34. 7ab1261 Drop IP27 support for Qlogic ISP. This driver is buggy and has been by Ralf Baechle · 20 years ago
  35. ae1b3d5 Make sure that the processor is actually online or die spectacularly. by Ralf Baechle · 20 years ago
  36. 1d40cfc Avoid SMP cacheflushes. This is a minor optimization of startup but by Ralf Baechle · 20 years ago
  37. bdf21b1 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. by Pete Popov · 20 years ago
  38. e01402b More AP / SP bits for the 34K, the Malta bits and things. Still wants by Ralf Baechle · 20 years ago
  39. 7e35952 Move Origin crapola into a machine-specific header file. by Ralf Baechle · 20 years ago
  40. a0c3a5b Prevent gcc from optimizing a few functions away completly. by Ralf Baechle · 20 years ago
  41. 8f40611 Detect the MIPS R2 vectored interrupt, external interrupt controller by Ralf Baechle · 20 years ago
  42. 55d04df New kernel option nowait allows disabling the use of the wait instruction. by Ralf Baechle · 20 years ago
  43. 569f75b Use an irq_enable_hazard hazard barrier in unmask_mips_irq. This by Ralf Baechle · 20 years ago
  44. 7db36c8 Add inotify syscalls for MIPS. by Ralf Baechle · 20 years ago
  45. ec74e36 Mark a few variables __read_mostly. by Ralf Baechle · 20 years ago
  46. cc61c1f MIPS R2 instruction hazard handling. by Ralf Baechle · 20 years ago
  47. bbc7f22 Detect the 34K. by Ralf Baechle · 20 years ago
  48. 079ef8b Generate code for MIPS32 / MIPS64 Release 2 if configured for one of by Ralf Baechle · 20 years ago
  49. 1e5f1ca MIPS 32/64 R2 config option. by Ralf Baechle · 20 years ago
  50. e5de3b4 In pcibios_enable_resources go back to handling all PCI_NUM_RESOURCES by Ralf Baechle · 20 years ago
  51. e80de85 Use Kconfig.preempt. by Ralf Baechle · 20 years ago
  52. 6008026 Define kmap_atomic_pfn() for MIPS. by Ralf Baechle · 20 years ago
  53. 129bc8f Setup_frame is now returning a success value. by Ralf Baechle · 20 years ago
  54. b490ff4 Temporary hack for Qemu and MIPSsim until they get a proper ELF loader. by Ralf Baechle · 20 years ago
  55. 3ef33e6 Date: Fri Jul 8 20:10:17 2005 +0000 by Ralf Baechle · 20 years ago
  56. 4552074 IP30 Identification. by Thiemo Seufer · 20 years ago
  57. 85f14bf ... and it isn't a canonicalized triplet but just the n-plet used to by Thiemo Seufer · 20 years ago
  58. 73f74e2 Grep deesn't like shell-style matching... by Thiemo Seufer · 20 years ago
  59. f425a6d Hack to make compiles for the other endianness easier. by Thiemo Seufer · 20 years ago
  60. 6e760c8 Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. by Ralf Baechle · 20 years ago
  61. ca4973d Don't redeclare ll_local_timer_interrupt. by Ralf Baechle · 20 years ago
  62. 50bd2c7 Brian Murphy says: by Thiemo Seufer · 20 years ago
  63. ec125c1 Code cleanup, thanks Brian Murphy. by Thiemo Seufer · 20 years ago
  64. a5fc9c0 Use physical addresses at the interface level, letting drivers remap by Maciej W. Rozycki · 20 years ago
  65. 2c93e12 Avoid tlbw* hazards for the R4600/R4700/R5000. by Maciej W. Rozycki · 20 years ago
  66. c3455b0 Inline ioremap() calls for constant addresses that map to KSEG1. by Maciej W. Rozycki · 20 years ago
  67. c134a5e Avoid defining variables in the middle of a block which breaks older compilers. by Ralf Baechle · 20 years ago
  68. 4c0a2d4 Fix the diagnostic dump for the XTLB refill handler. by Maciej W. Rozycki · 20 years ago
  69. 41986a6 Fix a diagnostic message. by Maciej W. Rozycki · 20 years ago
  70. 362b1d5 Conversion to plat_setup() for TX4927 also. by Ralf Baechle · 20 years ago
  71. 01d42ab Using get_nasid() to find the console node will blow up nicely if by Ralf Baechle · 20 years ago
  72. c4559f6 Always use ".set mips3" rather than select between "mips2" or "mips3" by Maciej W. Rozycki · 20 years ago
  73. 69c75fb Actual handlers for bus errors for Pmax and 3min. by Maciej W. Rozycki · 20 years ago
  74. 64dac50 System-specific handling of bus errors for DECstation variations by Maciej W. Rozycki · 20 years ago
  75. 3b2396d Use correct names for bits in the R3k cp0.status register. by Maciej W. Rozycki · 20 years ago
  76. c6ad7b7 Use macros for the RM7k cp0.config bits instead of magic numbers. by Maciej W. Rozycki · 20 years ago
  77. 8a185d1 Fix types for firmware arguments. Don't define unneeded messages. by Maciej W. Rozycki · 20 years ago
  78. 260c967 Mark __die() "noreturn" for real. by Maciej W. Rozycki · 20 years ago
  79. 3bd4c90 Deal with the bloody KSEG vs CKSEG horror... by Maciej W. Rozycki · 20 years ago
  80. 902d21d There is NO port I/O space on the DECstation. Minor clean-ups. by Maciej W. Rozycki · 20 years ago
  81. 02416dc Redo RM9000 workaround which along with other DSP ASE changes was by Ralf Baechle · 20 years ago
  82. aac8aa7 Enable a suitable ISA for the assembler around ll/sc so that code by Maciej W. Rozycki · 20 years ago
  83. fded2e5 Optimize R3k TLB Load/Store/Modified handlers, by scheduling by Maciej W. Rozycki · 20 years ago
  84. d925c26 Fill R3k load delay slots properly. by Maciej W. Rozycki · 20 years ago
  85. 9678e28 Only dump instructions actually emitted. by Maciej W. Rozycki · 20 years ago
  86. 68e4a86 This interrupt is *always* handled -- MIPS_BE_DISCARD just means by Maciej W. Rozycki · 20 years ago
  87. d5b6f1d For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style) by Maciej W. Rozycki · 20 years ago
  88. 81731f7 The DbAu1500 board also support big endian. Gee, imagine that. by Steven J. Hill · 20 years ago
  89. e50c0a8 Support the MIPS32 / MIPS64 DSP ASE. by Ralf Baechle · 20 years ago
  90. 10f650d 64-bit fixes for Alchemy code ;) by Ralf Baechle · 20 years ago
  91. 149f60b When building for Atlas, Malta or SEAD convert the kernel to srecs by default. by Ralf Baechle · 20 years ago
  92. f8280c8 Fix tasteless #ifdef mess in audit_arch(), minor cleanups. by Ralf Baechle · 20 years ago
  93. 4a99d1e Now that a struct is the only member left in struct by Ralf Baechle · 20 years ago
  94. baee502 Get rid of the eir struct mips_fpu_emulator_private member. It's by Ralf Baechle · 20 years ago
  95. 1d74f6b __compute_return_epc() uses CFC1 instruction which might result in a by Ralf Baechle · 20 years ago
  96. d547c5c sys_nfsservctl() needs translation. by Maciej W. Rozycki · 20 years ago
  97. b382fe8 No point in checking cpu_has_tlb before we've computed the CPU options. by Ralf Baechle · 20 years ago
  98. 4194318 Cleanup decoding of MIPSxx config registers. by Ralf Baechle · 20 years ago
  99. cd21dfc Fix preemption and SMP problems in the FP emulator code. by Ralf Baechle · 20 years ago
  100. 63b2d2f Handle _PAGE_DIRTY correctly for CONFIG_64BIT_PHYS_ADDR on 32bit CPUs. by Thiemo Seufer · 20 years ago