| commit | 164306e779de522efba7df637618a8eeed9e37ac | [log] [tgz] |
|---|---|---|
| author | Vladimir Marko <vmarko@google.com> | Tue Mar 15 14:57:32 2016 +0000 |
| committer | Vladimir Marko <vmarko@google.com> | Tue Mar 15 15:25:39 2016 +0000 |
| tree | 6ceddd6879870272d6bef39026c36212ce6854df | |
| parent | 5681b6638b0001c62d02795b0853e2e82787edf1 [diff] |
Optimizing: Improve shift simplification, x >>> 64. Simplify shifts by a multiple of bit size, not just 0. ARM codegen does not expect to see such shifts and it is guarding against them with a DCHECK(). Bug: 27638111 Change-Id: I3ae8383d7edefa0facd375ce511e7a226d5468a1