commit | 24ad203aa2d6e82bbb74a96cb330a31815b5c6c4 | [log] [tgz] |
---|---|---|
author | Anton Kirilov <anton.kirilov@linaro.org> | Fri Jun 10 17:46:12 2016 +0100 |
committer | Meninblack007 <sanyam.53jain@gmail.com> | Thu Jun 15 18:13:26 2017 +0530 |
tree | d9de96b48587fcd120f1f5c5d197184a7ebeb836 | |
parent | 7e773ee4321e310db9f8cef4cf8d48976abc69fd [diff] |
ARM64: Ensure stricter alignment when loading and storing register pairs The impetus for this change is the fact that loads that cross a 64 byte boundary and stores that cross a 16 byte boundary are a performance issue on Cortex-A57 and A72. Change-Id: I81263dc72272192ad2d190b741a955f175880461