Restore callee save registers.
The callee saves weren't all being restored as an optimiation, but
this breaks compaction if register promotion is enabled. The reason
for this is that these registers may contain references which the
GC will update.
Change-Id: I810f56b4ed1f92c632155e30c0838269cb95f3c5
diff --git a/runtime/arch/arm/quick_entrypoints_arm.S b/runtime/arch/arm/quick_entrypoints_arm.S
index d073177..c98b764 100644
--- a/runtime/arch/arm/quick_entrypoints_arm.S
+++ b/runtime/arch/arm/quick_entrypoints_arm.S
@@ -67,16 +67,16 @@
.endm
.macro RESTORE_REF_ONLY_CALLEE_SAVE_FRAME
- ldr lr, [sp, #28] @ restore lr for return
- add sp, #32 @ unwind stack
+ add sp, #4 @ bottom word holds Method*
+ pop {r5-r8, r10-r11, lr} @ 7 words of callee saves
.cfi_adjust_cfa_offset -32
.endm
.macro RESTORE_REF_ONLY_CALLEE_SAVE_FRAME_AND_RETURN
- ldr lr, [sp, #28] @ restore lr for return
- add sp, #32 @ unwind stack
+ add sp, #4 @ bottom word holds Method*
+ pop {r5-r8, r10-r11, lr} @ 7 words of callee saves
.cfi_adjust_cfa_offset -32
- bx lr @ return
+ bx lr @ return
.endm
/*
@@ -103,10 +103,8 @@
.endm
.macro RESTORE_REF_AND_ARGS_CALLEE_SAVE_FRAME
- ldr r1, [sp, #8] @ restore non-callee save r1
- ldrd r2, [sp, #12] @ restore non-callee saves r2-r3
- ldr lr, [sp, #44] @ restore lr
- add sp, #48 @ rewind sp
+ add sp, #8 @ rewind sp
+ pop {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves
.cfi_adjust_cfa_offset -48
.endm
diff --git a/runtime/arch/mips/quick_entrypoints_mips.S b/runtime/arch/mips/quick_entrypoints_mips.S
index 7780bb3..897aaf4 100644
--- a/runtime/arch/mips/quick_entrypoints_mips.S
+++ b/runtime/arch/mips/quick_entrypoints_mips.S
@@ -88,15 +88,29 @@
.endm
.macro RESTORE_REF_ONLY_CALLEE_SAVE_FRAME
- lw $gp, 52($sp)
lw $ra, 60($sp)
+ lw $s8, 56($sp)
+ lw $gp, 52($sp)
+ lw $s7, 48($sp)
+ lw $s6, 44($sp)
+ lw $s5, 40($sp)
+ lw $s4, 36($sp)
+ lw $s3, 32($sp)
+ lw $s2, 28($sp)
addiu $sp, $sp, 64
.cfi_adjust_cfa_offset -64
.endm
.macro RESTORE_REF_ONLY_CALLEE_SAVE_FRAME_AND_RETURN
- lw $gp, 52($sp)
lw $ra, 60($sp)
+ lw $s8, 56($sp)
+ lw $gp, 52($sp)
+ lw $s7, 48($sp)
+ lw $s6, 44($sp)
+ lw $s5, 40($sp)
+ lw $s4, 36($sp)
+ lw $s3, 32($sp)
+ lw $s2, 28($sp)
jr $ra
addiu $sp, $sp, 64
.cfi_adjust_cfa_offset -64
@@ -138,11 +152,18 @@
.endm
.macro RESTORE_REF_AND_ARGS_CALLEE_SAVE_FRAME
- lw $ra, 60($sp) # restore $ra
- lw $gp, 52($sp) # restore $gp
- lw $a1, 4($sp) # restore non-callee save $a1
- lw $a2, 8($sp) # restore non-callee save $a2
- lw $a3, 12($sp) # restore non-callee save $a3
+ lw $ra, 60($sp)
+ lw $s8, 56($sp)
+ lw $gp, 52($sp)
+ lw $s7, 48($sp)
+ lw $s6, 44($sp)
+ lw $s5, 40($sp)
+ lw $s4, 36($sp)
+ lw $s3, 32($sp)
+ lw $s2, 28($sp)
+ lw $a3, 12($sp)
+ lw $a2, 8($sp)
+ lw $a1, 4($sp)
addiu $sp, $sp, 64 # pop frame
.cfi_adjust_cfa_offset -64
.endm
diff --git a/runtime/arch/x86/quick_entrypoints_x86.S b/runtime/arch/x86/quick_entrypoints_x86.S
index 9fce72f..d7e1be8 100644
--- a/runtime/arch/x86/quick_entrypoints_x86.S
+++ b/runtime/arch/x86/quick_entrypoints_x86.S
@@ -41,7 +41,10 @@
END_MACRO
MACRO0(RESTORE_REF_ONLY_CALLEE_SAVE_FRAME)
- addl MACRO_LITERAL(28), %esp // Unwind stack up to return address
+ addl MACRO_LITERAL(16), %esp // Unwind stack up to return address
+ POP ebp // Restore callee saves (ebx is saved/restored by the upcall)
+ POP esi
+ POP edi
.cfi_adjust_cfa_offset -28
END_MACRO