More target-independence
Continuing to move target-specific code from the Arm
code generator into the independent realm. This will be
done in multiple small steps.
In this CL, the focus is on unifying the LIR data structure and
various enums that don't really need to be target specific. Also
creates two new shared source files: GenCommon.cc (to hold
top-level code generation functions) and GenInvoke.cc (which
is likely to be shared only by the Arm and Mips targets).
Also added is a makefile hack to build for Mips (which we'll
eventually remove when the compiler support multiple targets
via the command line) and various minor cleanups.
Overall, this CL moves more than 3,000 lines of code from
target dependent to target independent.
Change-Id: I431ca4ae728100ed7d0e9d83a966a3f789f731b1
diff --git a/src/compiler/codegen/RallocUtil.cc b/src/compiler/codegen/RallocUtil.cc
index 77fb23b..bb2abba 100644
--- a/src/compiler/codegen/RallocUtil.cc
+++ b/src/compiler/codegen/RallocUtil.cc
@@ -76,7 +76,7 @@
}
}
-STATIC void dumpRegPool(RegisterInfo* p, int numRegs)
+void dumpRegPool(RegisterInfo* p, int numRegs)
{
int i;
LOG(INFO) << "================================================";
@@ -124,7 +124,7 @@
clobberBody(cUnit, oatGetRegInfo(cUnit, reg));
}
-STATIC void clobberSRegBody(RegisterInfo* p, int numRegs, int sReg)
+void clobberSRegBody(RegisterInfo* p, int numRegs, int sReg)
{
int i;
for (i=0; i< numRegs; i++) {
@@ -174,7 +174,7 @@
* even/odd allocation, but go ahead and allocate anything if not
* available. If nothing's available, return -1.
*/
-STATIC int allocPreservedSingle(CompilationUnit* cUnit, int sReg, bool even)
+int allocPreservedSingle(CompilationUnit* cUnit, int sReg, bool even)
{
int res = -1;
RegisterInfo* FPRegs = cUnit->regPool->FPRegs;
@@ -202,7 +202,7 @@
* allocate if we can't meet the requirements for the pair of
* sReg<=sX[even] & (sReg+1)<= sX+1.
*/
-STATIC int allocPreservedDouble(CompilationUnit* cUnit, int sReg)
+int allocPreservedDouble(CompilationUnit* cUnit, int sReg)
{
int res = -1; // Assume failure
// Should be promoting based on initial sReg set
@@ -274,8 +274,8 @@
return res;
}
-STATIC int allocTempBody(CompilationUnit* cUnit, RegisterInfo* p, int numRegs,
- int* nextTemp, bool required)
+int allocTempBody(CompilationUnit* cUnit, RegisterInfo* p, int numRegs,
+ int* nextTemp, bool required)
{
int i;
int next = *nextTemp;
@@ -389,7 +389,7 @@
&cUnit->regPool->nextFPReg, true);
}
-STATIC RegisterInfo* allocLiveBody(RegisterInfo* p, int numRegs, int sReg)
+RegisterInfo* allocLiveBody(RegisterInfo* p, int numRegs, int sReg)
{
int i;
if (sReg == -1)
@@ -404,8 +404,7 @@
return NULL;
}
-STATIC RegisterInfo* allocLive(CompilationUnit* cUnit, int sReg,
- int regClass)
+RegisterInfo* allocLive(CompilationUnit* cUnit, int sReg, int regClass)
{
RegisterInfo* res = NULL;
switch(regClass) {
@@ -537,7 +536,7 @@
resetDefBody(oatGetRegInfo(cUnit, reg));
}
-STATIC void nullifyRange(CompilationUnit* cUnit, LIR *start, LIR *finish,
+void nullifyRange(CompilationUnit* cUnit, LIR *start, LIR *finish,
int sReg1, int sReg2)
{
if (start && finish) {
@@ -557,7 +556,7 @@
* sequence.
*/
extern void oatMarkDef(CompilationUnit* cUnit, RegLocation rl,
- LIR *start, LIR *finish)
+ LIR *start, LIR *finish)
{
DCHECK(!rl.wide);
DCHECK(start && start->next);
@@ -573,7 +572,7 @@
* sequence.
*/
extern void oatMarkDefWide(CompilationUnit* cUnit, RegLocation rl,
- LIR *start, LIR *finish)
+ LIR *start, LIR *finish)
{
DCHECK(rl.wide);
DCHECK(start && start->next);
@@ -584,8 +583,7 @@
p->defEnd = finish;
}
-extern RegLocation oatWideToNarrow(CompilationUnit* cUnit,
- RegLocation rl)
+extern RegLocation oatWideToNarrow(CompilationUnit* cUnit, RegLocation rl)
{
DCHECK(rl.wide);
if (rl.location == kLocPhysReg) {
@@ -658,7 +656,7 @@
}
// Make sure nothing is live and dirty
-STATIC void flushAllRegsBody(CompilationUnit* cUnit, RegisterInfo* info,
+void flushAllRegsBody(CompilationUnit* cUnit, RegisterInfo* info,
int numRegs)
{
int i;
@@ -684,7 +682,7 @@
//TUNING: rewrite all of this reg stuff. Probably use an attribute table
-STATIC bool regClassMatches(int regClass, int reg)
+bool regClassMatches(int regClass, int reg)
{
if (regClass == kAnyReg) {
return true;
@@ -764,7 +762,7 @@
info->inUse = true;
}
-STATIC void copyRegInfo(CompilationUnit* cUnit, int newReg, int oldReg)
+void copyRegInfo(CompilationUnit* cUnit, int newReg, int oldReg)
{
RegisterInfo* newInfo = oatGetRegInfo(cUnit, newReg);
RegisterInfo* oldInfo = oatGetRegInfo(cUnit, oldReg);
@@ -835,8 +833,7 @@
}
/* see comments for updateLoc */
-extern RegLocation oatUpdateLocWide(CompilationUnit* cUnit,
- RegLocation loc)
+extern RegLocation oatUpdateLocWide(CompilationUnit* cUnit, RegLocation loc)
{
DCHECK(loc.wide);
DCHECK(oatCheckCorePoolSanity(cUnit));
@@ -889,8 +886,7 @@
/* For use in cases we don't know (or care) width */
-extern RegLocation oatUpdateRawLoc(CompilationUnit* cUnit,
- RegLocation loc)
+extern RegLocation oatUpdateRawLoc(CompilationUnit* cUnit, RegLocation loc)
{
if (loc.wide)
return oatUpdateLocWide(cUnit, loc);
@@ -898,8 +894,8 @@
return oatUpdateLoc(cUnit, loc);
}
-STATIC RegLocation evalLocWide(CompilationUnit* cUnit, RegLocation loc,
- int regClass, bool update)
+RegLocation evalLocWide(CompilationUnit* cUnit, RegLocation loc,
+ int regClass, bool update)
{
DCHECK(loc.wide);
int newRegs;
@@ -1017,7 +1013,7 @@
/* USE SSA names to count references of base Dalvik vRegs. */
void oatCountRefs(CompilationUnit *cUnit, BasicBlock* bb,
- RefCounts* coreCounts, RefCounts* fpCounts)
+ RefCounts* coreCounts, RefCounts* fpCounts)
{
MIR* mir;
if (bb->blockType != kDalvikByteCode && bb->blockType != kEntryBlock &&