Delete throw launchpads.
Bug: 13170824
Change-Id: I9d5834f5a66f5eb00f2ac80774e8c27dea99949e
diff --git a/compiler/dex/quick/arm/codegen_arm.h b/compiler/dex/quick/arm/codegen_arm.h
index b0bc11d..a89b307 100644
--- a/compiler/dex/quick/arm/codegen_arm.h
+++ b/compiler/dex/quick/arm/codegen_arm.h
@@ -126,8 +126,6 @@
RegLocation rl_src2);
void GenXorLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2);
- LIR* GenRegMemCheck(ConditionCode c_code, RegStorage reg1, RegStorage base, int offset,
- ThrowKind kind);
RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
diff --git a/compiler/dex/quick/arm/int_arm.cc b/compiler/dex/quick/arm/int_arm.cc
index d5b34a5..940ebc2 100644
--- a/compiler/dex/quick/arm/int_arm.cc
+++ b/compiler/dex/quick/arm/int_arm.cc
@@ -314,11 +314,11 @@
/*
* A common use of OpCmpImmBranch is for null checks, and using the Thumb 16-bit
* compare-and-branch if zero is ideal if it will reach. However, because null checks
- * branch forward to a launch pad, they will frequently not reach - and thus have to
+ * branch forward to a slow path, they will frequently not reach - and thus have to
* be converted to a long form during assembly (which will trigger another assembly
* pass). Here we estimate the branch distance for checks, and if large directly
* generate the long form in an attempt to avoid an extra assembly pass.
- * TODO: consider interspersing launchpads in code following unconditional branches.
+ * TODO: consider interspersing slowpaths in code following unconditional branches.
*/
bool skip = ((target != NULL) && (target->opcode == kPseudoThrowTarget));
skip &= ((cu_->code_item->insns_size_in_code_units_ - current_dalvik_offset_) > 64);
@@ -608,12 +608,6 @@
return true;
}
-LIR* ArmMir2Lir::GenRegMemCheck(ConditionCode c_code, RegStorage reg1, RegStorage base,
- int offset, ThrowKind kind) {
- LOG(FATAL) << "Unexpected use of GenRegMemCheck for Arm";
- return NULL;
-}
-
RegLocation ArmMir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2, bool is_div, bool check_zero) {
LOG(FATAL) << "Unexpected use of GenDivRem for Arm";
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc
index 6e6b8f0..93b1ef1 100644
--- a/compiler/dex/quick/codegen_util.cc
+++ b/compiler/dex/quick/codegen_util.cc
@@ -926,7 +926,6 @@
mir_graph_(mir_graph),
switch_tables_(arena, 4, kGrowableArraySwitchTables),
fill_array_data_(arena, 4, kGrowableArrayFillArrayData),
- throw_launchpads_(arena, 2048, kGrowableArrayThrowLaunchPads),
suspend_launchpads_(arena, 4, kGrowableArraySuspendLaunchPads),
tempreg_info_(arena, 20, kGrowableArrayMisc),
reginfo_map_(arena, 64, kGrowableArrayMisc),
diff --git a/compiler/dex/quick/gen_common.cc b/compiler/dex/quick/gen_common.cc
index 6781a9b..5f6a31d 100644
--- a/compiler/dex/quick/gen_common.cc
+++ b/compiler/dex/quick/gen_common.cc
@@ -42,22 +42,6 @@
barrier->u.m.def_mask = ENCODE_ALL;
}
-LIR* Mir2Lir::GenImmedCheck(ConditionCode c_code, RegStorage reg, int imm_val, ThrowKind kind) {
- LIR* tgt;
- LIR* branch;
- if (c_code == kCondAl) {
- tgt = RawLIR(0, kPseudoThrowTarget, kind, current_dalvik_offset_, RegStorage::kInvalidRegVal,
- imm_val);
- branch = OpUnconditionalBranch(tgt);
- } else {
- tgt = RawLIR(0, kPseudoThrowTarget, kind, current_dalvik_offset_, reg.GetReg(), imm_val);
- branch = OpCmpImmBranch(c_code, reg, imm_val, tgt);
- }
- // Remember branch target - will process later
- throw_launchpads_.Insert(tgt);
- return branch;
-}
-
void Mir2Lir::GenDivZeroException() {
LIR* branch = OpUnconditionalBranch(nullptr);
AddDivZeroCheckSlowPath(branch);
@@ -210,17 +194,6 @@
}
}
-/* Perform check on two registers */
-LIR* Mir2Lir::GenRegRegCheck(ConditionCode c_code, RegStorage reg1, RegStorage reg2,
- ThrowKind kind) {
- LIR* tgt = RawLIR(0, kPseudoThrowTarget, kind, current_dalvik_offset_, reg1.GetReg(),
- reg2.GetReg());
- LIR* branch = OpCmpBranch(c_code, reg1, reg2, tgt);
- // Remember branch target - will process later
- throw_launchpads_.Insert(tgt);
- return branch;
-}
-
void Mir2Lir::GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1,
RegLocation rl_src2, LIR* taken,
LIR* fall_through) {
@@ -728,31 +701,6 @@
}
}
-void Mir2Lir::HandleThrowLaunchPads() {
- int num_elems = throw_launchpads_.Size();
- for (int i = 0; i < num_elems; i++) {
- ResetRegPool();
- ResetDefTracking();
- LIR* lab = throw_launchpads_.Get(i);
- current_dalvik_offset_ = lab->operands[1];
- AppendLIR(lab);
- ThreadOffset<4> func_offset(-1);
- int v1 = lab->operands[2];
- switch (lab->operands[0]) {
- case kThrowNoSuchMethod:
- OpRegCopy(TargetReg(kArg0), RegStorage::Solo32(v1));
- func_offset =
- QUICK_ENTRYPOINT_OFFSET(4, pThrowNoSuchMethod);
- break;
- default:
- LOG(FATAL) << "Unexpected throw kind: " << lab->operands[0];
- }
- ClobberCallerSave();
- RegStorage r_tgt = CallHelperSetup(func_offset);
- CallHelper(r_tgt, func_offset, true /* MarkSafepointPC */, true /* UseLink */);
- }
-}
-
void Mir2Lir::GenIGet(MIR* mir, int opt_flags, OpSize size,
RegLocation rl_dest, RegLocation rl_obj, bool is_long_or_double,
bool is_object) {
diff --git a/compiler/dex/quick/gen_invoke.cc b/compiler/dex/quick/gen_invoke.cc
index 758096b..465e196 100644
--- a/compiler/dex/quick/gen_invoke.cc
+++ b/compiler/dex/quick/gen_invoke.cc
@@ -34,10 +34,10 @@
* and "op" calls may be used here.
*/
-void Mir2Lir::AddIntrinsicLaunchpad(CallInfo* info, LIR* branch, LIR* resume) {
- class IntrinsicLaunchpadPath : public Mir2Lir::LIRSlowPath {
+void Mir2Lir::AddIntrinsicSlowPath(CallInfo* info, LIR* branch, LIR* resume) {
+ class IntrinsicSlowPathPath : public Mir2Lir::LIRSlowPath {
public:
- IntrinsicLaunchpadPath(Mir2Lir* m2l, CallInfo* info, LIR* branch, LIR* resume = nullptr)
+ IntrinsicSlowPathPath(Mir2Lir* m2l, CallInfo* info, LIR* branch, LIR* resume = nullptr)
: LIRSlowPath(m2l, info->offset, branch, resume), info_(info) {
}
@@ -57,7 +57,7 @@
CallInfo* const info_;
};
- AddSlowPath(new (arena_) IntrinsicLaunchpadPath(this, info, branch, resume));
+ AddSlowPath(new (arena_) IntrinsicSlowPathPath(this, info, branch, resume));
}
/*
@@ -1094,7 +1094,7 @@
MarkPossibleNullPointerException(info->opt_flags);
LoadWordDisp(rl_obj.reg, value_offset, reg_ptr);
if (range_check) {
- // Set up a launch pad to allow retry in case of bounds violation */
+ // Set up a slow path to allow retry in case of bounds violation */
OpRegReg(kOpCmp, rl_idx.reg, reg_max);
FreeTemp(reg_max);
range_check_branch = OpCondBranch(kCondUge, nullptr);
@@ -1141,7 +1141,7 @@
if (range_check) {
DCHECK(range_check_branch != nullptr);
info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've already null checked.
- AddIntrinsicLaunchpad(info, range_check_branch);
+ AddIntrinsicSlowPath(info, range_check_branch);
}
return true;
}
@@ -1352,7 +1352,7 @@
DCHECK(high_code_point_branch != nullptr);
LIR* resume_tgt = NewLIR0(kPseudoTargetLabel);
info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked.
- AddIntrinsicLaunchpad(info, high_code_point_branch, resume_tgt);
+ AddIntrinsicSlowPath(info, high_code_point_branch, resume_tgt);
} else {
DCHECK_EQ(mir_graph_->ConstantValue(rl_char) & ~0xFFFF, 0);
DCHECK(high_code_point_branch == nullptr);
@@ -1384,7 +1384,7 @@
info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked.
// TUNING: check if rl_cmp.s_reg_low is already null checked
LIR* cmp_null_check_branch = OpCmpImmBranch(kCondEq, reg_cmp, 0, nullptr);
- AddIntrinsicLaunchpad(info, cmp_null_check_branch);
+ AddIntrinsicSlowPath(info, cmp_null_check_branch);
// NOTE: not a safepoint
if (cu_->instruction_set != kX86 && cu_->instruction_set != kX86_64) {
OpReg(kOpBlx, r_tgt);
diff --git a/compiler/dex/quick/mips/codegen_mips.h b/compiler/dex/quick/mips/codegen_mips.h
index 40641d6..da65f34 100644
--- a/compiler/dex/quick/mips/codegen_mips.h
+++ b/compiler/dex/quick/mips/codegen_mips.h
@@ -126,8 +126,6 @@
RegLocation rl_src2);
void GenXorLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2);
- LIR* GenRegMemCheck(ConditionCode c_code, RegStorage reg1, RegStorage base, int offset,
- ThrowKind kind);
RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
diff --git a/compiler/dex/quick/mips/int_mips.cc b/compiler/dex/quick/mips/int_mips.cc
index 2375720..cb999af 100644
--- a/compiler/dex/quick/mips/int_mips.cc
+++ b/compiler/dex/quick/mips/int_mips.cc
@@ -221,12 +221,6 @@
UNIMPLEMENTED(FATAL) << "Need codegen for fused long cmp branch";
}
-LIR* MipsMir2Lir::GenRegMemCheck(ConditionCode c_code, RegStorage reg1, RegStorage base,
- int offset, ThrowKind kind) {
- LOG(FATAL) << "Unexpected use of GenRegMemCheck for Arm";
- return NULL;
-}
-
RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegStorage reg1, RegStorage reg2,
bool is_div) {
NewLIR2(kMipsDiv, reg1.GetReg(), reg2.GetReg());
diff --git a/compiler/dex/quick/mir_to_lir.cc b/compiler/dex/quick/mir_to_lir.cc
index 6fcdf70..13e7a2e 100644
--- a/compiler/dex/quick/mir_to_lir.cc
+++ b/compiler/dex/quick/mir_to_lir.cc
@@ -1097,8 +1097,6 @@
cu_->NewTimingSplit("Launchpads");
HandleSuspendLaunchPads();
-
- HandleThrowLaunchPads();
}
//
diff --git a/compiler/dex/quick/mir_to_lir.h b/compiler/dex/quick/mir_to_lir.h
index 1f69eb5..393a472 100644
--- a/compiler/dex/quick/mir_to_lir.h
+++ b/compiler/dex/quick/mir_to_lir.h
@@ -554,12 +554,11 @@
RegisterInfo* GetRegInfo(int reg);
// Shared by all targets - implemented in gen_common.cc.
- void AddIntrinsicLaunchpad(CallInfo* info, LIR* branch, LIR* resume = nullptr);
+ void AddIntrinsicSlowPath(CallInfo* info, LIR* branch, LIR* resume = nullptr);
bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
RegLocation rl_src, RegLocation rl_dest, int lit);
bool HandleEasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit);
void HandleSuspendLaunchPads();
- void HandleThrowLaunchPads();
void HandleSlowPaths();
void GenBarrier();
void GenDivZeroException();
@@ -576,7 +575,6 @@
LIR* GenImmedCheck(ConditionCode c_code, RegStorage reg, int imm_val, ThrowKind kind);
LIR* GenNullCheck(RegStorage m_reg, int opt_flags);
LIR* GenExplicitNullCheck(RegStorage m_reg, int opt_flags);
- LIR* GenRegRegCheck(ConditionCode c_code, RegStorage reg1, RegStorage reg2, ThrowKind kind);
void GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1,
RegLocation rl_src2, LIR* taken, LIR* fall_through);
void GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src,
@@ -935,8 +933,6 @@
RegLocation rl_src2) = 0;
virtual void GenXorLong(Instruction::Code, RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
- virtual LIR* GenRegMemCheck(ConditionCode c_code, RegStorage reg1, RegStorage base,
- int offset, ThrowKind kind) = 0;
virtual RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi,
bool is_div) = 0;
virtual RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit,
@@ -1246,7 +1242,6 @@
MIRGraph* const mir_graph_;
GrowableArray<SwitchTable*> switch_tables_;
GrowableArray<FillArrayData*> fill_array_data_;
- GrowableArray<LIR*> throw_launchpads_;
GrowableArray<LIR*> suspend_launchpads_;
GrowableArray<RegisterInfo*> tempreg_info_;
GrowableArray<RegisterInfo*> reginfo_map_;
diff --git a/compiler/dex/quick/x86/call_x86.cc b/compiler/dex/quick/x86/call_x86.cc
index 729b30d..5ed5e4e 100644
--- a/compiler/dex/quick/x86/call_x86.cc
+++ b/compiler/dex/quick/x86/call_x86.cc
@@ -239,7 +239,7 @@
// mov esp, ebp
// in case a signal comes in that's not using an alternate signal stack and the large frame may
// have moved us outside of the reserved area at the end of the stack.
- // cmp rX86_SP, fs:[stack_end_]; jcc throw_launchpad
+ // cmp rX86_SP, fs:[stack_end_]; jcc throw_slowpath
OpRegThreadMem(kOpCmp, rX86_SP, Thread::StackEndOffset<4>());
LIR* branch = OpCondBranch(kCondUlt, nullptr);
AddSlowPath(new(arena_)StackOverflowSlowPath(this, branch, frame_size_ - 4));
diff --git a/compiler/dex/quick/x86/codegen_x86.h b/compiler/dex/quick/x86/codegen_x86.h
index b802591..fb61627 100644
--- a/compiler/dex/quick/x86/codegen_x86.h
+++ b/compiler/dex/quick/x86/codegen_x86.h
@@ -127,10 +127,6 @@
RegLocation rl_src2);
void GenXorLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2);
- LIR* GenRegMemCheck(ConditionCode c_code, RegStorage reg1, RegStorage base, int offset,
- ThrowKind kind);
- LIR* GenMemImmedCheck(ConditionCode c_code, RegStorage base, int offset, int check_value,
- ThrowKind kind);
// TODO: collapse reg_lo, reg_hi
RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
diff --git a/compiler/dex/quick/x86/int_x86.cc b/compiler/dex/quick/x86/int_x86.cc
index 84325b4..5005862 100644
--- a/compiler/dex/quick/x86/int_x86.cc
+++ b/compiler/dex/quick/x86/int_x86.cc
@@ -24,34 +24,6 @@
namespace art {
/*
- * Perform register memory operation.
- */
-LIR* X86Mir2Lir::GenRegMemCheck(ConditionCode c_code, RegStorage reg1, RegStorage base,
- int offset, ThrowKind kind) {
- LIR* tgt = RawLIR(0, kPseudoThrowTarget, kind,
- current_dalvik_offset_, reg1.GetReg(), base.GetReg(), offset);
- OpRegMem(kOpCmp, reg1, base, offset);
- LIR* branch = OpCondBranch(c_code, tgt);
- // Remember branch target - will process later
- throw_launchpads_.Insert(tgt);
- return branch;
-}
-
-/*
- * Perform a compare of memory to immediate value
- */
-LIR* X86Mir2Lir::GenMemImmedCheck(ConditionCode c_code, RegStorage base, int offset,
- int check_value, ThrowKind kind) {
- LIR* tgt = RawLIR(0, kPseudoThrowTarget, kind,
- current_dalvik_offset_, base.GetReg(), check_value, 0);
- NewLIR3(IS_SIMM8(check_value) ? kX86Cmp32MI8 : kX86Cmp32MI, base.GetReg(), offset, check_value);
- LIR* branch = OpCondBranch(c_code, tgt);
- // Remember branch target - will process later
- throw_launchpads_.Insert(tgt);
- return branch;
-}
-
-/*
* Compare two 64-bit values
* x = y return 0
* x < y return -1
diff --git a/compiler/dex/quick/x86/target_x86.cc b/compiler/dex/quick/x86/target_x86.cc
index 5a8ad7a..d60246e 100644
--- a/compiler/dex/quick/x86/target_x86.cc
+++ b/compiler/dex/quick/x86/target_x86.cc
@@ -1033,14 +1033,14 @@
info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked.
// Does the character fit in 16 bits?
- LIR* launchpad_branch = nullptr;
+ LIR* slowpath_branch = nullptr;
if (rl_char.is_const) {
// We need the value in EAX.
LoadConstantNoClobber(rs_rAX, char_value);
} else {
// Character is not a constant; compare at runtime.
LoadValueDirectFixed(rl_char, rs_rAX);
- launchpad_branch = OpCmpImmBranch(kCondGt, rs_rAX, 0xFFFF, nullptr);
+ slowpath_branch = OpCmpImmBranch(kCondGt, rs_rAX, 0xFFFF, nullptr);
}
// From here down, we know that we are looking for a char that fits in 16 bits.
@@ -1167,9 +1167,9 @@
NewLIR1(kX86Pop32R, rDI);
// Out of line code returns here.
- if (launchpad_branch != nullptr) {
+ if (slowpath_branch != nullptr) {
LIR *return_point = NewLIR0(kPseudoTargetLabel);
- AddIntrinsicLaunchpad(info, launchpad_branch, return_point);
+ AddIntrinsicSlowPath(info, slowpath_branch, return_point);
}
StoreValue(rl_dest, rl_return);
diff --git a/compiler/utils/growable_array.h b/compiler/utils/growable_array.h
index a7d1f0e..b33a62e 100644
--- a/compiler/utils/growable_array.h
+++ b/compiler/utils/growable_array.h
@@ -31,7 +31,6 @@
kGrowableArrayDfsOrder,
kGrowableArrayDfsPostOrder,
kGrowableArrayDomPostOrderTraversal,
- kGrowableArrayThrowLaunchPads,
kGrowableArraySuspendLaunchPads,
kGrowableArraySwitchTables,
kGrowableArrayFillArrayData,