diff --git a/src/compiler/codegen/x86/ArchFactory.cc b/src/compiler/codegen/x86/ArchFactory.cc
index 1d3893a..9e6ef09 100644
--- a/src/compiler/codegen/x86/ArchFactory.cc
+++ b/src/compiler/codegen/x86/ArchFactory.cc
@@ -24,7 +24,7 @@
 
 namespace art {
 
-bool genAddLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genAddLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2)
 {
   oatFlushAllRegs(cUnit);
@@ -39,7 +39,7 @@
   return false;
 }
 
-bool genSubLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genSubLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2)
 {
   oatFlushAllRegs(cUnit);
@@ -54,7 +54,7 @@
   return false;
 }
 
-bool genAndLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genAndLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2)
 {
   oatFlushAllRegs(cUnit);
@@ -69,7 +69,7 @@
   return false;
 }
 
-bool genOrLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genOrLong(CompilationUnit* cUnit, RegLocation rlDest,
                RegLocation rlSrc1, RegLocation rlSrc2)
 {
   oatFlushAllRegs(cUnit);
@@ -84,7 +84,7 @@
   return false;
 }
 
-bool genXorLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genXorLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2)
 {
   oatFlushAllRegs(cUnit);
@@ -99,7 +99,7 @@
   return false;
 }
 
-bool genNegLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genNegLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc)
 {
   oatFlushAllRegs(cUnit);
diff --git a/src/compiler/codegen/x86/Codegen.h b/src/compiler/codegen/x86/Codegen.h
index f04acd4..568a388 100644
--- a/src/compiler/codegen/x86/Codegen.h
+++ b/src/compiler/codegen/x86/Codegen.h
@@ -27,17 +27,17 @@
 namespace art {
 
 #if defined(_CODEGEN_C)
-bool genAddLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genAddLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2);
-bool genSubLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genSubLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2);
-bool genAndLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genAndLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2);
-bool genOrLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genOrLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2);
-bool genXorLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genXorLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2);
-bool genNegLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+bool genNegLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc);
 LIR *opRegImm(CompilationUnit* cUnit, OpKind op, int rDestSrc1, int value);
 LIR *opRegReg(CompilationUnit* cUnit, OpKind op, int rDestSrc1, int rSrc2);
@@ -47,15 +47,16 @@
                     int checkValue, LIR* target);
 
 /* Forward declaration of the portable versions due to circular dependency */
-bool genArithOpFloatPortable(CompilationUnit* cUnit, MIR* mir,
+bool genArithOpFloatPortable(CompilationUnit* cUnit, Instruction::Code opcode,
                                     RegLocation rlDest, RegLocation rlSrc1,
                                     RegLocation rlSrc2);
 
-bool genArithOpDoublePortable(CompilationUnit* cUnit, MIR* mir,
+bool genArithOpDoublePortable(CompilationUnit* cUnit, Instruction::Code opcode,
                                      RegLocation rlDest, RegLocation rlSrc1,
                                      RegLocation rlSrc2);
 
-bool genConversionPortable(CompilationUnit* cUnit, MIR* mir);
+bool genConversionPortable(CompilationUnit* cUnit, Instruction::Code opcode,
+                           RegLocation rlDest, RegLocation rlSrc);
 
 int loadHelper(CompilationUnit* cUnit, int offset);
 LIR* loadConstant(CompilationUnit* cUnit, int reg, int immVal);
diff --git a/src/compiler/codegen/x86/FP/X86FP.cc b/src/compiler/codegen/x86/FP/X86FP.cc
index e6b47d2..460f56b 100644
--- a/src/compiler/codegen/x86/FP/X86FP.cc
+++ b/src/compiler/codegen/x86/FP/X86FP.cc
@@ -16,7 +16,7 @@
 
 namespace art {
 
-static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
+static bool genArithOpFloat(CompilationUnit *cUnit, Instruction::Code opcode,
                             RegLocation rlDest, RegLocation rlSrc1,
                             RegLocation rlSrc2) {
   X86OpCode op = kX86Nop;
@@ -26,7 +26,7 @@
    * Don't attempt to optimize register usage since these opcodes call out to
    * the handlers.
    */
-  switch (mir->dalvikInsn.opcode) {
+  switch (opcode) {
     case Instruction::ADD_FLOAT_2ADDR:
     case Instruction::ADD_FLOAT:
       op = kX86AddssRR;
@@ -52,7 +52,7 @@
       return false;
     case Instruction::REM_FLOAT_2ADDR:
     case Instruction::REM_FLOAT: {
-      return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
+      return genArithOpFloatPortable(cUnit, opcode, rlDest, rlSrc1, rlSrc2);
     }
     default:
       return true;
@@ -71,13 +71,13 @@
   return false;
 }
 
-static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
+static bool genArithOpDouble(CompilationUnit *cUnit, Instruction::Code opcode,
                              RegLocation rlDest, RegLocation rlSrc1,
                              RegLocation rlSrc2) {
   X86OpCode op = kX86Nop;
   RegLocation rlResult;
 
-  switch (mir->dalvikInsn.opcode) {
+  switch (opcode) {
     case Instruction::ADD_DOUBLE_2ADDR:
     case Instruction::ADD_DOUBLE:
       op = kX86AddsdRR;
@@ -103,7 +103,7 @@
       return false;
     case Instruction::REM_DOUBLE_2ADDR:
     case Instruction::REM_DOUBLE: {
-      return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
+      return genArithOpDoublePortable(cUnit, opcode, rlDest, rlSrc1, rlSrc2);
     }
     default:
       return true;
@@ -125,46 +125,32 @@
   return false;
 }
 
-static bool genConversion(CompilationUnit *cUnit, MIR *mir) {
-  Instruction::Code opcode = mir->dalvikInsn.opcode;
-  bool longSrc = false;
-  bool longDest = false;
+static bool genConversion(CompilationUnit *cUnit, Instruction::Code opcode,
+                          RegLocation rlDest, RegLocation rlSrc) {
   RegisterClass rcSrc = kFPReg;
-  RegLocation rlSrc;
-  RegLocation rlDest;
   X86OpCode op = kX86Nop;
   int srcReg;
   RegLocation rlResult;
   switch (opcode) {
     case Instruction::INT_TO_FLOAT:
-      longSrc = false;
-      longDest = false;
       rcSrc = kCoreReg;
       op = kX86Cvtsi2ssRR;
       break;
     case Instruction::DOUBLE_TO_FLOAT:
-      longSrc = true;
-      longDest = false;
       rcSrc = kFPReg;
       op = kX86Cvtsd2ssRR;
       break;
     case Instruction::FLOAT_TO_DOUBLE:
-      longSrc = false;
-      longDest = true;
       rcSrc = kFPReg;
       op = kX86Cvtss2sdRR;
       break;
     case Instruction::INT_TO_DOUBLE:
-      longSrc = false;
-      longDest = true;
       rcSrc = kCoreReg;
       op = kX86Cvtsi2sdRR;
       break;
     case Instruction::FLOAT_TO_INT: {
-      rlSrc = oatGetSrc(cUnit, mir, 0);
       rlSrc = loadValue(cUnit, rlSrc, kFPReg);
       srcReg = rlSrc.lowReg;
-      rlDest = oatGetDest(cUnit, mir, 0);
       oatClobberSReg(cUnit, rlDest.sRegLow);
       rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
       int tempReg = oatAllocTempFloat(cUnit);
@@ -184,10 +170,8 @@
       return false;
     }
     case Instruction::DOUBLE_TO_INT: {
-      rlSrc = oatGetSrcWide(cUnit, mir, 0, 1);
       rlSrc = loadValueWide(cUnit, rlSrc, kFPReg);
       srcReg = rlSrc.lowReg;
-      rlDest = oatGetDest(cUnit, mir, 0);
       oatClobberSReg(cUnit, rlDest.sRegLow);
       rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
       int tempReg = oatAllocTempDouble(cUnit);
@@ -213,26 +197,22 @@
       UNIMPLEMENTED(WARNING) << "inline l2[df] " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
     case Instruction::FLOAT_TO_LONG:
     case Instruction::DOUBLE_TO_LONG:
-      return genConversionPortable(cUnit, mir);
+      return genConversionPortable(cUnit, opcode, rlDest, rlSrc);
     default:
       return true;
   }
-  if (longSrc) {
-    rlSrc = oatGetSrcWide(cUnit, mir, 0, 1);
+  if (rlSrc.wide) {
     rlSrc = loadValueWide(cUnit, rlSrc, rcSrc);
     srcReg = S2D(rlSrc.lowReg, rlSrc.highReg);
   } else {
-    rlSrc = oatGetSrc(cUnit, mir, 0);
     rlSrc = loadValue(cUnit, rlSrc, rcSrc);
     srcReg = rlSrc.lowReg;
   }
-  if (longDest) {
-    rlDest = oatGetDestWide(cUnit, mir, 0, 1);
+  if (rlDest.wide) {
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
     newLIR2(cUnit, op, S2D(rlResult.lowReg, rlResult.highReg), srcReg);
     storeValueWide(cUnit, rlDest, rlResult);
   } else {
-    rlDest = oatGetDest(cUnit, mir, 0);
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
     newLIR2(cUnit, op, rlResult.lowReg, srcReg);
     storeValue(cUnit, rlDest, rlResult);
@@ -240,9 +220,8 @@
   return false;
 }
 
-static bool genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest,
+static bool genCmpFP(CompilationUnit *cUnit, Instruction::Code code, RegLocation rlDest,
                      RegLocation rlSrc1, RegLocation rlSrc2) {
-  Instruction::Code code = mir->dalvikInsn.opcode;
   bool single = (code == Instruction::CMPL_FLOAT) || (code == Instruction::CMPG_FLOAT);
   bool unorderedGt = (code == Instruction::CMPG_DOUBLE) || (code == Instruction::CMPG_FLOAT);
   int srcReg1;
diff --git a/src/compiler/codegen/x86/X86/Factory.cc b/src/compiler/codegen/x86/X86/Factory.cc
index 66e7028..c5186c6 100644
--- a/src/compiler/codegen/x86/X86/Factory.cc
+++ b/src/compiler/codegen/x86/X86/Factory.cc
@@ -414,7 +414,7 @@
 #endif
 }
 
-LIR* loadBaseIndexedDisp(CompilationUnit *cUnit, MIR *mir,
+LIR* loadBaseIndexedDisp(CompilationUnit *cUnit,
                          int rBase, int rIndex, int scale, int displacement,
                          int rDest, int rDestHi,
                          OpSize size, int sReg) {
@@ -505,27 +505,27 @@
 /* Load value from base + scaled index. */
 LIR *loadBaseIndexed(CompilationUnit *cUnit, int rBase,
                      int rIndex, int rDest, int scale, OpSize size) {
-  return loadBaseIndexedDisp(cUnit, NULL, rBase, rIndex, scale, 0,
+  return loadBaseIndexedDisp(cUnit, rBase, rIndex, scale, 0,
                              rDest, INVALID_REG, size, INVALID_SREG);
 }
 
-LIR *loadBaseDisp(CompilationUnit *cUnit, MIR *mir,
+LIR *loadBaseDisp(CompilationUnit *cUnit,
                   int rBase, int displacement,
                   int rDest,
                   OpSize size, int sReg) {
-  return loadBaseIndexedDisp(cUnit, mir, rBase, INVALID_REG, 0, displacement,
+  return loadBaseIndexedDisp(cUnit, rBase, INVALID_REG, 0, displacement,
                              rDest, INVALID_REG, size, sReg);
 }
 
-LIR *loadBaseDispWide(CompilationUnit *cUnit, MIR *mir,
+LIR *loadBaseDispWide(CompilationUnit *cUnit,
                       int rBase, int displacement,
                       int rDestLo, int rDestHi,
                       int sReg) {
-  return loadBaseIndexedDisp(cUnit, mir, rBase, INVALID_REG, 0, displacement,
+  return loadBaseIndexedDisp(cUnit, rBase, INVALID_REG, 0, displacement,
                              rDestLo, rDestHi, kLong, sReg);
 }
 
-LIR* storeBaseIndexedDisp(CompilationUnit *cUnit, MIR *mir,
+LIR* storeBaseIndexedDisp(CompilationUnit *cUnit,
                           int rBase, int rIndex, int scale, int displacement,
                           int rSrc, int rSrcHi,
                           OpSize size, int sReg) {
@@ -600,14 +600,14 @@
 LIR *storeBaseIndexed(CompilationUnit *cUnit, int rBase, int rIndex, int rSrc,
                       int scale, OpSize size)
 {
-  return storeBaseIndexedDisp(cUnit, NULL, rBase, rIndex, scale, 0,
+  return storeBaseIndexedDisp(cUnit, rBase, rIndex, scale, 0,
                               rSrc, INVALID_REG, size, INVALID_SREG);
 }
 
 LIR *storeBaseDisp(CompilationUnit *cUnit, int rBase, int displacement,
                    int rSrc, OpSize size)
 {
-    return storeBaseIndexedDisp(cUnit, NULL, rBase, INVALID_REG, 0,
+    return storeBaseIndexedDisp(cUnit, rBase, INVALID_REG, 0,
                                 displacement, rSrc, INVALID_REG, size,
                                 INVALID_SREG);
 }
@@ -615,7 +615,7 @@
 LIR *storeBaseDispWide(CompilationUnit *cUnit, int rBase, int displacement,
                        int rSrcLo, int rSrcHi)
 {
-  return storeBaseIndexedDisp(cUnit, NULL, rBase, INVALID_REG, 0, displacement,
+  return storeBaseIndexedDisp(cUnit, rBase, INVALID_REG, 0, displacement,
                               rSrcLo, rSrcHi, kLong, INVALID_SREG);
 }
 
diff --git a/src/compiler/codegen/x86/X86/Gen.cc b/src/compiler/codegen/x86/X86/Gen.cc
index 46c98ad..597eda1 100644
--- a/src/compiler/codegen/x86/X86/Gen.cc
+++ b/src/compiler/codegen/x86/X86/Gen.cc
@@ -34,10 +34,10 @@
  * Perform register memory operation.
  */
 LIR* genRegMemCheck(CompilationUnit* cUnit, ConditionCode cCode,
-                    int reg1, int base, int offset, MIR* mir, ThrowKind kind)
+                    int reg1, int base, int offset, ThrowKind kind)
 {
   LIR* tgt = rawLIR(cUnit, 0, kPseudoThrowTarget, kind,
-                    mir ? mir->offset : 0, reg1, base, offset);
+                    cUnit->currentDalvikOffset, reg1, base, offset);
   opRegMem(cUnit, kOpCmp, reg1, base, offset);
   LIR* branch = opCondBranch(cUnit, cCode, tgt);
   // Remember branch target - will process later
@@ -51,10 +51,10 @@
  */
 BasicBlock *findBlock(CompilationUnit* cUnit, unsigned int codeOffset,
                       bool split, bool create, BasicBlock** immedPredBlockP);
-void genSparseSwitch(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc,
-                     LIR* labelList)
+void genSparseSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
+                     RegLocation rlSrc, LIR* labelList)
 {
-  const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
+  const u2* table = cUnit->insns + cUnit->currentDalvikOffset + tableOffset;
   if (cUnit->printMe) {
     dumpSparseSwitchTable(table);
   }
@@ -64,7 +64,8 @@
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
   for (int i = 0; i < entries; i++) {
     int key = keys[i];
-    BasicBlock* case_block = findBlock(cUnit, mir->offset + targets[i],
+    BasicBlock* case_block = findBlock(cUnit,
+                                       cUnit->currentDalvikOffset + targets[i],
                                        false, false, NULL);
     opCmpImmBranch(cUnit, kCondEq, rlSrc.lowReg, key,
                    &labelList[case_block->id]);
@@ -87,9 +88,10 @@
  * jmp  rStartOfMethod
  * done:
  */
-void genPackedSwitch(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
+void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
+                     RegLocation rlSrc)
 {
-  const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
+  const u2* table = cUnit->insns + cUnit->currentDalvikOffset + tableOffset;
   if (cUnit->printMe) {
     dumpPackedSwitchTable(table);
   }
@@ -97,7 +99,7 @@
   SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
                                               true, kAllocData);
   tabRec->table = table;
-  tabRec->vaddr = mir->offset;
+  tabRec->vaddr = cUnit->currentDalvikOffset;
   int size = table[1];
   tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true,
                                    kAllocLIR);
@@ -149,14 +151,15 @@
  *
  * Total size is 4+(width * size + 1)/2 16-bit code units.
  */
-void genFillArrayData(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
+void genFillArrayData(CompilationUnit* cUnit, uint32_t tableOffset,
+                      RegLocation rlSrc)
 {
-  const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
+  const u2* table = cUnit->insns + cUnit->currentDalvikOffset + tableOffset;
   // Add the table to the list - we'll process it later
   FillArrayData *tabRec = (FillArrayData *)oatNew(cUnit, sizeof(FillArrayData),
       true, kAllocData);
   tabRec->table = table;
-  tabRec->vaddr = mir->offset;
+  tabRec->vaddr = cUnit->currentDalvikOffset;
   u2 width = tabRec->table[1];
   u4 size = tabRec->table[2] | (((u4)tabRec->table[3]) << 16);
   tabRec->size = (size * width) + 8;
@@ -204,18 +207,18 @@
 #endif
 }
 
-LIR* genNullCheck(CompilationUnit* cUnit, int sReg, int mReg, MIR* mir);
+LIR* genNullCheck(CompilationUnit* cUnit, int sReg, int mReg, int optFlags);
 void callRuntimeHelperReg(CompilationUnit* cUnit, int helperOffset, int arg0);
 
 /*
  * TODO: implement fast path to short-circuit thin-lock case
  */
-void genMonitorEnter(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
+void genMonitorEnter(CompilationUnit* cUnit, int optFlags, RegLocation rlSrc)
 {
   oatFlushAllRegs(cUnit);
   loadValueDirectFixed(cUnit, rlSrc, rARG0);  // Get obj
   oatLockCallTemps(cUnit);  // Prepare for explicit register usage
-  genNullCheck(cUnit, rlSrc.sRegLow, rARG0, mir);
+  genNullCheck(cUnit, rlSrc.sRegLow, rARG0, optFlags);
   // Go expensive route - artLockObjectFromCode(self, obj);
   callRuntimeHelperReg(cUnit, ENTRYPOINT_OFFSET(pLockObjectFromCode), rARG0);
 }
@@ -223,12 +226,12 @@
 /*
  * TODO: implement fast path to short-circuit thin-lock case
  */
-void genMonitorExit(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc)
+void genMonitorExit(CompilationUnit* cUnit, int optFlags, RegLocation rlSrc)
 {
   oatFlushAllRegs(cUnit);
   loadValueDirectFixed(cUnit, rlSrc, rARG0);  // Get obj
   oatLockCallTemps(cUnit);  // Prepare for explicit register usage
-  genNullCheck(cUnit, rlSrc.sRegLow, rARG0, mir);
+  genNullCheck(cUnit, rlSrc.sRegLow, rARG0, optFlags);
   // Go expensive route - UnlockObjectFromCode(obj);
   callRuntimeHelperReg(cUnit, ENTRYPOINT_OFFSET(pUnlockObjectFromCode), rARG0);
 }
@@ -249,7 +252,7 @@
  * finish:
  *
  */
-void genCmpLong(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
+void genCmpLong(CompilationUnit* cUnit, RegLocation rlDest,
                 RegLocation rlSrc1, RegLocation rlSrc2)
 {
   oatFlushAllRegs(cUnit);