diff --git a/src/compiler/codegen/arm/ArmLIR.h b/src/compiler/codegen/arm/ArmLIR.h
index bc536f9..510a5ea 100644
--- a/src/compiler/codegen/arm/ArmLIR.h
+++ b/src/compiler/codegen/arm/ArmLIR.h
@@ -33,7 +33,7 @@
  *        pointer in r0 as a hidden arg0. Otherwise used as codegen scratch
  *        registers.
  * r0-r1: As in C/C++ r0 is 32-bit return register and r0/r1 is 64-bit
- * r4   : (rSUSPEND) is reserved (suspend check assist)
+ * r4   : (rSUSPEND) is reserved (suspend check/debugger assist)
  * r5   : Callee save (promotion target)
  * r6   : Callee save (promotion target)
  * r7   : Callee save (promotion target)
diff --git a/src/compiler/codegen/arm/MethodCodegenDriver.cc b/src/compiler/codegen/arm/MethodCodegenDriver.cc
index c512e8b..e4073d4 100644
--- a/src/compiler/codegen/arm/MethodCodegenDriver.cc
+++ b/src/compiler/codegen/arm/MethodCodegenDriver.cc
@@ -1933,12 +1933,24 @@
         }
         storeBaseDisp(cUnit, rSP, 0, r0, kWord);
         flushIns(cUnit);
+
+        if (cUnit->genDebugger) {
+            // Refresh update debugger callout
+            loadWordDisp(cUnit, rSELF,
+                         OFFSETOF_MEMBER(Thread, pUpdateDebuggerFromCode), rSUSPEND);
+            genDebuggerUpdate(cUnit, DEBUGGER_METHOD_ENTRY);
+        }
+
         oatFreeTemp(cUnit, r0);
         oatFreeTemp(cUnit, r1);
         oatFreeTemp(cUnit, r2);
         oatFreeTemp(cUnit, r3);
     } else if (bb->blockType == kExitBlock) {
         newLIR0(cUnit, kArmPseudoMethodExit);
+        /* If we're compiling for the debugger, generate an update callout */
+        if (cUnit->genDebugger) {
+            genDebuggerUpdate(cUnit, DEBUGGER_METHOD_EXIT);
+        }
         opRegImm(cUnit, kOpAdd, rSP, cUnit->frameSize - (spillCount * 4));
         /* Need to restore any FP callee saves? */
         if (cUnit->numFPSpills) {
@@ -1994,6 +2006,11 @@
             headLIR->defMask = ENCODE_ALL;
         }
 
+        /* If we're compiling for the debugger, generate an update callout */
+        if (cUnit->genDebugger) {
+            genDebuggerUpdate(cUnit, mir->offset);
+        }
+
         /* Don't generate the SSA annotation unless verbose mode is on */
         if (cUnit->printMe && mir->ssaRep) {
             char* ssaString = oatGetSSAString(cUnit, mir->ssaRep);
@@ -2087,9 +2104,17 @@
         oatAppendLIR(cUnit, (LIR *)lab);
         loadWordDisp(cUnit, rSELF,
                      OFFSETOF_MEMBER(Thread, pTestSuspendFromCode), rLR);
-        loadWordDisp(cUnit, rSELF,
-            Thread::SuspendCountOffset().Int32Value(), rSUSPEND);
+        if (!cUnit->genDebugger) {
+            // use rSUSPEND for suspend count
+            loadWordDisp(cUnit, rSELF,
+                         Thread::SuspendCountOffset().Int32Value(), rSUSPEND);
+        }
         opReg(cUnit, kOpBlx, rLR);
+        if ( cUnit->genDebugger) {
+            // use rSUSPEND for update debugger
+            loadWordDisp(cUnit, rSELF,
+                         OFFSETOF_MEMBER(Thread, pUpdateDebuggerFromCode), rSUSPEND);
+        }
         genUnconditionalBranch(cUnit, resumeLab);
     }
 }
diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc
index 2a3b807..db51fb8 100644
--- a/src/compiler/codegen/arm/Thumb2/Gen.cc
+++ b/src/compiler/codegen/arm/Thumb2/Gen.cc
@@ -574,6 +574,29 @@
     }
 }
 
+/*
+ * Generate callout to updateDebugger. Note: genIT will automatically
+ * create a scheduling barrier, which we need to prevent code motion that
+ * might confuse the debugger.  Note: Return registers r0/r1 are
+ * handled specially during code generation following function calls.
+ * Typically, temp registers are not live between opcodes, but we keep
+ * r0/r1 live following invokes, where they are consumed by the immediately
+ * following op_move_result_xxx.  Thus, we must preserve and restore r0/r1
+ * when making a call to update the debugger.  This is handled by the stub.
+ */
+STATIC void genDebuggerUpdate(CompilationUnit* cUnit, int32_t offset)
+{
+    // Following DCHECK verifies that dPC is in range of single load immediate
+    DCHECK((offset == DEBUGGER_METHOD_ENTRY) ||
+           (offset == DEBUGGER_METHOD_EXIT) || ((offset & 0xffff) == offset));
+    oatClobberCalleeSave(cUnit);
+    opRegImm(cUnit, kOpCmp, rSUSPEND, 0);
+    genIT(cUnit, kArmCondNe, "T");
+    loadConstant(cUnit, r2, offset);     // arg2 <- Entry code
+    opReg(cUnit, kOpBlx, rSUSPEND);
+    oatFreeTemp(cUnit, r2);
+}
+
 STATIC void genConstString(CompilationUnit* cUnit, MIR* mir,
                            RegLocation rlDest, RegLocation rlSrc)
 {
@@ -875,7 +898,8 @@
     oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
     // Keep special registers from being allocated
     for (int i = 0; i < numReserved; i++) {
-        if (NO_SUSPEND && (reservedRegs[i] == rSUSPEND)) {
+        if (NO_SUSPEND && !cUnit->genDebugger &&
+            (reservedRegs[i] == rSUSPEND)) {
             //To measure cost of suspend check
             continue;
         }
@@ -1738,8 +1762,15 @@
         return;
     }
     oatFlushAllRegs(cUnit);
-    newLIR2(cUnit, kThumbSubRI8, rSUSPEND, 1);
-    ArmLIR* branch = opCondBranch(cUnit, kArmCondEq);
+    ArmLIR* branch;
+    if (cUnit->genDebugger) {
+        // If generating code for the debugger, always check for suspension
+        branch = genUnconditionalBranch(cUnit, NULL);
+    } else {
+        // In non-debug case, only check periodically
+        newLIR2(cUnit, kThumbSubRI8, rSUSPEND, 1);
+        branch = opCondBranch(cUnit, kArmCondEq);
+    }
     ArmLIR* retLab = newLIR0(cUnit, kArmPseudoTargetLabel);
     retLab->defMask = ENCODE_ALL;
     ArmLIR* target = (ArmLIR*)oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);