Support callee-save registers on ARM.

Change-Id: I7c519b7a828c9891b1141a8e51e12d6a8bc84118
diff --git a/compiler/optimizing/code_generator_x86_64.cc b/compiler/optimizing/code_generator_x86_64.cc
index 8cc0678..6bc28ff 100644
--- a/compiler/optimizing/code_generator_x86_64.cc
+++ b/compiler/optimizing/code_generator_x86_64.cc
@@ -401,14 +401,6 @@
   return kX86_64WordSize;
 }
 
-static uint32_t ComputeCalleeSaveMask(const int* registers, size_t length) {
-  uint32_t mask = 0;
-  for (size_t i = 0, e = length; i < e; ++i) {
-    mask |= (1 << registers[i]);
-  }
-  return mask;
-}
-
 static constexpr int kNumberOfCpuRegisterPairs = 0;
 // Use a fake return address register to mimic Quick.
 static constexpr Register kFakeReturnRegister = Register(kLastCpuRegister + 1);
@@ -417,11 +409,11 @@
                       kNumberOfCpuRegisters,
                       kNumberOfFloatRegisters,
                       kNumberOfCpuRegisterPairs,
-                      ComputeCalleeSaveMask(reinterpret_cast<const int*>(kCoreCalleeSaves),
-                                            arraysize(kCoreCalleeSaves))
+                      ComputeRegisterMask(reinterpret_cast<const int*>(kCoreCalleeSaves),
+                                          arraysize(kCoreCalleeSaves))
                           | (1 << kFakeReturnRegister),
-                      ComputeCalleeSaveMask(reinterpret_cast<const int*>(kFpuCalleeSaves),
-                                            arraysize(kFpuCalleeSaves)),
+                      ComputeRegisterMask(reinterpret_cast<const int*>(kFpuCalleeSaves),
+                                          arraysize(kFpuCalleeSaves)),
                       compiler_options),
         block_labels_(graph->GetArena(), 0),
         location_builder_(graph, this),