Fix endianness of compiled code and stacks of stubs for MIPS.

The gtests now all work on MIPS.

Change-Id: I2883ce002f23d75e700366014517c863fb626d09
diff --git a/src/compiler/codegen/mips/Assemble.cc b/src/compiler/codegen/mips/Assemble.cc
index 25e13d7..8c906cc 100644
--- a/src/compiler/codegen/mips/Assemble.cc
+++ b/src/compiler/codegen/mips/Assemble.cc
@@ -691,19 +691,19 @@
                      << (int)encoder->fieldLoc[i].kind;
       }
     }
-    // FIXME: need multi-endian handling here
-    cUnit->codeBuffer.push_back((bits >> 24) & 0xff);
-    cUnit->codeBuffer.push_back((bits >> 16) & 0xff);
-    cUnit->codeBuffer.push_back((bits >> 8) & 0xff);
+    // We only support little-endian MIPS.
     cUnit->codeBuffer.push_back(bits & 0xff);
+    cUnit->codeBuffer.push_back((bits >> 8) & 0xff);
+    cUnit->codeBuffer.push_back((bits >> 16) & 0xff);
+    cUnit->codeBuffer.push_back((bits >> 24) & 0xff);
     // TUNING: replace with proper delay slot handling
     if (encoder->size == 8) {
       const MipsEncodingMap *encoder = &EncodingMap[kMipsNop];
       u4 bits = encoder->skeleton;
-      cUnit->codeBuffer.push_back((bits >> 24) & 0xff);
-      cUnit->codeBuffer.push_back((bits >> 16) & 0xff);
-      cUnit->codeBuffer.push_back((bits >> 8) & 0xff);
       cUnit->codeBuffer.push_back(bits & 0xff);
+      cUnit->codeBuffer.push_back((bits >> 8) & 0xff);
+      cUnit->codeBuffer.push_back((bits >> 16) & 0xff);
+      cUnit->codeBuffer.push_back((bits >> 24) & 0xff);
     }
   }
   return res;
diff --git a/src/compiler/codegen/mips/MipsLIR.h b/src/compiler/codegen/mips/MipsLIR.h
index 0f6226f..ab4f844 100644
--- a/src/compiler/codegen/mips/MipsLIR.h
+++ b/src/compiler/codegen/mips/MipsLIR.h
@@ -147,14 +147,12 @@
 /* RegisterLocation templates return values (r_V0, or r_V0/r_V1) */
 #define LOC_C_RETURN {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, r_V0, INVALID_REG, \
                       INVALID_SREG, INVALID_SREG}
-#define LOC_C_RETURN_FLOAT  LOC_C_RETURN
-#define LOC_C_RETURN_ALT {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, r_V1, \
-                          INVALID_REG, INVALID_SREG, INVALID_SREG}
+#define LOC_C_RETURN_FLOAT {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, r_FRESULT0, \
+                            INVALID_REG, INVALID_SREG, INVALID_SREG}
 #define LOC_C_RETURN_WIDE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_RESULT0, \
                            r_RESULT1, INVALID_SREG, INVALID_SREG}
-#define LOC_C_RETURN_WIDE_DOUBLE  LOC_C_RETURN_WIDE
-#define LOC_C_RETURN_WIDE_ALT {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_FRESULT0,\
-                               r_FRESULT1, INVALID_SREG, INVALID_SREG}
+#define LOC_C_RETURN_WIDE_DOUBLE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_FRESULT0,\
+                                  r_FRESULT1, INVALID_SREG, INVALID_SREG}
 
 enum ResourceEncodingPos {
   kGPReg0   = 0,
diff --git a/src/compiler/codegen/mips/MipsRallocUtil.cc b/src/compiler/codegen/mips/MipsRallocUtil.cc
index 43fcc07..bd9f97e 100644
--- a/src/compiler/codegen/mips/MipsRallocUtil.cc
+++ b/src/compiler/codegen/mips/MipsRallocUtil.cc
@@ -138,20 +138,15 @@
 
 extern RegLocation oatGetReturnWideAlt(CompilationUnit* cUnit)
 {
-  RegLocation res = LOC_C_RETURN_WIDE_ALT;
-  oatClobber(cUnit, res.lowReg);
-  oatClobber(cUnit, res.highReg);
-  oatMarkInUse(cUnit, res.lowReg);
-  oatMarkInUse(cUnit, res.highReg);
-  oatMarkPair(cUnit, res.lowReg, res.highReg);
+  UNIMPLEMENTED(FATAL) << "No oatGetReturnWideAlt for MIPS";
+  RegLocation res = LOC_C_RETURN_WIDE;
   return res;
 }
 
 extern RegLocation oatGetReturnAlt(CompilationUnit* cUnit)
 {
-  RegLocation res = LOC_C_RETURN_ALT;
-  oatClobber(cUnit, res.lowReg);
-  oatMarkInUse(cUnit, res.lowReg);
+  UNIMPLEMENTED(FATAL) << "No oatGetReturnAlt for MIPS";
+  RegLocation res = LOC_C_RETURN;
   return res;
 }