commit 59a42afc2b23d2e241a7e301e2cd68a94fba51e5
author Serguei Katkov <serguei.i.katkov@intel.com> Sat Jul 05 00:55:46 2014 +0700
committer Andreas Gampe <agampe@google.com> Fri Jul 11 15:55:07 2014 -0700
tree 6f59a144ea0e3b0081205a999f5d0ac2d5846fad
parent 946a55fa7aec5058d357b601ac3554e242cd1afa

Update counting VR for promotion

For 64-bit it makes sense to compute VR uses together for
int and long because core reg is shared.

Change-Id: Ie8676ece12c928d090da2465dfb4de4e91411920
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>

compiler/dex/quick/arm/codegen_arm.h

diff --git a/compiler/dex/quick/arm/codegen_arm.h b/compiler/dex/quick/arm/codegen_arm.h
index 43db24c..d4b0de7 100644
--- a/compiler/dex/quick/arm/codegen_arm.h
+++ b/compiler/dex/quick/arm/codegen_arm.h
@@ -198,6 +198,13 @@
     RegStorage AllocPreservedDouble(int s_reg);
     RegStorage AllocPreservedSingle(int s_reg);
 
+    bool WideGPRsAreAliases() OVERRIDE {
+      return false;  // Wide GPRs are formed by pairing.
+    }
+    bool WideFPRsAreAliases() OVERRIDE {
+      return false;  // Wide FPRs are formed by pairing.
+    }
+
   private:
     void GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1, int64_t val,
                                   ConditionCode ccode);