diff --git a/src/compiler/codegen/GenCommon.cc b/src/compiler/codegen/GenCommon.cc
index 3d46240..c43d8ff 100644
--- a/src/compiler/codegen/GenCommon.cc
+++ b/src/compiler/codegen/GenCommon.cc
@@ -47,7 +47,7 @@
 /* Generate unconditional branch instructions */
 LIR* opUnconditionalBranch(CompilationUnit* cUnit, LIR* target)
 {
-    LIR* branch = opNone(cUnit, kOpUncondBr);
+    LIR* branch = opBranchUnconditional(cUnit, kOpUncondBr);
     branch->target = (LIR*) target;
     return branch;
 }
diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc
index 2c13107..2a89b6a 100644
--- a/src/compiler/codegen/arm/Assemble.cc
+++ b/src/compiler/codegen/arm/Assemble.cc
@@ -147,7 +147,7 @@
                  NEEDS_FIXUP, "b!1c", "!0t", 2),
     ENCODING_MAP(kThumbBUncond,      0xe000,
                  kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
-                 kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | NEEDS_FIXUP,
+                 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP,
                  "b", "!0t", 2),
     ENCODING_MAP(kThumbBicRR,        0x4380,
                  kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,
diff --git a/src/compiler/codegen/arm/Thumb2/Factory.cc b/src/compiler/codegen/arm/Thumb2/Factory.cc
index 1810573..ad6e40d 100644
--- a/src/compiler/codegen/arm/Thumb2/Factory.cc
+++ b/src/compiler/codegen/arm/Thumb2/Factory.cc
@@ -188,17 +188,10 @@
     return res;
 }
 
-LIR* opNone(CompilationUnit* cUnit, OpKind op)
+LIR* opBranchUnconditional(CompilationUnit* cUnit, OpKind op)
 {
-    ArmOpcode opcode = kThumbBkpt;
-    switch (op) {
-        case kOpUncondBr:
-            opcode = kThumbBUncond;
-            break;
-        default:
-            LOG(FATAL) << "Bad opcode " << (int)op;
-    }
-    return newLIR0(cUnit, opcode);
+    DCHECK_EQ(op, kOpUncondBr);
+    return newLIR1(cUnit, kThumbBUncond, 0 /* offset to be patched */);
 }
 
 LIR* opCondBranch(CompilationUnit* cUnit, ConditionCode cc, LIR* target)
diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc
index 557e87b..20124f9 100644
--- a/src/compiler/codegen/arm/Thumb2/Gen.cc
+++ b/src/compiler/codegen/arm/Thumb2/Gen.cc
@@ -326,7 +326,7 @@
     hopBranch = opCondBranch(cUnit, kCondNe, NULL);
     oatGenMemBarrier(cUnit, kSY);
     storeWordDisp(cUnit, r0, Object::MonitorOffset().Int32Value(), r3);
-    branch = opNone(cUnit, kOpUncondBr);
+    branch = opBranchUnconditional(cUnit, kOpUncondBr);
 
     hopTarget = newLIR0(cUnit, kPseudoTargetLabel);
     hopBranch->target = (LIR*)hopTarget;
diff --git a/src/compiler/codegen/mips/Assemble.cc b/src/compiler/codegen/mips/Assemble.cc
index b487602..359ec42 100644
--- a/src/compiler/codegen/mips/Assemble.cc
+++ b/src/compiler/codegen/mips/Assemble.cc
@@ -106,11 +106,11 @@
                  "andi", "!0r,!1r,0x!2h(!2d)", 4),
     ENCODING_MAP(kMipsB, 0x10000000,
                  kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
-                 kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | NEEDS_FIXUP,
+                 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP,
                  "b", "!0t!0N", 8),
     ENCODING_MAP(kMipsBal, 0x04110000,
                  kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
-                 kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | REG_DEF_LR |
+                 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR |
                  NEEDS_FIXUP, "bal", "!0t!0N", 8),
     ENCODING_MAP(kMipsBeq, 0x10000000,
                  kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0,
diff --git a/src/compiler/codegen/mips/Mips32/Factory.cc b/src/compiler/codegen/mips/Mips32/Factory.cc
index 360fbb7..2868710 100644
--- a/src/compiler/codegen/mips/Mips32/Factory.cc
+++ b/src/compiler/codegen/mips/Mips32/Factory.cc
@@ -127,19 +127,10 @@
     return res;
 }
 
-LIR *opNone(CompilationUnit *cUnit, OpKind op)
+LIR *opBranchUnconditional(CompilationUnit *cUnit, OpKind op)
 {
-    LIR *res;
-    MipsOpCode opcode = kMipsNop;
-    switch (op) {
-        case kOpUncondBr:
-            opcode = kMipsB;
-            break;
-        default:
-            LOG(FATAL) << "Bad case in opNone";
-    }
-    res = newLIR0(cUnit, opcode);
-    return res;
+    DCHECK_EQ(op, kOpUncondBr);
+    return newLIR1(cUnit, kMipsB, 0 /* offset to be patched */ );
 }
 
 LIR *loadMultiple(CompilationUnit *cUnit, int rBase, int rMask);