Improve GenConstString, GenS{get,put} for x86
Rewrite GenConstString for x86 to skip calling ResolveString when the
string is already resolved. Also try to avoid a register copy if the
Method* is in a promoted register.
Implement the TODO for GenS{get,put} to use compare to memory for x86 by
adding a new codegen function to compare directly to memory. Implement
a default implementation that uses a temporary register for RISC
architectures.
Change-Id: Ie163cca3d3d841aa10c50dc6592ec30af7a7cbc9
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
diff --git a/compiler/dex/quick/mir_to_lir.h b/compiler/dex/quick/mir_to_lir.h
index 10136b6..c67a129 100644
--- a/compiler/dex/quick/mir_to_lir.h
+++ b/compiler/dex/quick/mir_to_lir.h
@@ -647,7 +647,19 @@
void SpecialMIR2LIR(const InlineMethod& special);
void MethodMIR2LIR();
-
+ // Routines that work for the generic case, but may be overriden by target.
+ /*
+ * @brief Compare memory to immediate, and branch if condition true.
+ * @param cond The condition code that when true will branch to the target.
+ * @param temp_reg A temporary register that can be used if compare to memory is not
+ * supported by the architecture.
+ * @param base_reg The register holding the base address.
+ * @param offset The offset from the base.
+ * @param check_value The immediate to compare to.
+ * @returns The branch instruction that was generated.
+ */
+ virtual LIR* OpCmpMemImmBranch(ConditionCode cond, int temp_reg, int base_reg,
+ int offset, int check_value, LIR* target);
// Required for target - codegen helpers.
virtual bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,