Merge "Fix O0 build." into dalvik-dev
diff --git a/src/compiler/dex/mir_optimization.cc b/src/compiler/dex/mir_optimization.cc
index d9c443e..6b8f3f0 100644
--- a/src/compiler/dex/mir_optimization.cc
+++ b/src/compiler/dex/mir_optimization.cc
@@ -641,8 +641,29 @@
int this_reg = cu_->num_dalvik_registers - cu_->num_ins;
temp_ssa_register_v_->SetBit(this_reg);
}
+ } else if (bb->predecessors->Size() == 1) {
+ BasicBlock* pred_bb = bb->predecessors->Get(0);
+ temp_ssa_register_v_->Copy(pred_bb->data_flow_info->ending_null_check_v);
+ if (pred_bb->block_type == kDalvikByteCode) {
+ // Check to see if predecessor had an explicit null-check.
+ MIR* last_insn = pred_bb->last_mir_insn;
+ Instruction::Code last_opcode = last_insn->dalvikInsn.opcode;
+ if (last_opcode == Instruction::IF_EQZ) {
+ if (pred_bb->fall_through == bb) {
+ // The fall-through of a block following a IF_EQZ, set the vA of the IF_EQZ to show that
+ // it can't be null.
+ temp_ssa_register_v_->SetBit(last_insn->ssa_rep->uses[0]);
+ }
+ } else if (last_opcode == Instruction::IF_NEZ) {
+ if (pred_bb->taken == bb) {
+ // The taken block following a IF_NEZ, set the vA of the IF_NEZ to show that it can't be
+ // null.
+ temp_ssa_register_v_->SetBit(last_insn->ssa_rep->uses[0]);
+ }
+ }
+ }
} else {
- // Starting state is intesection of all incoming arcs
+ // Starting state is intersection of all incoming arcs
GrowableArray<BasicBlock*>::Iterator iter(bb->predecessors);
BasicBlock* pred_bb = iter.Next();
DCHECK(pred_bb != NULL);