MIPS64: Disassembler support for rotate instructions.
Also, tighten the tests for recognizing the various shift commands. The
tests, previously, would be unable to distinguish between "shift right
logical" and "rotate right" commands. In particular:
- SRLV vs. ROTRV
- DSRLV vs. DROTRV,
- DSRL vs. DROTR, and
- DSRL32 vs. DROTR32
Change-Id: I7a6df8ab0d76fd3d34b1207da9915369ad84fa97
diff --git a/disassembler/disassembler_mips.cc b/disassembler/disassembler_mips.cc
index faa2d2d..c2f23aa 100644
--- a/disassembler/disassembler_mips.cc
+++ b/disassembler/disassembler_mips.cc
@@ -58,9 +58,10 @@
// 0, 1, movci
{ kRTypeMask, 2, "srl", "DTA", },
{ kRTypeMask, 3, "sra", "DTA", },
- { kRTypeMask, 4, "sllv", "DTS", },
- { kRTypeMask, 6, "srlv", "DTS", },
- { kRTypeMask, 7, "srav", "DTS", },
+ { kRTypeMask | (0x1f << 6), 4, "sllv", "DTS", },
+ { kRTypeMask | (0x1f << 6), 6, "srlv", "DTS", },
+ { kRTypeMask | (0x1f << 6), (1 << 6) | 6, "rotrv", "DTS", },
+ { kRTypeMask | (0x1f << 6), 7, "srav", "DTS", },
{ kRTypeMask, 8, "jr", "S", },
{ kRTypeMask | (0x1f << 11), 9 | (31 << 11), "jalr", "S", }, // rd = 31 is implicit.
{ kRTypeMask | (0x1f << 11), 9, "jr", "S", }, // rd = 0 is implicit.
@@ -74,9 +75,10 @@
{ kRTypeMask, 17, "mthi", "S", },
{ kRTypeMask, 18, "mflo", "D", },
{ kRTypeMask, 19, "mtlo", "S", },
- { kRTypeMask, 20, "dsllv", "DTS", },
- { kRTypeMask, 22, "dsrlv", "DTS", },
- { kRTypeMask, 23, "dsrav", "DTS", },
+ { kRTypeMask | (0x1f << 6), 20, "dsllv", "DTS", },
+ { kRTypeMask | (0x1f << 6), 22, "dsrlv", "DTS", },
+ { kRTypeMask | (0x1f << 6), (1 << 6) | 22, "drotrv", "DTS", },
+ { kRTypeMask | (0x1f << 6), 23, "dsrav", "DTS", },
{ kRTypeMask | (0x1f << 6), 24, "mult", "ST", },
{ kRTypeMask | (0x1f << 6), 25, "multu", "ST", },
{ kRTypeMask | (0x1f << 6), 26, "div", "ST", },
@@ -99,13 +101,14 @@
{ kRTypeMask, 46, "dsub", "DST", },
{ kRTypeMask, 47, "dsubu", "DST", },
// TODO: tge[u], tlt[u], teg, tne
- { kRTypeMask, 56, "dsll", "DTA", },
- { kRTypeMask, 58, "dsrl", "DTA", },
- { kRTypeMask, 59, "dsra", "DTA", },
- { kRTypeMask, 60, "dsll32", "DTA", },
- { kRTypeMask | (0x1f << 21), 62 | (1 << 21), "drotr32", "DTA", },
- { kRTypeMask, 62, "dsrl32", "DTA", },
- { kRTypeMask, 63, "dsra32", "DTA", },
+ { kRTypeMask | (0x1f << 21), 56, "dsll", "DTA", },
+ { kRTypeMask | (0x1f << 21), 58, "dsrl", "DTA", },
+ { kRTypeMask | (0x1f << 21), (1 << 21) | 58, "drotr", "DTA", },
+ { kRTypeMask | (0x1f << 21), 59, "dsra", "DTA", },
+ { kRTypeMask | (0x1f << 21), 60, "dsll32", "DTA", },
+ { kRTypeMask | (0x1f << 21), 62, "dsrl32", "DTA", },
+ { kRTypeMask | (0x1f << 21), (1 << 21) | 62, "drotr32", "DTA", },
+ { kRTypeMask | (0x1f << 21), 63, "dsra32", "DTA", },
// SPECIAL0
{ kSpecial0Mask | 0x7ff, (2 << 6) | 24, "mul", "DST" },