commit 82488f563e7f72f8c626052893c1792d76ab3faf
author buzbee <buzbee@google.com> Fri Mar 02 08:20:26 2012 -0800
committer buzbee <buzbee@google.com> Fri Mar 02 13:02:52 2012 -0800
tree e17e3bc62adf8b57bfeb86a3a879dfb099d3d1d7
parent 013b6f296ff7c0cb6aa5aeb6868df05995eeadb7

Multi-target Codegen cleanup

Trying to get a bit more consistent in the abstraction layer
naming:

     genXXX   -> high-level codegen, for ex: genIGet()
     opXXX    -> instruction-level output, for ex: opRegImm()

Also more fleshing out of the Mips codegen support.

Change-Id: Iafdf397cbb5015bfe3aa2c38680d96c7c05f8bc4

src/compiler/codegen/CodegenFactory.cc

diff --git a/src/compiler/codegen/CodegenFactory.cc b/src/compiler/codegen/CodegenFactory.cc
index 232cbf5..a42ebc3 100644
--- a/src/compiler/codegen/CodegenFactory.cc
+++ b/src/compiler/codegen/CodegenFactory.cc
@@ -63,7 +63,7 @@
 {
     rlSrc = oatUpdateLoc(cUnit, rlSrc);
     if (rlSrc.location == kLocPhysReg) {
-        genRegCopy(cUnit, reg1, rlSrc.lowReg);
+        opRegCopy(cUnit, reg1, rlSrc.lowReg);
     } else {
         DCHECK(rlSrc.location == kLocDalvikFrame);
         loadWordDisp(cUnit, rSP, oatSRegOffset(cUnit, rlSrc.sRegLow), reg1);
@@ -92,7 +92,7 @@
 {
     rlSrc = oatUpdateLocWide(cUnit, rlSrc);
     if (rlSrc.location == kLocPhysReg) {
-        genRegCopyWide(cUnit, regLo, regHi, rlSrc.lowReg, rlSrc.highReg);
+        opRegCopyWide(cUnit, regLo, regHi, rlSrc.lowReg, rlSrc.highReg);
     } else {
         DCHECK(rlSrc.location == kLocDalvikFrame);
         loadBaseDispWide(cUnit, NULL, rSP,
@@ -142,7 +142,7 @@
             (rlDest.location == kLocPhysReg)) {
             // Src is live/promoted or Dest has assigned reg.
             rlDest = oatEvalLoc(cUnit, rlDest, kAnyReg, false);
-            genRegCopy(cUnit, rlDest.lowReg, rlSrc.lowReg);
+            opRegCopy(cUnit, rlDest.lowReg, rlSrc.lowReg);
         } else {
             // Just re-assign the registers.  Dest gets Src's regs
             rlDest.lowReg = rlSrc.lowReg;
@@ -202,7 +202,7 @@
             (rlDest.location == kLocPhysReg)) {
             // Src is live or promoted or Dest has assigned reg.
             rlDest = oatEvalLoc(cUnit, rlDest, kAnyReg, false);
-            genRegCopyWide(cUnit, rlDest.lowReg, rlDest.highReg,
+            opRegCopyWide(cUnit, rlDest.lowReg, rlDest.highReg,
                            rlSrc.lowReg, rlSrc.highReg);
         } else {
             // Just re-assign the registers.  Dest gets Src's regs
@@ -249,7 +249,7 @@
 {
     int regCardBase = oatAllocTemp(cUnit);
     int regCardNo = oatAllocTemp(cUnit);
-    LIR* branchOver = genCmpImmBranch(cUnit, kCondEq, valReg, 0);
+    LIR* branchOver = opCmpImmBranch(cUnit, kCondEq, valReg, 0, NULL);
     loadWordDisp(cUnit, rSELF, Thread::CardTableOffset().Int32Value(),
                  regCardBase);
     opRegRegImm(cUnit, kOpLsr, regCardNo, tgtAddrReg, GC_CARD_SHIFT);
@@ -270,7 +270,7 @@
 void loadCurrMethodDirect(CompilationUnit *cUnit, int rTgt)
 {
 #if defined(METHOD_IN_REG)
-    genRegCopy(cUnit, rTgt, rMETHOD);
+    opRegCopy(cUnit, rTgt, rMETHOD);
 #else
     loadWordDisp(cUnit, rSP, 0, rTgt);
 #endif