commit 86ec520fc8b696ed6f164d7b756009ecd6e4aace
author Bill Buzbee <buzbee@android.com> Wed Feb 26 19:03:09 2014 +0000
committer Bill Buzbee <buzbee@android.com> Wed Feb 26 19:03:09 2014 +0000
tree 7314b38ad594ac1360861a62c574ee8e5d892233
parent 2c1ed456dcdb027d097825dd98dbe48c71599b6c

Revert "Rework Quick compiler's register handling"

This reverts commit 2c1ed456dcdb027d097825dd98dbe48c71599b6c.

Change-Id: If88d69ba88e0af0b407ff2240566d7e4545d8a99

compiler/dex/quick/mips/target_mips.cc

diff --git a/compiler/dex/quick/mips/target_mips.cc b/compiler/dex/quick/mips/target_mips.cc
index 85c250d..224e8f2 100644
--- a/compiler/dex/quick/mips/target_mips.cc
+++ b/compiler/dex/quick/mips/target_mips.cc
@@ -40,19 +40,23 @@
                          r_F8, r_F9, r_F10, r_F11, r_F12, r_F13, r_F14, r_F15};
 
 RegLocation MipsMir2Lir::LocCReturn() {
-  return mips_loc_c_return;
+  RegLocation res = MIPS_LOC_C_RETURN;
+  return res;
 }
 
 RegLocation MipsMir2Lir::LocCReturnWide() {
-  return mips_loc_c_return_wide;
+  RegLocation res = MIPS_LOC_C_RETURN_WIDE;
+  return res;
 }
 
 RegLocation MipsMir2Lir::LocCReturnFloat() {
-  return mips_loc_c_return_float;
+  RegLocation res = MIPS_LOC_C_RETURN_FLOAT;
+  return res;
 }
 
 RegLocation MipsMir2Lir::LocCReturnDouble() {
-  return mips_loc_c_return_double;
+  RegLocation res = MIPS_LOC_C_RETURN_DOUBLE;
+  return res;
 }
 
 // Return a target-dependent special register.
@@ -437,20 +441,27 @@
 #endif
 }
 
-// Alloc a pair of core registers, or a double.
-RegStorage MipsMir2Lir::AllocTypedTempWide(bool fp_hint, int reg_class) {
+/*
+ * Alloc a pair of core registers, or a double.  Low reg in low byte,
+ * high reg in next byte.
+ */
+int MipsMir2Lir::AllocTypedTempPair(bool fp_hint,
+                  int reg_class) {
   int high_reg;
   int low_reg;
+  int res = 0;
 
   if (((reg_class == kAnyReg) && fp_hint) || (reg_class == kFPReg)) {
     low_reg = AllocTempDouble();
     high_reg = low_reg + 1;
-    return RegStorage(RegStorage::k64BitPair, low_reg, high_reg);
+    res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
+    return res;
   }
 
   low_reg = AllocTemp();
   high_reg = AllocTemp();
-  return RegStorage(RegStorage::k64BitPair, low_reg, high_reg);
+  res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
+  return res;
 }
 
 int MipsMir2Lir::AllocTypedTemp(bool fp_hint, int reg_class) {
@@ -494,11 +505,11 @@
 }
 
 void MipsMir2Lir::FreeRegLocTemps(RegLocation rl_keep, RegLocation rl_free) {
-  if ((rl_free.reg.GetReg() != rl_keep.reg.GetReg()) && (rl_free.reg.GetReg() != rl_keep.reg.GetHighReg()) &&
-    (rl_free.reg.GetHighReg() != rl_keep.reg.GetReg()) && (rl_free.reg.GetHighReg() != rl_keep.reg.GetHighReg())) {
+  if ((rl_free.low_reg != rl_keep.low_reg) && (rl_free.low_reg != rl_keep.high_reg) &&
+    (rl_free.high_reg != rl_keep.low_reg) && (rl_free.high_reg != rl_keep.high_reg)) {
     // No overlap, free both
-    FreeTemp(rl_free.reg.GetReg());
-    FreeTemp(rl_free.reg.GetHighReg());
+    FreeTemp(rl_free.low_reg);
+    FreeTemp(rl_free.high_reg);
   }
 }
 /*