commit 956f9fadb33619edb3480d2fe1de144b56814b7e
author David Srbecky <dsrbecky@google.com> Thu Apr 25 18:25:56 2019 +0100
committer David Srbecky <dsrbecky@google.com> Mon Apr 29 11:46:49 2019 +0000
tree 27cbc3202918948b500b22f2bb785186c193ffe7
parent b4e65074f148214a61f94c12fed54f4d113c35d6

Save floating point registers in art_quick_osr_stub

We need to save callee save floating-point registers on ARM/ARM64.
No x86/x86-64 floating point registers are callee save.

Bug: 130313339
Test: test.py -r --target -t 570-checker-osr
Change-Id: I53dfd60edb136bd305389e3b4bd51b636875d429

runtime/arch/arm64/quick_entrypoints_arm64.S

diff --git a/runtime/arch/arm64/quick_entrypoints_arm64.S b/runtime/arch/arm64/quick_entrypoints_arm64.S
index 5945c45..8b15238 100644
--- a/runtime/arch/arm64/quick_entrypoints_arm64.S
+++ b/runtime/arch/arm64/quick_entrypoints_arm64.S
@@ -990,7 +990,7 @@
  *                                    Thread *self)                x5
  */
 ENTRY art_quick_osr_stub
-SAVE_SIZE=14*8   // x3, x4, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, FP, LR saved.
+    SAVE_SIZE=22*8
     SAVE_TWO_REGS_INCREASE_FRAME x3, x4, SAVE_SIZE
     SAVE_TWO_REGS x19, x20, 16
     SAVE_TWO_REGS x21, x22, 32
@@ -998,6 +998,10 @@
     SAVE_TWO_REGS x25, x26, 64
     SAVE_TWO_REGS x27, x28, 80
     SAVE_TWO_REGS xFP, xLR, 96
+    stp d8, d9,   [sp, #112]
+    stp d10, d11, [sp, #128]
+    stp d12, d13, [sp, #144]
+    stp d14, d15, [sp, #160]
 
     mov xSELF, x5                         // Move thread pointer into SELF register.
     REFRESH_MARKING_REGISTER
@@ -1010,6 +1014,10 @@
     DECREASE_FRAME 16
 
     // Restore saved registers including value address and shorty address.
+    ldp d8, d9,   [sp, #112]
+    ldp d10, d11, [sp, #128]
+    ldp d12, d13, [sp, #144]
+    ldp d14, d15, [sp, #160]
     RESTORE_TWO_REGS x19, x20, 16
     RESTORE_TWO_REGS x21, x22, 32
     RESTORE_TWO_REGS x23, x24, 48