Add switch and comparison tests. Fix ralloc bug
We normally have 5 registers in our temp pool, but up to 6 may be
needed for long 3-operand operations. Added a workaround to temporarily
add lr to the temp pool in that specific case.
Moved the bulk of the compiler_test code out of common_test.h into
compiler_test.h. Added switch and compare unit tests.
Change-Id: Ib449c49861acb5aaef716e8538e5818ba74522cb
diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc
index 9a5bd40..19b9445 100644
--- a/src/compiler/codegen/arm/Assemble.cc
+++ b/src/compiler/codegen/arm/Assemble.cc
@@ -967,8 +967,8 @@
#define PADDING_MOV_R5_R5 0x1C2D
static void pushWord(std::vector<short>&buf, int data) {
- buf.push_back( (data >> 16) & 0xffff);
buf.push_back( data & 0xffff);
+ buf.push_back( (data >> 16) & 0xffff);
}
void alignBuffer(std::vector<short>&buf, size_t offset) {
@@ -999,7 +999,7 @@
alignBuffer(cUnit->codeBuffer, tabRec->offset);
int bxOffset = tabRec->bxInst->generic.offset + 4;
if (cUnit->printMe) {
- LOG(INFO) << "Switch table for offset 0x" /*<< hex*/ << bxOffset;
+ LOG(INFO) << "Switch table for offset 0x" << std::hex << bxOffset;
}
if (tabRec->table[0] == kSparseSwitchSignature) {
int* keys = (int*)&(tabRec->table[2]);