Quick compiler: minor cleanup
Remove dead software floating point support.
Move a common function from target specific to target independent.
Change-Id: Iaf793857f7e0faae02c672b9f1d45a0658143a51
diff --git a/src/compiler/codegen/mips/assemble_mips.cc b/src/compiler/codegen/mips/assemble_mips.cc
index 4574a42..c0ed3b6 100644
--- a/src/compiler/codegen/mips/assemble_mips.cc
+++ b/src/compiler/codegen/mips/assemble_mips.cc
@@ -712,33 +712,5 @@
{
return EncodingMap[lir->opcode].size;
}
-/*
- * Target-dependent offset assignment.
- * independent.
- */
-int MipsCodegen::AssignInsnOffsets(CompilationUnit* cu)
-{
- LIR* mips_lir;
- int offset = 0;
-
- for (mips_lir = cu->first_lir_insn; mips_lir != NULL; mips_lir = NEXT_LIR(mips_lir)) {
- mips_lir->offset = offset;
- if (mips_lir->opcode >= 0) {
- if (!mips_lir->flags.is_nop) {
- offset += mips_lir->flags.size;
- }
- } else if (mips_lir->opcode == kPseudoPseudoAlign4) {
- if (offset & 0x2) {
- offset += 2;
- mips_lir->operands[0] = 1;
- } else {
- mips_lir->operands[0] = 0;
- }
- }
- /* Pseudo opcodes don't consume space */
- }
-
- return offset;
-}
} // namespace art
diff --git a/src/compiler/codegen/mips/codegen_mips.h b/src/compiler/codegen/mips/codegen_mips.h
index b0ecfce..aaa03c0 100644
--- a/src/compiler/codegen/mips/codegen_mips.h
+++ b/src/compiler/codegen/mips/codegen_mips.h
@@ -83,7 +83,6 @@
virtual void SetupTargetResourceMasks(CompilationUnit* cu, LIR* lir);
virtual const char* GetTargetInstFmt(int opcode);
virtual const char* GetTargetInstName(int opcode);
- virtual int AssignInsnOffsets(CompilationUnit* cu);
virtual std::string BuildInsnString(const char* fmt, LIR* lir, unsigned char* base_addr);
virtual uint64_t GetPCUseDefEncoding();
virtual uint64_t GetTargetInstFlags(int opcode);
diff --git a/src/compiler/codegen/mips/fp_mips.cc b/src/compiler/codegen/mips/fp_mips.cc
index efc4f80..e718c5c 100644
--- a/src/compiler/codegen/mips/fp_mips.cc
+++ b/src/compiler/codegen/mips/fp_mips.cc
@@ -49,11 +49,14 @@
case Instruction::MUL_FLOAT:
op = kMipsFmuls;
break;
- case Instruction::REM_FLOAT_2ADDR:
- case Instruction::REM_FLOAT:
- case Instruction::NEG_FLOAT: {
- return GenArithOpFloatPortable(cu, opcode, rl_dest, rl_src1, rl_src2);
- }
+ FlushAllRegs(cu); // Send everything to home location
+ CallRuntimeHelperRegLocationRegLocation(cu, ENTRYPOINT_OFFSET(pFmodf), rl_src1, rl_src2, false);
+ rl_result = GetReturn(cu, true);
+ StoreValue(cu, rl_dest, rl_result);
+ return false;
+ case Instruction::NEG_FLOAT:
+ GenNegFloat(cu, rl_dest, rl_src1);
+ return false;
default:
return true;
}
@@ -91,9 +94,14 @@
break;
case Instruction::REM_DOUBLE_2ADDR:
case Instruction::REM_DOUBLE:
- case Instruction::NEG_DOUBLE: {
- return GenArithOpDoublePortable(cu, opcode, rl_dest, rl_src1, rl_src2);
- }
+ FlushAllRegs(cu); // Send everything to home location
+ CallRuntimeHelperRegLocationRegLocation(cu, ENTRYPOINT_OFFSET(pFmod), rl_src1, rl_src2, false);
+ rl_result = GetReturnWide(cu, true);
+ StoreValueWide(cu, rl_dest, rl_result);
+ return false;
+ case Instruction::NEG_DOUBLE:
+ GenNegDouble(cu, rl_dest, rl_src1);
+ return false;
default:
return true;
}
@@ -130,12 +138,17 @@
op = kMipsFcvtdw;
break;
case Instruction::FLOAT_TO_INT:
+ return GenConversionCall(cu, ENTRYPOINT_OFFSET(pF2iz), rl_dest, rl_src);
case Instruction::DOUBLE_TO_INT:
+ return GenConversionCall(cu, ENTRYPOINT_OFFSET(pD2iz), rl_dest, rl_src);
case Instruction::LONG_TO_DOUBLE:
+ return GenConversionCall(cu, ENTRYPOINT_OFFSET(pL2d), rl_dest, rl_src);
case Instruction::FLOAT_TO_LONG:
+ return GenConversionCall(cu, ENTRYPOINT_OFFSET(pF2l), rl_dest, rl_src);
case Instruction::LONG_TO_FLOAT:
+ return GenConversionCall(cu, ENTRYPOINT_OFFSET(pL2f), rl_dest, rl_src);
case Instruction::DOUBLE_TO_LONG:
- return GenConversionPortable(cu, opcode, rl_dest, rl_src);
+ return GenConversionCall(cu, ENTRYPOINT_OFFSET(pD2l), rl_dest, rl_src);
default:
return true;
}