commit b19930c5cba3cf662dce5ee057fcc9829b4cbb9c
author Guillaume Sanchez <guillaumesa@google.com> Thu Apr 09 21:12:15 2015 +0100
committer Guillaume Sanchez <guillaumesa@google.com> Fri Apr 10 10:28:02 2015 +0100
tree c226f8fffc4522b273072c516507083e2a77c505
parent 0f88e87085b7cf6544dadff3f555773966a6853e

Follow up of "div/rem on x86 and x86_64", to tidy up the code a little.

Change-Id: Ibf39cbc8ac1d773599d70be2cb1e941674b60f1d

compiler/optimizing/code_generator_x86_64.cc

diff --git a/compiler/optimizing/code_generator_x86_64.cc b/compiler/optimizing/code_generator_x86_64.cc
index 1f24046..2bb0349 100644
--- a/compiler/optimizing/code_generator_x86_64.cc
+++ b/compiler/optimizing/code_generator_x86_64.cc
@@ -2213,12 +2213,7 @@
 
   CpuRegister output_register = locations->Out().AsRegister<CpuRegister>();
   CpuRegister input_register = locations->InAt(0).AsRegister<CpuRegister>();
-  int64_t imm;
-  if (second.GetConstant()->IsLongConstant()) {
-    imm = second.GetConstant()->AsLongConstant()->GetValue();
-  } else {
-    imm = second.GetConstant()->AsIntConstant()->GetValue();
-  }
+  int64_t imm = Int64FromConstant(second.GetConstant());
 
   DCHECK(imm == 1 || imm == -1);
 
@@ -2248,25 +2243,18 @@
     }
 
     default:
-      LOG(FATAL) << "Unreachable";
+      LOG(FATAL) << "Unexpected type for div by (-)1 " << instruction->GetResultType();
   }
 }
 
-void InstructionCodeGeneratorX86_64::DivByPowerOfTwo(HBinaryOperation* instruction) {
-  DCHECK(instruction->IsDiv());
-
+void InstructionCodeGeneratorX86_64::DivByPowerOfTwo(HDiv* instruction) {
   LocationSummary* locations = instruction->GetLocations();
   Location second = locations->InAt(1);
 
   CpuRegister output_register = locations->Out().AsRegister<CpuRegister>();
   CpuRegister numerator = locations->InAt(0).AsRegister<CpuRegister>();
 
-  int64_t imm;
-  if (instruction->GetResultType() == Primitive::kPrimLong) {
-    imm = second.GetConstant()->AsLongConstant()->GetValue();
-  } else {
-    imm = second.GetConstant()->AsIntConstant()->GetValue();
-  }
+  int64_t imm = Int64FromConstant(second.GetConstant());
 
   DCHECK(IsPowerOfTwo(std::abs(imm)));
 
@@ -2327,7 +2315,7 @@
   int64_t magic;
   int shift;
 
-  // TODO: can these branch be written as one?
+  // TODO: can these branches be written as one?
   if (instruction->GetResultType() == Primitive::kPrimInt) {
     int imm = second.GetConstant()->AsIntConstant()->GetValue();
 
@@ -2391,7 +2379,7 @@
     __ imulq(numerator);
 
     if (imm > 0 && magic < 0) {
-      // RDX += numeratorerator
+      // RDX += numerator
       __ addq(rdx, numerator);
     } else if (imm < 0 && magic > 0) {
       // RDX -= numerator
@@ -2441,19 +2429,14 @@
   DCHECK_EQ(is_div ? RAX : RDX, out.AsRegister());
 
   if (second.IsConstant()) {
-    int64_t imm;
-    if (second.GetConstant()->AsLongConstant()) {
-      imm = second.GetConstant()->AsLongConstant()->GetValue();
-    } else {
-      imm = second.GetConstant()->AsIntConstant()->GetValue();
-    }
+    int64_t imm = Int64FromConstant(second.GetConstant());
 
     if (imm == 0) {
       // Do not generate anything. DivZeroCheck would prevent any code to be executed.
     } else if (imm == 1 || imm == -1) {
       DivRemOneOrMinusOne(instruction);
     } else if (instruction->IsDiv() && IsPowerOfTwo(std::abs(imm))) {
-      DivByPowerOfTwo(instruction);
+      DivByPowerOfTwo(instruction->AsDiv());
     } else {
       DCHECK(imm <= -2 || imm >= 2);
       GenerateDivRemWithAnyConstant(instruction);