Switch-interpreter: Make the instruction field constant.
The field is always set to the currently handled instruction.
The 'next' field stores the instruction to be executed next,
which defaults to fallthrough unless overwritten by handler.
Test: test.py -b -r --host --64 --interpreter
Test: run-libjdwp-tests.sh --mode=host --variant=X64 --debug --no-jit
Change-Id: Iadae51ead3e2f657717f190d07b04f4c28890f43
diff --git a/runtime/interpreter/interpreter_switch_impl-inl.h b/runtime/interpreter/interpreter_switch_impl-inl.h
index 085c475..7ab8864 100644
--- a/runtime/interpreter/interpreter_switch_impl-inl.h
+++ b/runtime/interpreter/interpreter_switch_impl-inl.h
@@ -94,7 +94,6 @@
int32_t displacement =
static_cast<int32_t>(shadow_frame.GetDexPC()) - static_cast<int32_t>(dex_pc);
SetNextInstruction(inst->RelativeAt(displacement));
- inst = inst->RelativeAt(displacement);
return false; // Stop executing this opcode and continue in the exception handler.
}
@@ -107,15 +106,13 @@
// address (for 'this' argument). Make a copy of the handler just for the slow path.
// * The modifiable fields should also be in registers, so we don't want to store their
// address even in the handler copy. Make a copy of them just for the call as well.
- const Instruction* inst2 = inst;
- const Instruction* next2 = next;
- bool exit2 = exit_interpreter_loop;
+ const Instruction* next_copy = next;
+ bool exit_copy = exit_interpreter_loop;
InstructionHandler<do_access_check, transaction_active, kFormat> handler_copy(
- ctx, instrumentation, self, shadow_frame, dex_pc, inst2, inst_data, next2, exit2);
+ ctx, instrumentation, self, shadow_frame, dex_pc, inst, inst_data, next_copy, exit_copy);
bool result = handler_copy.HandlePendingExceptionWithInstrumentationImpl(instr);
- inst = inst2;
- next = next2;
- exit_interpreter_loop = exit2;
+ next = next_copy;
+ exit_interpreter_loop = exit_copy;
return result;
}
@@ -150,7 +147,6 @@
}
} else {
SetNextInstruction(next_inst);
- inst = next_inst;
}
return true;
}
@@ -167,7 +163,6 @@
}
} else {
SetNextInstruction(next_inst);
- inst = next_inst;
}
return true;
}
@@ -256,7 +251,7 @@
if (IsBackwardBranch(offset)) {
HotnessUpdate();
/* Record new dex pc early to have consistent suspend point at loop header. */
- shadow_frame.SetDexPC(inst->GetDexPc(Insns()));
+ shadow_frame.SetDexPC(next->GetDexPc(Insns()));
self->AllowThreadSuspension();
}
}
@@ -355,7 +350,6 @@
}
BRANCH_INSTRUMENTATION(offset);
SetNextInstruction(inst->RelativeAt(offset));
- inst = inst->RelativeAt(offset);
HandleBackwardBranch(offset);
return true;
}
@@ -374,7 +368,6 @@
result = -1;
}
SetVReg(A(), result);
- inst = inst->Next_2xx();
return true;
}
@@ -390,7 +383,6 @@
result = 1;
}
SetVReg(A(), result);
- inst = inst->Next_2xx();
return true;
}
@@ -401,11 +393,9 @@
if (cond) {
BRANCH_INSTRUMENTATION(offset);
SetNextInstruction(inst->RelativeAt(offset));
- inst = inst->RelativeAt(offset);
HandleBackwardBranch(offset);
} else {
BRANCH_INSTRUMENTATION(2);
- inst = inst->Next_2xx();
}
return true;
}
@@ -423,7 +413,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
(this->*setVReg)(A(), array->GetWithoutChecks(index));
- inst = inst->Next_2xx();
}
return true;
}
@@ -441,7 +430,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
array->template SetWithoutChecks<transaction_active>(index, value);
- inst = inst->Next_2xx();
}
return true;
}
@@ -491,79 +479,66 @@
}
ALWAYS_INLINE bool NOP() REQUIRES_SHARED(Locks::mutator_lock_) {
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MOVE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MOVE_FROM16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MOVE_16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()));
- inst = inst->Next_3xx();
return true;
}
ALWAYS_INLINE bool MOVE_WIDE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MOVE_WIDE_FROM16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MOVE_WIDE_16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()));
- inst = inst->Next_3xx();
return true;
}
ALWAYS_INLINE bool MOVE_OBJECT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegReference(A(), GetVRegReference(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MOVE_OBJECT_FROM16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegReference(A(), GetVRegReference(B()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MOVE_OBJECT_16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegReference(A(), GetVRegReference(B()));
- inst = inst->Next_3xx();
return true;
}
ALWAYS_INLINE bool MOVE_RESULT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), ResultRegister()->GetI());
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MOVE_RESULT_WIDE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), ResultRegister()->GetJ());
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MOVE_RESULT_OBJECT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegReference(A(), ResultRegister()->GetL());
- inst = inst->Next_1xx();
return true;
}
@@ -572,7 +547,6 @@
DCHECK(exception != nullptr) << "No pending exception on MOVE_EXCEPTION instruction";
SetVRegReference(A(), exception);
self->ClearException();
- inst = inst->Next_1xx();
return true;
}
@@ -659,7 +633,6 @@
if (val == 0) {
SetVRegReference(dst, nullptr);
}
- inst = inst->Next_1xx();
return true;
}
@@ -670,7 +643,6 @@
if (val == 0) {
SetVRegReference(dst, nullptr);
}
- inst = inst->Next_2xx();
return true;
}
@@ -681,7 +653,6 @@
if (val == 0) {
SetVRegReference(dst, nullptr);
}
- inst = inst->Next_3xx();
return true;
}
@@ -692,31 +663,26 @@
if (val == 0) {
SetVRegReference(dst, nullptr);
}
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool CONST_WIDE_16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), B());
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool CONST_WIDE_32() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), B());
- inst = inst->Next_3xx();
return true;
}
ALWAYS_INLINE bool CONST_WIDE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), inst->WideVRegB());
- inst = inst->Next_51l();
return true;
}
ALWAYS_INLINE bool CONST_WIDE_HIGH16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), static_cast<uint64_t>(B()) << 48);
- inst = inst->Next_2xx();
return true;
}
@@ -726,7 +692,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
SetVRegReference(A(), s);
- inst = inst->Next_2xx();
}
return true;
}
@@ -737,7 +702,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
SetVRegReference(A(), s);
- inst = inst->Next_3xx();
}
return true;
}
@@ -752,7 +716,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
SetVRegReference(A(), c);
- inst = inst->Next_2xx();
}
return true;
}
@@ -766,7 +729,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
SetVRegReference(A(), mh);
- inst = inst->Next_2xx();
}
return true;
}
@@ -780,7 +742,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
SetVRegReference(A(), mt);
- inst = inst->Next_2xx();
}
return true;
}
@@ -828,8 +789,6 @@
if (UNLIKELY(obj != nullptr && !obj->InstanceOf(c))) {
ThrowClassCastException(c, obj->GetClass());
HANDLE_PENDING_EXCEPTION();
- } else {
- inst = inst->Next_2xx();
}
}
return true;
@@ -846,7 +805,6 @@
} else {
ObjPtr<mirror::Object> obj = GetVRegReference(B());
SetVReg(A(), (obj != nullptr && obj->InstanceOf(c)) ? 1 : 0);
- inst = inst->Next_2xx();
}
return true;
}
@@ -858,7 +816,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
SetVReg(A(), array->AsArray()->GetLength());
- inst = inst->Next_1xx();
}
return true;
}
@@ -890,7 +847,6 @@
HANDLE_PENDING_EXCEPTION();
}
SetVRegReference(A(), obj);
- inst = inst->Next_2xx();
}
return true;
}
@@ -907,7 +863,6 @@
HANDLE_PENDING_EXCEPTION();
} else {
SetVRegReference(A(), obj);
- inst = inst->Next_2xx();
}
return true;
}
@@ -940,7 +895,6 @@
if (transaction_active) {
RecordArrayElementsInTransaction(obj->AsArray(), payload->element_count);
}
- inst = inst->Next_3xx();
return true;
}
@@ -980,7 +934,6 @@
int32_t offset = DoPackedSwitch(inst, shadow_frame, inst_data);
BRANCH_INSTRUMENTATION(offset);
SetNextInstruction(inst->RelativeAt(offset));
- inst = inst->RelativeAt(offset);
HandleBackwardBranch(offset);
return true;
}
@@ -989,7 +942,6 @@
int32_t offset = DoSparseSwitch(inst, shadow_frame, inst_data);
BRANCH_INSTRUMENTATION(offset);
SetNextInstruction(inst->RelativeAt(offset));
- inst = inst->RelativeAt(offset);
HandleBackwardBranch(offset);
return true;
}
@@ -1125,7 +1077,6 @@
ObjPtr<mirror::ObjectArray<mirror::Object>> array = a->AsObjectArray<mirror::Object>();
if (array->CheckIsValidIndex(index) && array->CheckAssignable(val)) {
array->SetWithoutChecks<transaction_active>(index, val);
- inst = inst->Next_2xx();
} else {
HANDLE_PENDING_EXCEPTION();
}
@@ -1382,73 +1333,61 @@
ALWAYS_INLINE bool NEG_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), -GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool NOT_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), ~GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool NEG_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), -GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool NOT_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), ~GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool NEG_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), -GetVRegFloat(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool NEG_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), -GetVRegDouble(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool INT_TO_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool INT_TO_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool INT_TO_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool LONG_TO_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool LONG_TO_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool LONG_TO_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
@@ -1456,7 +1395,6 @@
float val = GetVRegFloat(B());
int32_t result = art_float_to_integral<int32_t, float>(val);
SetVReg(A(), result);
- inst = inst->Next_1xx();
return true;
}
@@ -1464,13 +1402,11 @@
float val = GetVRegFloat(B());
int64_t result = art_float_to_integral<int64_t, float>(val);
SetVRegLong(A(), result);
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool FLOAT_TO_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), GetVRegFloat(B()));
- inst = inst->Next_1xx();
return true;
}
@@ -1478,7 +1414,6 @@
double val = GetVRegDouble(B());
int32_t result = art_float_to_integral<int32_t, double>(val);
SetVReg(A(), result);
- inst = inst->Next_1xx();
return true;
}
@@ -1486,49 +1421,41 @@
double val = GetVRegDouble(B());
int64_t result = art_float_to_integral<int64_t, double>(val);
SetVRegLong(A(), result);
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool DOUBLE_TO_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), GetVRegDouble(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool INT_TO_BYTE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), static_cast<int8_t>(GetVReg(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool INT_TO_CHAR() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), static_cast<uint16_t>(GetVReg(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool INT_TO_SHORT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), static_cast<int16_t>(GetVReg(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool ADD_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeAdd(GetVReg(B()), GetVReg(C())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SUB_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeSub(GetVReg(B()), GetVReg(C())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MUL_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeMul(GetVReg(B()), GetVReg(C())));
- inst = inst->Next_2xx();
return true;
}
@@ -1546,55 +1473,46 @@
ALWAYS_INLINE bool SHL_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) << (GetVReg(C()) & 0x1f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SHR_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) >> (GetVReg(C()) & 0x1f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool USHR_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), static_cast<uint32_t>(GetVReg(B())) >> (GetVReg(C()) & 0x1f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool AND_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) & GetVReg(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool OR_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) | GetVReg(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool XOR_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) ^ GetVReg(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool ADD_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), SafeAdd(GetVRegLong(B()), GetVRegLong(C())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SUB_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), SafeSub(GetVRegLong(B()), GetVRegLong(C())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MUL_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), SafeMul(GetVRegLong(B()), GetVRegLong(C())));
- inst = inst->Next_2xx();
return true;
}
@@ -1612,118 +1530,99 @@
ALWAYS_INLINE bool AND_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()) & GetVRegLong(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool OR_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()) | GetVRegLong(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool XOR_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()) ^ GetVRegLong(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SHL_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()) << (GetVReg(C()) & 0x3f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SHR_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), GetVRegLong(B()) >> (GetVReg(C()) & 0x3f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool USHR_LONG() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegLong(A(), static_cast<uint64_t>(GetVRegLong(B())) >> (GetVReg(C()) & 0x3f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool ADD_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), GetVRegFloat(B()) + GetVRegFloat(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SUB_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), GetVRegFloat(B()) - GetVRegFloat(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MUL_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), GetVRegFloat(B()) * GetVRegFloat(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool DIV_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), GetVRegFloat(B()) / GetVRegFloat(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool REM_FLOAT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegFloat(A(), fmodf(GetVRegFloat(B()), GetVRegFloat(C())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool ADD_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), GetVRegDouble(B()) + GetVRegDouble(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SUB_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), GetVRegDouble(B()) - GetVRegDouble(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MUL_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), GetVRegDouble(B()) * GetVRegDouble(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool DIV_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), GetVRegDouble(B()) / GetVRegDouble(C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool REM_DOUBLE() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVRegDouble(A(), fmod(GetVRegDouble(B()), GetVRegDouble(C())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool ADD_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, SafeAdd(GetVReg(vregA), GetVReg(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool SUB_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, SafeSub(GetVReg(vregA), GetVReg(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MUL_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, SafeMul(GetVReg(vregA), GetVReg(B())));
- inst = inst->Next_1xx();
return true;
}
@@ -1744,63 +1643,54 @@
ALWAYS_INLINE bool SHL_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, GetVReg(vregA) << (GetVReg(B()) & 0x1f));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool SHR_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, GetVReg(vregA) >> (GetVReg(B()) & 0x1f));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool USHR_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, static_cast<uint32_t>(GetVReg(vregA)) >> (GetVReg(B()) & 0x1f));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool AND_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, GetVReg(vregA) & GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool OR_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, GetVReg(vregA) | GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool XOR_INT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVReg(vregA, GetVReg(vregA) ^ GetVReg(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool ADD_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, SafeAdd(GetVRegLong(vregA), GetVRegLong(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool SUB_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, SafeSub(GetVRegLong(vregA), GetVRegLong(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MUL_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, SafeMul(GetVRegLong(vregA), GetVRegLong(B())));
- inst = inst->Next_1xx();
return true;
}
@@ -1821,130 +1711,111 @@
ALWAYS_INLINE bool AND_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, GetVRegLong(vregA) & GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool OR_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, GetVRegLong(vregA) | GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool XOR_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, GetVRegLong(vregA) ^ GetVRegLong(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool SHL_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, GetVRegLong(vregA) << (GetVReg(B()) & 0x3f));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool SHR_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, GetVRegLong(vregA) >> (GetVReg(B()) & 0x3f));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool USHR_LONG_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegLong(vregA, static_cast<uint64_t>(GetVRegLong(vregA)) >> (GetVReg(B()) & 0x3f));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool ADD_FLOAT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegFloat(vregA, GetVRegFloat(vregA) + GetVRegFloat(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool SUB_FLOAT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegFloat(vregA, GetVRegFloat(vregA) - GetVRegFloat(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MUL_FLOAT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegFloat(vregA, GetVRegFloat(vregA) * GetVRegFloat(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool DIV_FLOAT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegFloat(vregA, GetVRegFloat(vregA) / GetVRegFloat(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool REM_FLOAT_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegFloat(vregA, fmodf(GetVRegFloat(vregA), GetVRegFloat(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool ADD_DOUBLE_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegDouble(vregA, GetVRegDouble(vregA) + GetVRegDouble(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool SUB_DOUBLE_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegDouble(vregA, GetVRegDouble(vregA) - GetVRegDouble(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool MUL_DOUBLE_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegDouble(vregA, GetVRegDouble(vregA) * GetVRegDouble(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool DIV_DOUBLE_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegDouble(vregA, GetVRegDouble(vregA) / GetVRegDouble(B()));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool REM_DOUBLE_2ADDR() REQUIRES_SHARED(Locks::mutator_lock_) {
uint4_t vregA = A();
SetVRegDouble(vregA, fmod(GetVRegDouble(vregA), GetVRegDouble(B())));
- inst = inst->Next_1xx();
return true;
}
ALWAYS_INLINE bool ADD_INT_LIT16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeAdd(GetVReg(B()), C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool RSUB_INT() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeSub(C(), GetVReg(B())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MUL_INT_LIT16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeMul(GetVReg(B()), C()));
- inst = inst->Next_2xx();
return true;
}
@@ -1962,37 +1833,31 @@
ALWAYS_INLINE bool AND_INT_LIT16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) & C());
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool OR_INT_LIT16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) | C());
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool XOR_INT_LIT16() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) ^ C());
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool ADD_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeAdd(GetVReg(B()), C()));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool RSUB_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeSub(C(), GetVReg(B())));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool MUL_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), SafeMul(GetVReg(B()), C()));
- inst = inst->Next_2xx();
return true;
}
@@ -2010,37 +1875,31 @@
ALWAYS_INLINE bool AND_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) & C());
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool OR_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) | C());
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool XOR_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) ^ C());
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SHL_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) << (C() & 0x1f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool SHR_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), GetVReg(B()) >> (C() & 0x1f));
- inst = inst->Next_2xx();
return true;
}
ALWAYS_INLINE bool USHR_INT_LIT8() REQUIRES_SHARED(Locks::mutator_lock_) {
SetVReg(A(), static_cast<uint32_t>(GetVReg(B())) >> (C() & 0x1f));
- inst = inst->Next_2xx();
return true;
}
@@ -2109,7 +1968,7 @@
Thread* self,
ShadowFrame& shadow_frame,
uint16_t dex_pc,
- const Instruction*& inst,
+ const Instruction* inst,
uint16_t inst_data,
const Instruction*& next,
bool& exit_interpreter_loop)
@@ -2165,7 +2024,7 @@
Thread* const self;
ShadowFrame& shadow_frame;
uint32_t const dex_pc;
- const Instruction*& inst;
+ const Instruction* const inst;
uint16_t const inst_data;
const Instruction*& next;
@@ -2196,7 +2055,7 @@
uint32_t dex_pc = shadow_frame.GetDexPC();
const auto* const instrumentation = Runtime::Current()->GetInstrumentation();
const uint16_t* const insns = accessor.Insns();
- const Instruction* inst = Instruction::At(insns + dex_pc);
+ const Instruction* next = Instruction::At(insns + dex_pc);
uint16_t inst_data;
DCHECK(!shadow_frame.GetForceRetryInstruction())
@@ -2204,12 +2063,12 @@
bool const interpret_one_instruction = ctx->interpret_one_instruction;
while (true) {
+ const Instruction* const inst = next;
dex_pc = inst->GetDexPc(insns);
shadow_frame.SetDexPC(dex_pc);
TraceExecution(shadow_frame, inst, dex_pc);
inst_data = inst->Fetch16(0);
{
- const Instruction* next = nullptr;
bool exit_loop = false;
InstructionHandler<do_access_check, transaction_active, Instruction::kInvalidFormat> handler(
ctx, instrumentation, self, shadow_frame, dex_pc, inst, inst_data, next, exit_loop);
@@ -2226,8 +2085,7 @@
switch (inst->Opcode(inst_data)) {
#define OPCODE_CASE(OPCODE, OPCODE_NAME, NAME, FORMAT, i, a, e, v) \
case OPCODE: { \
- size_t inst_size = Instruction::SizeInCodeUnits(Instruction::FORMAT); \
- const Instruction* next = inst->RelativeAt(inst_size); \
+ next = inst->RelativeAt(Instruction::SizeInCodeUnits(Instruction::FORMAT)); \
bool exit_loop = false; \
InstructionHandler<do_access_check, transaction_active, Instruction::FORMAT> handler( \
ctx, instrumentation, self, shadow_frame, dex_pc, inst, inst_data, next, exit_loop); \
@@ -2235,7 +2093,6 @@
if (UNLIKELY(exit_loop)) { \
return; \
} \
- DCHECK_EQ(next, inst) << NAME; \
break; \
}
DEX_INSTRUCTION_LIST(OPCODE_CASE)
@@ -2246,7 +2103,7 @@
}
}
// Record where we stopped.
- shadow_frame.SetDexPC(inst->GetDexPc(insns));
+ shadow_frame.SetDexPC(next->GetDexPc(insns));
ctx->result = ctx->result_register;
return;
} // NOLINT(readability/fn_size)