diff --git a/src/compiler/codegen/arm/arm_lir.h b/src/compiler/codegen/arm/arm_lir.h
index 503fbda..a3c4ca1 100644
--- a/src/compiler/codegen/arm/arm_lir.h
+++ b/src/compiler/codegen/arm/arm_lir.h
@@ -134,11 +134,11 @@
   kArmRegEnd   = 48,
 };
 
-#define ENCODE_ARM_REG_LIST(N)      ((uint64_t) N)
+#define ENCODE_ARM_REG_LIST(N)      (static_cast<uint64_t>(N))
 #define ENCODE_ARM_REG_SP           (1ULL << kArmRegSP)
 #define ENCODE_ARM_REG_LR           (1ULL << kArmRegLR)
 #define ENCODE_ARM_REG_PC           (1ULL << kArmRegPC)
-#define ENCODE_ARM_REG_FPCS_LIST(N) ((uint64_t)N << kArmFPReg16)
+#define ENCODE_ARM_REG_FPCS_LIST(N) (static_cast<uint64_t>(N) << kArmFPReg16)
 
 enum ArmNativeRegisterPool {
   r0   = 0,
@@ -232,7 +232,7 @@
   kArmRor = 0x3
 };
 
-#define isPseudoOpcode(opcode) ((int)(opcode) < 0)
+#define isPseudoOpcode(opcode) (static_cast<int>(opcode) < 0)
 
 /*
  * The following enum defines the list of supported Thumb instructions by the
diff --git a/src/compiler/codegen/arm/assemble_arm.cc b/src/compiler/codegen/arm/assemble_arm.cc
index 6370f6c..d7fa05d 100644
--- a/src/compiler/codegen/arm/assemble_arm.cc
+++ b/src/compiler/codegen/arm/assemble_arm.cc
@@ -988,12 +988,12 @@
  * instruction.
  */
 AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
-                    intptr_t startAddr)
+                    uintptr_t startAddr)
 {
   LIR* lir;
   AssemblerStatus res = kSuccess;  // Assume success
 
-  for (lir = (LIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
+  for (lir = cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
 
     if (lir->opcode < 0) {
       /* 1 means padding is needed */
@@ -1031,9 +1031,9 @@
          * However, if the load displacement exceeds the limit,
          * we revert to a 2-instruction materialization sequence.
          */
-        LIR *lirTarget = (LIR *) lir->target;
-        intptr_t pc = (lir->offset + 4) & ~3;
-        intptr_t target = lirTarget->offset;
+        LIR *lirTarget = lir->target;
+        uintptr_t pc = (lir->offset + 4) & ~3;
+        uintptr_t target = lirTarget->offset;
         int delta = target - pc;
         if (delta & 0x3) {
           LOG(FATAL) << "PC-rel offset not multiple of 4: " << delta;
@@ -1059,7 +1059,7 @@
           // Add new Adr to generate the address
           LIR* newAdr = rawLIR(cUnit, lir->dalvikOffset, kThumb2Adr,
                      baseReg, 0, 0, 0, 0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newAdr);
+          oatInsertLIRBefore(lir, newAdr);
 
           // Convert to normal load
           if (lir->opcode == kThumb2LdrPcRel12) {
@@ -1080,9 +1080,9 @@
           }
         }
       } else if (lir->opcode == kThumb2Cbnz || lir->opcode == kThumb2Cbz) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         if (delta > 126 || delta < 0) {
           /*
@@ -1093,7 +1093,7 @@
             rawLIR(cUnit, lir->dalvikOffset, kThumbBCond, 0,
                    (lir->opcode == kThumb2Cbz) ? kArmCondEq : kArmCondNe,
                    0, 0, 0, lir->target);
-          oatInsertLIRAfter((LIR *)lir, (LIR *)newInst);
+          oatInsertLIRAfter(lir, newInst);
           /* Convert the cb[n]z to a cmp rx, #0 ] */
           lir->opcode = kThumbCmpRI8;
           /* operand[0] is src1 in both cb[n]z & CmpRI8 */
@@ -1128,11 +1128,11 @@
           res = kRetryAll;
         }
       } else if (lir->opcode == kThumbBCond || lir->opcode == kThumb2BCond) {
-        LIR *targetLIR = (LIR *) lir->target;
+        LIR *targetLIR = lir->target;
         int delta = 0;
         DCHECK(targetLIR);
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         delta = target - pc;
         if ((lir->opcode == kThumbBCond) && (delta > 254 || delta < -256)) {
           lir->opcode = kThumb2BCond;
@@ -1141,9 +1141,9 @@
         }
         lir->operands[0] = delta >> 1;
       } else if (lir->opcode == kThumb2BUncond) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         lir->operands[0] = delta >> 1;
         if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) &&
@@ -1152,9 +1152,9 @@
           res = kRetryAll;
         }
       } else if (lir->opcode == kThumbBUncond) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         if (delta > 2046 || delta < -2048) {
           // Convert to Thumb2BCond w/ kArmCondAl
@@ -1173,8 +1173,8 @@
       } else if (lir->opcode == kThumbBlx1) {
         DCHECK(NEXT_LIR(lir)->opcode == kThumbBlx2);
         /* curPC is Thumb */
-        intptr_t curPC = (startAddr + lir->offset + 4) & ~3;
-        intptr_t target = lir->operands[1];
+        uintptr_t curPC = (startAddr + lir->offset + 4) & ~3;
+        uintptr_t target = lir->operands[1];
 
         /* Match bit[1] in target with base */
         if (curPC & 0x2) {
@@ -1188,8 +1188,8 @@
       } else if (lir->opcode == kThumbBl1) {
         DCHECK(NEXT_LIR(lir)->opcode == kThumbBl2);
         /* Both curPC and target are Thumb */
-        intptr_t curPC = startAddr + lir->offset + 4;
-        intptr_t target = lir->operands[1];
+        uintptr_t curPC = startAddr + lir->offset + 4;
+        uintptr_t target = lir->operands[1];
 
         int delta = target - curPC;
         DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2)));
@@ -1197,8 +1197,8 @@
         lir->operands[0] = (delta >> 12) & 0x7ff;
         NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff;
       } else if (lir->opcode == kThumb2Adr) {
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[2];
-        LIR* target = (LIR*)lir->target;
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[2]);
+        LIR* target = lir->target;
         int targetDisp = tabRec ? tabRec->offset
                     : target->offset;
         int disp = targetDisp - ((lir->offset + 4) & ~3);
@@ -1208,14 +1208,14 @@
           // convert to ldimm16l, ldimm16h, add tgt, pc, operands[0]
           LIR *newMov16L =
               rawLIR(cUnit, lir->dalvikOffset, kThumb2MovImm16LST,
-                     lir->operands[0], 0, (intptr_t)lir, (intptr_t)tabRec,
-                     0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16L);
+                     lir->operands[0], 0, reinterpret_cast<uintptr_t>(lir),
+                     reinterpret_cast<uintptr_t>(tabRec), 0, lir->target);
+          oatInsertLIRBefore(lir, newMov16L);
           LIR *newMov16H =
               rawLIR(cUnit, lir->dalvikOffset, kThumb2MovImm16HST,
-                     lir->operands[0], 0, (intptr_t)lir, (intptr_t)tabRec,
-                     0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16H);
+                     lir->operands[0], 0, reinterpret_cast<uintptr_t>(lir),
+                     reinterpret_cast<uintptr_t>(tabRec), 0, lir->target);
+          oatInsertLIRBefore(lir, newMov16H);
           lir->opcode = kThumb2AddRRR;
           lir->operands[1] = rARM_PC;
           lir->operands[2] = lir->operands[0];
@@ -1224,18 +1224,18 @@
         }
       } else if (lir->opcode == kThumb2MovImm16LST) {
         // operands[1] should hold disp, [2] has add, [3] has tabRec
-        LIR *addPCInst = (LIR*)lir->operands[2];
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[3];
+        LIR *addPCInst = reinterpret_cast<LIR*>(lir->operands[2]);
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[3]);
         // If tabRec is null, this is a literal load. Use target
-        LIR* target = (LIR*)lir->target;
+        LIR* target = lir->target;
         int targetDisp = tabRec ? tabRec->offset : target->offset;
         lir->operands[1] = (targetDisp - (addPCInst->offset + 4)) & 0xffff;
       } else if (lir->opcode == kThumb2MovImm16HST) {
         // operands[1] should hold disp, [2] has add, [3] has tabRec
-        LIR *addPCInst = (LIR*)lir->operands[2];
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[3];
+        LIR *addPCInst = reinterpret_cast<LIR*>(lir->operands[2]);
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[3]);
         // If tabRec is null, this is a literal load. Use target
-        LIR* target = (LIR*)lir->target;
+        LIR* target = lir->target;
         int targetDisp = tabRec ? tabRec->offset : target->offset;
         lir->operands[1] =
             ((targetDisp - (addPCInst->offset + 4)) >> 16) & 0xffff;
@@ -1348,7 +1348,7 @@
           }
           break;
         default:
-          LOG(FATAL) << "Bad fmt:" << (int)encoder->fieldLoc[i].kind;
+          LOG(FATAL) << "Bad fmt:" << encoder->fieldLoc[i].kind;
       }
     }
     if (encoder->size == 4) {
@@ -1374,9 +1374,7 @@
   LIR* armLIR;
   int offset = 0;
 
-  for (armLIR = (LIR *) cUnit->firstLIRInsn;
-     armLIR;
-     armLIR = NEXT_LIR(armLIR)) {
+  for (armLIR = cUnit->firstLIRInsn; armLIR; armLIR = NEXT_LIR(armLIR)) {
     armLIR->offset = offset;
     if (armLIR->opcode >= 0) {
       if (!armLIR->flags.isNop) {
diff --git a/src/compiler/codegen/arm/call_arm.cc b/src/compiler/codegen/arm/call_arm.cc
index 92b067c..acf825a 100644
--- a/src/compiler/codegen/arm/call_arm.cc
+++ b/src/compiler/codegen/arm/call_arm.cc
@@ -128,7 +128,7 @@
   /* Don't generate the SSA annotation unless verbose mode is on */
   if (cUnit->printMe && mir->ssaRep) {
     char* ssaString = oatGetSSAString(cUnit, mir->ssaRep);
-    newLIR1(cUnit, kPseudoSSARep, (int) ssaString);
+    newLIR1(cUnit, kPseudoSSARep, reinterpret_cast<uintptr_t>(ssaString));
   }
 }
 
@@ -329,13 +329,13 @@
     dumpSparseSwitchTable(table);
   }
   // Add the table to the list - we'll process it later
-  SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
-                                              true, kAllocData);
+  SwitchTable *tabRec =
+      static_cast<SwitchTable*>(oatNew(cUnit, sizeof(SwitchTable), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   int size = table[1];
-  tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR);
-  oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+  tabRec->targets = static_cast<LIR**>(oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR));
+  oatInsertGrowableList(cUnit, &cUnit->switchTables, reinterpret_cast<uintptr_t>(tabRec));
 
   // Get the switch value
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
@@ -350,7 +350,7 @@
     rKey = tmp;
   }
   // Materialize a pointer to the switch table
-  newLIR3(cUnit, kThumb2Adr, rBase, 0, (intptr_t)tabRec);
+  newLIR3(cUnit, kThumb2Adr, rBase, 0, reinterpret_cast<uintptr_t>(tabRec));
   // Set up rIdx
   int rIdx = oatAllocTemp(cUnit);
   loadConstant(cUnit, rIdx, size);
@@ -377,19 +377,19 @@
     dumpPackedSwitchTable(table);
   }
   // Add the table to the list - we'll process it later
-  SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
-                                              true, kAllocData);
+  SwitchTable *tabRec =
+      static_cast<SwitchTable*>(oatNew(cUnit, sizeof(SwitchTable), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   int size = table[1];
-  tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR);
-  oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+  tabRec->targets = static_cast<LIR**>(oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR));
+  oatInsertGrowableList(cUnit, &cUnit->switchTables, reinterpret_cast<uintptr_t>(tabRec));
 
   // Get the switch value
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
   int tableBase = oatAllocTemp(cUnit);
   // Materialize a pointer to the switch table
-  newLIR3(cUnit, kThumb2Adr, tableBase, 0, (intptr_t)tabRec);
+  newLIR3(cUnit, kThumb2Adr, tableBase, 0, reinterpret_cast<uintptr_t>(tabRec));
   int lowKey = s4FromSwitchData(&table[2]);
   int keyReg;
   // Remove the bias, if necessary
@@ -413,7 +413,7 @@
 
   /* branchOver target here */
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
 }
 
 /*
@@ -430,15 +430,15 @@
 {
   const uint16_t* table = cUnit->insns + cUnit->currentDalvikOffset + tableOffset;
   // Add the table to the list - we'll process it later
-  FillArrayData *tabRec = (FillArrayData *)
-     oatNew(cUnit, sizeof(FillArrayData), true, kAllocData);
+  FillArrayData *tabRec =
+      static_cast<FillArrayData*>(oatNew(cUnit, sizeof(FillArrayData), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   uint16_t width = tabRec->table[1];
   uint32_t size = tabRec->table[2] | ((static_cast<uint32_t>(tabRec->table[3])) << 16);
   tabRec->size = (size * width) + 8;
 
-  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, (intptr_t)tabRec);
+  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, reinterpret_cast<uintptr_t>(tabRec));
 
   // Making a call - use explicit registers
   oatFlushAllRegs(cUnit);   /* Everything to home location */
@@ -446,7 +446,7 @@
   loadWordDisp(cUnit, rARM_SELF, ENTRYPOINT_OFFSET(pHandleFillArrayDataFromCode),
                rARM_LR);
   // Materialize a pointer to the fill data image
-  newLIR3(cUnit, kThumb2Adr, r1, 0, (intptr_t)tabRec);
+  newLIR3(cUnit, kThumb2Adr, r1, 0, reinterpret_cast<uintptr_t>(tabRec));
   oatClobberCalleeSave(cUnit);
   LIR* callInst = opReg(cUnit, kOpBlx, rARM_LR);
   markSafepointPC(cUnit, callInst);
@@ -552,7 +552,7 @@
   storeBaseIndexed(cUnit, regCardBase, regCardNo, regCardBase, 0,
                    kUnsignedByte);
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
   oatFreeTemp(cUnit, regCardBase);
   oatFreeTemp(cUnit, regCardNo);
 }
@@ -577,7 +577,7 @@
    * a leaf *and* our frame size < fudge factor.
    */
   bool skipOverflowCheck = ((cUnit->attrs & METHOD_IS_LEAF) &&
-                            ((size_t)cUnit->frameSize <
+                            (static_cast<size_t>(cUnit->frameSize) <
                             Thread::kStackOverflowReservedBytes));
   newLIR0(cUnit, kPseudoMethodEntry);
   if (!skipOverflowCheck) {
diff --git a/src/compiler/codegen/arm/fp_arm.cc b/src/compiler/codegen/arm/fp_arm.cc
index 8c22050..70783a4 100644
--- a/src/compiler/codegen/arm/fp_arm.cc
+++ b/src/compiler/codegen/arm/fp_arm.cc
@@ -54,7 +54,7 @@
   rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
   rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg);
   rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-  newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
+  newLIR3(cUnit, op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
   storeValue(cUnit, rlDest, rlResult);
   return false;
 }
@@ -98,8 +98,7 @@
   rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
   DCHECK(rlDest.wide);
   DCHECK(rlResult.wide);
-  newLIR3(cUnit, (ArmOpcode)op, s2d(rlResult.lowReg, rlResult.highReg),
-          s2d(rlSrc1.lowReg, rlSrc1.highReg),
+  newLIR3(cUnit, op, s2d(rlResult.lowReg, rlResult.highReg), s2d(rlSrc1.lowReg, rlSrc1.highReg),
           s2d(rlSrc2.lowReg, rlSrc2.highReg));
   storeValueWide(cUnit, rlDest, rlResult);
   return false;
@@ -148,12 +147,11 @@
   }
   if (rlDest.wide) {
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR2(cUnit, (ArmOpcode)op, s2d(rlResult.lowReg, rlResult.highReg),
-            srcReg);
+    newLIR2(cUnit, op, s2d(rlResult.lowReg, rlResult.highReg), srcReg);
     storeValueWide(cUnit, rlDest, rlResult);
   } else {
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR2(cUnit, (ArmOpcode)op, rlResult.lowReg, srcReg);
+    newLIR2(cUnit, op, rlResult.lowReg, srcReg);
     storeValue(cUnit, rlDest, rlResult);
   }
   return false;
@@ -207,7 +205,7 @@
       }
       break;
     default:
-      LOG(FATAL) << "Unexpected ccode: " << (int)ccode;
+      LOG(FATAL) << "Unexpected ccode: " << ccode;
   }
   opCondBranch(cUnit, ccode, target);
 }
diff --git a/src/compiler/codegen/arm/int_arm.cc b/src/compiler/codegen/arm/int_arm.cc
index d7bd523..159b329 100644
--- a/src/compiler/codegen/arm/int_arm.cc
+++ b/src/compiler/codegen/arm/int_arm.cc
@@ -111,8 +111,8 @@
   storeValue(cUnit, rlDest, rlTemp);
   oatFreeTemp(cUnit, tReg);
 
-  branch1->target = (LIR*)target1;
-  branch2->target = (LIR*)target2;
+  branch1->target = target1;
+  branch2->target = target2;
   branch3->target = branch1->target;
 }
 
@@ -155,7 +155,7 @@
       ccode = kCondCs;
       break;
     default:
-      LOG(FATAL) << "Unexpected ccode: " << (int)ccode;
+      LOG(FATAL) << "Unexpected ccode: " << ccode;
   }
   opRegReg(cUnit, kOpCmp, rlSrc1.lowReg, rlSrc2.lowReg);
   opCondBranch(cUnit, ccode, taken);
@@ -215,7 +215,7 @@
 LIR* opRegCopy(CompilationUnit* cUnit, int rDest, int rSrc)
 {
   LIR* res = opRegCopyNoInsert(cUnit, rDest, rSrc);
-  oatAppendLIR(cUnit, (LIR*)res);
+  oatAppendLIR(cUnit, res);
   return res;
 }
 
@@ -249,13 +249,6 @@
 }
 
 // Table of magic divisors
-enum DividePattern {
-  DivideNone,
-  Divide3,
-  Divide5,
-  Divide7,
-};
-
 struct MagicTable {
   uint32_t magic;
   uint32_t shift;
@@ -285,7 +278,7 @@
 bool smallLiteralDivide(CompilationUnit* cUnit, Instruction::Code dalvikOpcode,
                         RegLocation rlSrc, RegLocation rlDest, int lit)
 {
-  if ((lit < 0) || (lit >= (int)(sizeof(magicTable)/sizeof(magicTable[0])))) {
+  if ((lit < 0) || (lit >= static_cast<int>(sizeof(magicTable)/sizeof(magicTable[0])))) {
     return false;
   }
   DividePattern pattern = magicTable[lit].pattern;
@@ -321,7 +314,7 @@
                encodeShift(kArmAsr, magicTable[lit].shift));
       break;
     default:
-      LOG(FATAL) << "Unexpected pattern: " << (int)pattern;
+      LOG(FATAL) << "Unexpected pattern: " << pattern;
   }
   storeValue(cUnit, rlDest, rlResult);
   return true;
diff --git a/src/compiler/codegen/arm/target_arm.cc b/src/compiler/codegen/arm/target_arm.cc
index 5838ca7..6640707 100644
--- a/src/compiler/codegen/arm/target_arm.cc
+++ b/src/compiler/codegen/arm/target_arm.cc
@@ -221,10 +221,10 @@
   }
 }
 
-ArmConditionCode oatArmConditionEncoding(ConditionCode code)
+ArmConditionCode oatArmConditionEncoding(ConditionCode ccode)
 {
   ArmConditionCode res;
-  switch (code) {
+  switch (ccode) {
     case kCondEq: res = kArmCondEq; break;
     case kCondNe: res = kArmCondNe; break;
     case kCondCs: res = kArmCondCs; break;
@@ -242,8 +242,8 @@
     case kCondAl: res = kArmCondAl; break;
     case kCondNv: res = kArmCondNv; break;
     default:
-      LOG(FATAL) << "Bad condition code" << (int)code;
-      res = (ArmConditionCode)0;  // Quiet gcc
+      LOG(FATAL) << "Bad condition code " << ccode;
+      res = static_cast<ArmConditionCode>(0);  // Quiet gcc
   }
   return res;
 }
@@ -352,7 +352,7 @@
         strcpy(tbuf, "!");
       } else {
          DCHECK_LT(fmt, fmtEnd);
-         DCHECK_LT((unsigned)(nc-'0'), 4U);
+         DCHECK_LT(static_cast<unsigned>(nc-'0'), 4U);
          operand = lir->operands[nc-'0'];
          switch (*fmt++) {
            case 'H':
@@ -432,18 +432,18 @@
              break;
            case 't':
              sprintf(tbuf,"0x%08x (L%p)",
-                 (int) baseAddr + lir->offset + 4 +
+                 reinterpret_cast<uintptr_t>(baseAddr) + lir->offset + 4 +
                  (operand << 1),
                  lir->target);
              break;
            case 'u': {
              int offset_1 = lir->operands[0];
              int offset_2 = NEXT_LIR(lir)->operands[0];
-             intptr_t target =
-                 ((((intptr_t) baseAddr + lir->offset + 4) &
+             uintptr_t target =
+                 (((reinterpret_cast<uintptr_t>(baseAddr) + lir->offset + 4) &
                  ~3) + (offset_1 << 21 >> 9) + (offset_2 << 1)) &
                  0xfffffffc;
-             sprintf(tbuf, "%p", (void *) target);
+             sprintf(tbuf, "%p", reinterpret_cast<void *>(target));
              break;
           }
 
@@ -473,11 +473,10 @@
   return buf;
 }
 
-void oatDumpResourceMask(LIR* lir, uint64_t mask, const char* prefix)
+void oatDumpResourceMask(LIR* armLIR, uint64_t mask, const char* prefix)
 {
   char buf[256];
   buf[0] = 0;
-  LIR* armLIR = (LIR*) lir;
 
   if (mask == ENCODE_ALL) {
     strcpy(buf, "all");
@@ -520,46 +519,9 @@
   }
 }
 
-/*
- * Nop any unconditional branches that go to the next instruction.
- * Note: new redundant branches may be inserted later, and we'll
- * use a check in final instruction assembly to nop those out.
- */
-void removeRedundantBranches(CompilationUnit* cUnit)
+bool branchUnconditional(LIR* lir)
 {
-  LIR* thisLIR;
-
-  for (thisLIR = (LIR*) cUnit->firstLIRInsn;
-     thisLIR != (LIR*) cUnit->lastLIRInsn;
-     thisLIR = NEXT_LIR(thisLIR)) {
-
-    /* Branch to the next instruction */
-    if ((thisLIR->opcode == kThumbBUncond) ||
-      (thisLIR->opcode == kThumb2BUncond)) {
-      LIR* nextLIR = thisLIR;
-
-      while (true) {
-        nextLIR = NEXT_LIR(nextLIR);
-
-        /*
-         * Is the branch target the next instruction?
-         */
-        if (nextLIR == (LIR*) thisLIR->target) {
-          thisLIR->flags.isNop = true;
-          break;
-        }
-
-        /*
-         * Found real useful stuff between the branch and the target.
-         * Need to explicitly check the lastLIRInsn here because it
-         * might be the last real instruction.
-         */
-        if (!isPseudoOpcode(nextLIR->opcode) ||
-          (nextLIR = (LIR*) cUnit->lastLIRInsn))
-          break;
-      }
-    }
-  }
+  return ((lir->opcode == kThumbBUncond) || (lir->opcode == kThumb2BUncond));
 }
 
 /* Common initialization routine for an architecture family */
@@ -571,7 +533,7 @@
     if (EncodingMap[i].opcode != i) {
       LOG(FATAL) << "Encoding order for " << EncodingMap[i].name
                  << " is wrong: expecting " << i << ", seeing "
-                 << (int)EncodingMap[i].opcode;
+                 << static_cast<int>(EncodingMap[i].opcode);
     }
   }
 
@@ -627,17 +589,15 @@
   int numTemps = sizeof(coreTemps)/sizeof(*coreTemps);
   int numFPRegs = sizeof(fpRegs)/sizeof(*fpRegs);
   int numFPTemps = sizeof(fpTemps)/sizeof(*fpTemps);
-  RegisterPool *pool = (RegisterPool *)oatNew(cUnit, sizeof(*pool), true,
-                        kAllocRegAlloc);
+  RegisterPool *pool =
+      static_cast<RegisterPool*>(oatNew(cUnit, sizeof(*pool), true, kAllocRegAlloc));
   cUnit->regPool = pool;
   pool->numCoreRegs = numRegs;
-  pool->coreRegs = (RegisterInfo *)
-      oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs),
-             true, kAllocRegAlloc);
+  pool->coreRegs = reinterpret_cast<RegisterInfo*>
+      (oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs), true, kAllocRegAlloc));
   pool->numFPRegs = numFPRegs;
-  pool->FPRegs = (RegisterInfo *)
-      oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
-             kAllocRegAlloc);
+  pool->FPRegs = static_cast<RegisterInfo*>
+      (oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true, kAllocRegAlloc));
   oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs);
   oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
   // Keep special registers from being allocated
@@ -660,9 +620,8 @@
   pool->nextCoreReg = r2;
 
   // Construct the alias map.
-  cUnit->phiAliasMap = (int*)oatNew(cUnit, cUnit->numSSARegs *
-                                    sizeof(cUnit->phiAliasMap[0]), false,
-                                    kAllocDFInfo);
+  cUnit->phiAliasMap = static_cast<int*>
+      (oatNew(cUnit, cUnit->numSSARegs * sizeof(cUnit->phiAliasMap[0]), false, kAllocDFInfo));
   for (int i = 0; i < cUnit->numSSARegs; i++) {
     cUnit->phiAliasMap[i] = i;
   }
@@ -837,12 +796,6 @@
   oatFreeTemp(cUnit, r3);
 }
 
-/* Convert an instruction to a NOP */
-void oatNopLIR( LIR* lir)
-{
-  ((LIR*)lir)->flags.isNop = true;
-}
-
 int loadHelper(CompilationUnit* cUnit, int offset)
 {
   loadWordDisp(cUnit, rARM_SELF, offset, rARM_LR);
diff --git a/src/compiler/codegen/arm/utility_arm.cc b/src/compiler/codegen/arm/utility_arm.cc
index 9069826..1873c2a 100644
--- a/src/compiler/codegen/arm/utility_arm.cc
+++ b/src/compiler/codegen/arm/utility_arm.cc
@@ -54,8 +54,8 @@
   LIR* loadPcRel = rawLIR(cUnit, cUnit->currentDalvikOffset, kThumb2Vldrs,
                           rDest, r15pc, 0, 0, 0, dataTarget);
   setMemRefType(loadPcRel, true, kLiteral);
-  loadPcRel->aliasInfo = (intptr_t)dataTarget;
-  oatAppendLIR(cUnit, (LIR* ) loadPcRel);
+  loadPcRel->aliasInfo = reinterpret_cast<uintptr_t>(dataTarget);
+  oatAppendLIR(cUnit, loadPcRel);
   return loadPcRel;
 }
 
@@ -157,9 +157,9 @@
   LIR* loadPcRel = rawLIR(cUnit, cUnit->currentDalvikOffset,
                           kThumb2LdrPcRel12, rDest, 0, 0, 0, 0, dataTarget);
   setMemRefType(loadPcRel, true, kLiteral);
-  loadPcRel->aliasInfo = (intptr_t)dataTarget;
+  loadPcRel->aliasInfo = reinterpret_cast<uintptr_t>(dataTarget);
   res = loadPcRel;
-  oatAppendLIR(cUnit, (LIR* ) loadPcRel);
+  oatAppendLIR(cUnit, loadPcRel);
 
   /*
    * To save space in the constant pool, we use the ADD_RRI8 instruction to
@@ -193,7 +193,7 @@
       opcode = kThumbBlxR;
       break;
     default:
-      LOG(FATAL) << "Bad opcode " << (int)op;
+      LOG(FATAL) << "Bad opcode " << op;
   }
   return newLIR1(cUnit, opcode, rDestSrc);
 }
@@ -295,7 +295,7 @@
       DCHECK_EQ(shift, 0);
       return newLIR4(cUnit, kThumb2Ubfx, rDestSrc1, rSrc2, 0, 16);
     default:
-      LOG(FATAL) << "Bad opcode: " << (int)op;
+      LOG(FATAL) << "Bad opcode: " << op;
       break;
   }
   DCHECK_GE(static_cast<int>(opcode), 0);
@@ -374,7 +374,7 @@
       opcode = kThumb2RorRRR;
       break;
     default:
-      LOG(FATAL) << "Bad opcode: " << (int)op;
+      LOG(FATAL) << "Bad opcode: " << op;
       break;
   }
   DCHECK_GE(static_cast<int>(opcode), 0);
@@ -496,7 +496,7 @@
       return res;
     }
     default:
-      LOG(FATAL) << "Bad opcode: " << (int)op;
+      LOG(FATAL) << "Bad opcode: " << op;
   }
 
   if (modImm >= 0) {
@@ -611,8 +611,8 @@
           rawLIR(cUnit, cUnit->currentDalvikOffset, kThumb2Vldrd,
                  s2d(rDestLo, rDestHi), r15pc, 0, 0, 0, dataTarget);
       setMemRefType(loadPcRel, true, kLiteral);
-      loadPcRel->aliasInfo = (intptr_t)dataTarget;
-      oatAppendLIR(cUnit, (LIR* ) loadPcRel);
+      loadPcRel->aliasInfo = reinterpret_cast<uintptr_t>(dataTarget);
+      oatAppendLIR(cUnit, loadPcRel);
       res = loadPcRel;
     }
   } else {
@@ -681,7 +681,7 @@
       opcode = (thumbForm) ? kThumbLdrsbRRR : kThumb2LdrsbRRR;
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
   if (thumbForm)
     load = newLIR3(cUnit, opcode, rDest, rBase, rIndex);
@@ -742,7 +742,7 @@
       opcode = (thumbForm) ? kThumbStrbRRR : kThumb2StrbRRR;
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
   if (thumbForm)
     store = newLIR3(cUnit, opcode, rSrc, rBase, rIndex);
@@ -854,7 +854,7 @@
       }
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
 
   if (shortForm) {
@@ -961,7 +961,7 @@
       }
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
   if (shortForm) {
     store = res = newLIR3(cUnit, opcode, rSrc, rBase, encodedDisp);